1. 22 6月, 2014 9 次提交
    • J
      x86, irq: Clean up unused IOAPIC interface · 9f354b02
      Jiang Liu 提交于
      Now we have converted all x86 platforms to use the common irqdomain map
      interface. There's no caller of io_apic_set_pci_routing(),
      setup_IO_APIC_irq_extra() and io_apic_setup_irq_pin_once() any more,
      so kill them.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Link: http://lkml.kernel.org/r/1402302011-23642-35-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      9f354b02
    • J
      x86, irq: Introduce two helper functions to support irqdomain map operation · 15a3c7cc
      Jiang Liu 提交于
      Currently there are multiple entries to program IOAPIC pins, such as
      io_apic_setup_irq_pin_once(), io_apic_set_pci_routing() and
      setup_IO_APIC_irq_extra() etc.
      
      This patch introduces two functions to help consolidate the code to
      program IOAPIC pins. Function mp_set_pin_attr() is used to optionally
      set trigger, polarity and NUMA node property for an IOAPIC pin.
      If mp_set_pin_attr() is not invoked for a pin, the default configuration
      from BIOS will be used.
      
      Function mp_irqdomain_map() is an common implementation of irqdomain map()
      operation. It figures out attribures for pin and then actually programs
      the IOAPIC pin. We hope this will be the only entrance for programming
      IOAPIC pin.
      
      And the flow will:
      1) caller such as xxx_pci_irq_enable figures out pin attributes.
      2) Invoke mp_set_pin_attr() to set attributes for a pin. If the pin has
         already bin programmed,  mp_set_pin_attr() will aslo detects attribute
         confictions.
      3) Invoke mp_map_pin_to_irq()
      3.1) If IRQ has already been assigned, return irq_find_mapping()
      3.2) Else irq_create_mapping()
      		->irq_domain_associate()
      			->mp_irqdomain_map()
      				->io_apic_setup_irq_pin()
      
      So every pin will only programmed once by mp_irqdomain_map(), so we
      could kill io_apic_setup_irq_pin_once(), io_apic_set_pci_routing() and
      setup_IO_APIC_irq_extra() etc.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Link: http://lkml.kernel.org/r/1402302011-23642-30-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      15a3c7cc
    • J
      x86, irq: Enhance mp_register_ioapic() to support irqdomain · 44767bfa
      Jiang Liu 提交于
      Enhance function mp_register_ioapic() to support irqdomain.
      When registering IOAPIC, caller may provide callbacks and parameters
      for creating irqdomain. The IOAPIC core will create irqdomain later
      if caller has passed in corresponding parameters.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: sfi-devel@simplefirmware.org
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Michal Simek <monstr@monstr.eu>
      Cc: Tony Lindgren <tony@atomide.com>
      Link: http://lkml.kernel.org/r/1402302011-23642-25-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      44767bfa
    • J
      x86, irq: Introduce mechanisms to support dynamically allocate IRQ for IOAPIC · d7f3d478
      Jiang Liu 提交于
      Currently x86 support identity mapping between GSI(IOAPIC pin) and IRQ
      number, so continous IRQs at low end are statically allocated to IOAPICs
      at boot time. This design causes trouble to support IOAPIC hotplug.
      
      This patch implements basic mechanism to dynamically allocate IRQ on
      demand for IOAPIC pins by using irqdomain framework.
      
      It first adds several fields into struct ioapic to support irqdomain.
      Then it implements an algorithm to dynamically allocate IRQ number
      for IOAPIC pins on demand.
      
      Currently it supports three types of irqdomain:
      1) LEGACY: used to support IOAPIC hosting legacy IRQs and building
         identity mapping for legacy IRQs. A speical case, we dynamically
         allocate IRQ number for IOAPIC pin which has GSI number below
         nr_legacy_irqs() but isn't legacy IRQ. This is for backward
         compatibility and avoid regression.
      2) STRICT: build identity mapping between GSI and IRQ nubmer.
      3) DYNAMIC: dynamically allocate IRQ number for IOAPIC pin on demand.
      
      Legacy(ISA) IRQs is not managed by irqdomain because there may be
      multiple pins sharing the same IRQ number and current irqdomain only
      supports 1:1 mapping between pins and IRQ.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402302011-23642-24-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      d7f3d478
    • J
      x86, ACPI, irq: Consolidate algorithm of mapping (ioapic, pin) to IRQ number · 6b9fb708
      Jiang Liu 提交于
      Currently ACPI and ioapic both implement algorithms to map (ioapic, pin)
      to IRQ number. So consolidate the common part into one place, which is
      also preparing for irqdomain support.
      
      It introduces mp_map_gsi_to_irq(), which will be used to allocate IRQ
      number IOAPIC pins when irqdomain is enabled.
      
      Also rename gsi_to_irq() to map_gsi_to_irq(), later we will introduce
      unmap_gsi_to_irq() when enabling IOAPIC hotplug.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Link: http://lkml.kernel.org/r/1402380812-32446-1-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      6b9fb708
    • J
      x86, irq: Introduce some helper utilities to improve readability · 18e48551
      Jiang Liu 提交于
      It also fixes an off by one bug in
      	if ((ioapic_idx > 0) && (irq > NR_IRQS_LEGACY))
      It should be
      	if ((ioapic_idx > 0) && (irq >= NR_IRQS_LEGACY))
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Link: http://lkml.kernel.org/r/1402302011-23642-17-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      18e48551
    • J
      x86, ioapic: Kill unused global variable timer_through_8259 · 4035ed01
      Jiang Liu 提交于
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Link: http://lkml.kernel.org/r/1402302011-23642-12-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      4035ed01
    • J
      x86, irq, trivial: Minor improvements of IRQ related code · 3eb2be5f
      Jiang Liu 提交于
      1) Kill unused MAX_HARDIRQS_PER_CPU.
      2) Improve function prototype declararions.
      3) Simple typo fix, change "gsit" to "gsi".
      4) Use macro VECTOR_UNDEFINED instead of hard-coded -1.
      5) Kill redundant comments.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Jiri Kosina <trivial@kernel.org>
      Link: http://lkml.kernel.org/r/1402302011-23642-11-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      3eb2be5f
    • J
      x86, mpparse: Simplify arch/x86/include/asm/mpspec.h · a491cc90
      Jiang Liu 提交于
      Simplify arch/x86/include/asm/mpspec.h by
      1) Change max_physical_apicid to static as it's only used in apic.c.
      2) Kill declaration of mpc_default_type, it's never defined.
      3) Delete default_acpi_madt_oem_check(), it has already been declared
         in apic.h.
      4) Make default_acpi_madt_oem_check() depends on CONFIG_X86_LOCAL_APIC
         instead of CONFIG_X86_64 to support i386.
      5) Change mp_override_legacy_irq(), mp_config_acpi_legacy_irqs() and
         mp_register_gsi() as static because they are only used in acpi/boot.c.
      Signed-off-by: NJiang Liu <jiang.liu@linux.intel.com>
      Acked-by: NDavid Rientjes <rientjes@google.com>
      Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Joerg Roedel <joro@8bytes.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: H. Peter Anvin <hpa@linux.intel.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Bjorn Helgaas <bhelgaas@google.com>
      Cc: Randy Dunlap <rdunlap@infradead.org>
      Cc: Yinghai Lu <yinghai@kernel.org>
      Cc: Len Brown <len.brown@intel.com>
      Cc: Pavel Machek <pavel@ucw.cz>
      Cc: Seiji Aguchi <seiji.aguchi@hds.com>
      Cc: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com>
      Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
      Cc: Richard Weinberger <richard@nod.at>
      Cc: Andi Kleen <ak@linux.intel.com>
      Link: http://lkml.kernel.org/r/1402302011-23642-4-git-send-email-jiang.liu@linux.intel.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      a491cc90
  2. 16 5月, 2014 1 次提交
  3. 28 1月, 2013 7 次提交
  4. 02 5月, 2012 1 次提交
  5. 28 3月, 2012 1 次提交
  6. 20 5月, 2011 4 次提交
  7. 28 4月, 2011 1 次提交
    • S
      x86: devicetree: Configure IOAPIC pin only once · 20443598
      Sebastian Andrzej Siewior 提交于
      We use io_apic_setup_irq_pin() in order to configure pin's interrupt
      number polarity and type. This is done on every irq_create_of_mapping()
      which happens for instance during pci enable calls. Level typed
      interrupts are masked by default, edge are unmasked.
      
      On the first ->xlate() call the level interrupt is configured and
      masked. The driver calls request_irq() and the line is unmasked. Lets
      assume the interrupt line is shared with another device and we call
      pci_enable_device() for this device. The ->xlate() configures the pin
      again and it is masked. request_irq() does not unmask the line because
      it _is_ already unmasked according to its internal state. So the
      interrupt will never be unmasked again.
      
      This patch is based on an earlier work by Torben Hohn and solves the
      problem by configuring the pin only once. Since all devices must agree
      on the same type and polarity there is no point in configuring the pin
      more than once.
      
      [ tglx: Split out the ce4100 part into a separate patch ]
      
      Cc: Torben Hohn <torbenh@linutronix.de>
      Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de>
      Link: http://lkml.kernel.org/r/%3C20110427143052.GA15211%40linutronix.de%3ESigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      20443598
  8. 24 2月, 2011 3 次提交
  9. 23 2月, 2011 4 次提交
  10. 10 12月, 2010 1 次提交
  11. 06 12月, 2010 1 次提交
  12. 24 10月, 2010 1 次提交
  13. 23 10月, 2010 1 次提交
  14. 18 10月, 2010 1 次提交
  15. 12 10月, 2010 1 次提交
  16. 10 6月, 2010 1 次提交
    • E
      x86, irq: Rename gsi_end gsi_top, and fix off by one errors · a4384df3
      Eric W. Biederman 提交于
      When I introduced the global variable gsi_end I thought gsi_end on
      io_apics was one past the end of the gsi range for the io_apic.  After
      it was pointed out the the range on io_apics was inclusive I changed
      my global variable to match.  That was a big mistake.  Inclusive
      semantics without a range start cannot describe the case when no gsi's
      are allocated.  Describing the case where no gsi's are allocated is
      important in sfi.c and mpparse.c so that we can assign gsi numbers
      instead of blindly copying the gsi assignments the BIOS has done as we
      do in the acpi case.
      
      To keep from getting the global variable confused with the gsi range
      end rename it gsi_top.
      
      To allow describing the case where no gsi's are allocated have gsi_top
      be one place the highest gsi number seen in the system.
      
      This fixes an off by one bug in sfi.c:
      Reported-by: Njacob pan <jacob.jun.pan@linux.intel.com>
      
      This fixes the same off by one bug in mpparse.c:
      
      This fixes an off unreachable by one bug in acpi/boot.c:irq_to_gsi
      Reported-by: NYinghai <yinghai.lu@oracle.com>
      Signed-off-by: NEric W. Biederman <ebiederm@xmission.com>
      LKML-Reference: <m17hm9jre7.fsf_-_@fess.ebiederm.org>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      a4384df3
  17. 06 5月, 2010 1 次提交
  18. 05 5月, 2010 1 次提交