- 04 2月, 2010 5 次提交
-
-
由 Tony Lindgren 提交于
3630 has more mux signals than 34xx. The additional pins exist in omap36xx_cbp_subset, but are not initialized as the superset is missing these offsets. This causes the following errors during the boot: mux: Unknown entry offset 0x236 mux: Unknown entry offset 0x22e mux: Unknown entry offset 0x1ec mux: Unknown entry offset 0x1ee mux: Unknown entry offset 0x1f4 mux: Unknown entry offset 0x1f6 mux: Unknown entry offset 0x1f8 mux: Unknown entry offset 0x1fa mux: Unknown entry offset 0x1fc mux: Unknown entry offset 0x22a mux: Unknown entry offset 0x226 mux: Unknown entry offset 0x230 mux: Unknown entry offset 0x22c mux: Unknown entry offset 0x228 Fix this by adding the missing offsets to omap3 superset. Note that additionally the uninitialized pins need to be skipped on 34xx. Based on an earlier patch by Allen Pais <allen.pais@ti.com>. Reported-by: NAllen Pais <allen.pais@ti.com> Signed-off-by: NAllen Pais <allen.pais@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Kevin Hilman 提交于
Ensure valid clock pointer during GPMC init. Fixes compiler warning about potential use of uninitialized variable. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Kevin Hilman 提交于
Ensure valid base address during IRQ init. Fixes compiler warning about potential use of uninitialized variable. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Sriram 提交于
OMAP platforms(like OMAP3530) include DSP or other co-processors for media acceleration. when carving out memory for the accelerators we can end up creating a hole in the memory map of sort: <kernel memory><hole(memory for accelerator)><kernel memory> To handle such a memory configuration ARCH_HAS_HOLES_MEMORYMODEL has to be enabled. For further information refer discussion at: http://www.mail-archive.com/linux-omap@vger.kernel.org/msg15262.html. Signed-off-by: NSriramakrishnan <srk@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tony Lindgren 提交于
Remove old unused defines for OMAP_32KSYNCT_BASE Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 30 1月, 2010 1 次提交
-
-
由 Uwe Kleine-König 提交于
The only usage of _toggle_gpio_edge_triggering is in an #ifdef CONFIG_ARCH_OMAP1 block, so only provide it if CONFIG_ARCH_OMAP1 is defined, too. This fixes a compiler warning: arch/arm/plat-omap/gpio.c:758: warning: '_toggle_gpio_edge_triggering' defined but not used when compiling for ARCH_OMAP2, ARCH_OMAP3 or ARCH_OMAP4. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 29 1月, 2010 1 次提交
-
-
由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 25 1月, 2010 1 次提交
-
-
由 Erik Benada 提交于
This patch fixes power LED blinking and power-off on DNS-323 rev. B1. GPIO pin 3 has to be set to 1 to stop power LED blinking and to allow the LED to be controlled via leds-gpio. This pin has to be also set to 1 for power-off to work. To power-off the rev. B1 machine, pin 8 has to be set to 1 and then set to 0 to do actual power-off. Tested on my DNS-323 rev. B1 Signed-off-by: NErik Benada <erikbenada@yahoo.ca> Signed-off-by: NNicolas Pitre <nico@marvell.com>
-
- 22 1月, 2010 2 次提交
-
-
由 Tero Kristo 提交于
OMAP GP timers keep running for a few cycles after they are stopped, which can cause the timer to expire and generate an interrupt. The pending interrupt will prevent e.g. OMAP from entering suspend, thus we ack it manually. Only applicable on OMAP2/3/4. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Peter Korsgaard 提交于
Commit cfc38999f (backlight: Pass device through notify callback) added a struct device argument to the notify callback, but didn't update the user of it in mach-hmt.c Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NBen Dooks <ben-linux@fluff.org>
-
- 21 1月, 2010 18 次提交
-
-
由 Sergio Aguirre 提交于
Fix following warning when CONFIG_DEBUG_FS wasn't selected: arch/arm/mach-omap2/pm-debug.c:57: warning: 'pm_dbg_init' declared 'static' but never defined Signed-off-by: NSergio Aguirre <saaguirre@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Subramani Venkatesh 提交于
Currently, DSS does not wakeup when there is a DMA request. DSS wake up event must be enabled so that the DMA request to refill the FIFO will wake up the CORE domain. Signed-off-by: NSubramani Venkatesh <subramani.venkatesh@windriver.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Kevin Hilman 提交于
During suspend, the kernel timekeeping subsystem is shut down. Before suspend and upon resume, it uses a weak function read_persistent_clock() to determine the amount of time that elapsed during suspend. This function was not implemented on OMAP, so from the timekeeping subsystem perspective (and thus userspace as well) it appeared that no time elapsed during suspend. This patch uses the 32k sync timer as a the persistent clock. NOTE: This does *NOT* fully handle wrapping of the 32k sync timer, so more than one wrapping of the 32k sync timer during suspend may cause problems. Also note there are not interrupts when the 32k sync timer wraps, so something else has to be done. Reported-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Tero Kristo 提交于
Due to OMAP3 erratas 1.157, 1.185 the save of the last pad register (ETK_D14 and ETK_D15) can fail sometimes when there is simultaneous OCP access to the SCM register area. Fixed by writing the last register to the save area. Also, optimized the delay loop for the HW save to include an udelay(1), which limits the number of unnecessary HW accesses to SCM register area during the save. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Acked-by: NNishanth Menon <nm@ti.com> Reviewed-by: NAnand Gadiyar <gadiyar@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Roel Kluin 提交于
val is an u64 pointer, we need an int to check the error. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Peter Ujfalusi 提交于
Wake-up from McBSP ports are needed, especially when the THRESHOLD dma mode is in use for audio playback. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Manjunatha GK 提交于
The PM debug code fails to build on when CONFIG_DEBUG_FS is not enabled. Build error log: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm34xx.c:449: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/pm34xx.c:460: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/built-in.o: In function `configure_vc': arch/arm/mach-omap2/pm34xx.c:1237: undefined reference to `pm_dbg_regset_init' arch/arm/mach-omap2/pm34xx.c:1238: undefined reference to `pm_dbg_regset_init' make: *** [.tmp_vmlinux1] Error 1 This patch fixes the above errors. Kernel booting is tested on omap zoom2 and zoom3 boards. Signed-off-by: NManjunatha GK <manjugk@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sripathy, Vishwanath 提交于
As part of Core domain context restoration while coming out of off mode there are some registers being restored which are not required to be restored. ROM code will have restored them already. Overwriting some of them can have potential side effect. Eg: CM_CLKEN_PLL register should not be written while dpll is locked. Tested on OMAP 3430 SDP for suspend/resume and off mode with sleep_while_idle enabled. Signed-off-by: NVishwanath BS <vishwanath.bs@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Tero Kristo 提交于
Current value is stored on SDRAM and it is written back during wakeup. Previously a static value of 0x72 was written there. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Acked-by: NThara Gopinath <thara@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Tero Kristo 提交于
Previously used u32 as temporary data storage that wraps around at 4.294s. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Sanjeev Premi 提交于
This patch removes code blocks that are repeated in function prcm_setup_regs(). Signed-off-by: NSanjeev Premi <premi@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Tero Kristo 提交于
OMAP interrupt controller goes to unknown state when there is right combination of l3,l4 sleep/wake-up transitions, l4 autoidle in interrupt controller and some interrupt. When this happens, interrupts are not delivered to ARM anymore and ARM will remain in WFI (wait for interrupt) until interrupt controller is forced to wake-up (i.e. lauterbach). Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Tero Kristo 提交于
Enable the auto-idle feature of the SCM block to save some additional power. Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Tero Kristo 提交于
Suspending drivers may still generate interrupts just before their suspend is completed. Any pending interrupts here will prevent sleep. Signed-off-by: NTero Kristo <tero.kristo@nokia.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
-
由 Olof Johansson 提交于
Don't assume that gpmc_l3_clk is on, enable it before touching configuration registers. Note that the current code assumes that this clock is always enabled. We are already setting smart idle and L3 autogating for GPMC clock in gpmc_init. Signed-off-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Paul Walmsley 提交于
Commit 52650505 caused clock initialization to fail on OMAP1 with "BUG: spinlock lockup on CPU#0" -- this is because omap1_select_table_rate() and omap1_round_to_table_rate() call clk_get_rate() with the clockfw spinlock held. Fix by accessing the rate directly from the internal clock framework functions. Thanks to Tony Lindgren <tony@atomide.com> for reporting and testing the fix. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com>
-
由 Rajendra Nayak 提交于
For all DPLL's the valid dividers are same as the values to be programmed in the register. 0 is an invalid value. The changes are generated by updating the script which autogenerates the file modifed in the patch. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Rajendra Nayak 提交于
The CHIRONSS has its own local PRCM module and the register defines need to use the CHIRONSS base and not the PRM base. The changes are generated by updating the script which autogenerates the file modifed in the patch. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
- 20 1月, 2010 10 次提交
-
-
由 Roel Kluin 提交于
The same flag and bits were tested twice. Signed-off-by: NRoel Kluin <roel.kluin@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tony Lindgren 提交于
We need to set the omap_chip.oc carefully for the clocks to work. To fix this, set the omap_chip.oc in omap3_check_features() based on the CONTROL_IDCODE and silicon revision registers. Also add handling for 34xx es3.1.2 as es3.1 for now. Fixes booting on at least overo board. Based on an earlier patch by Paul Walmsley <paul@pwsan.com>. Signed-off-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tony Lindgren 提交于
Make the omap_mux_read and write available for board code, and rename omap_mux_set_board_signals into omap_mux_write_array. Also add the related prototypes and comments into mux.h. In some cases we want to change the signals dynamically, mostly for power management. Note that we cannot use the signal names as they are set __init to save memory. Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Tony Lindgren 提交于
Looks like cmdline muxing got broken at some point when we decided to limit muxing to __init code. Currently omap_mux_entry list is not yet initialized when we try to initialize cmdline muxing. Fix this by calling omap_mux_init_list() before calling omap_mux_set_cmdline_signals(). Reported-by: NPhilip Balister <philip@balister.org> Tested-by: NPhilip Balister <philip@balister.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Russell King 提交于
The first thing that omap2_init_clksel_parent() does is check for a non-zero .clksel field in the struct clk. Therefore, it is pointless calling this function on clocks where the clksel field is unset. Remove init calls to omap2_init_clksel_parent() on clocks without a clksel field. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Thara Gopinath 提交于
In the current implementation the sysconfig value is read into _sysc_cache once and an actual update to the sysconfig register happens only if the new value paased is differnt from the one in _sysc_cache. _sysc_cache is updated only if _HWMOD_SYSCONFIG_LOADED is not set. This can lead to the follwing issue if off mode is enabled in modules which employs "always-retore" mechanism of context save and restore. a. The module sets the sysconfig register through omap_device_enable. Here _sysc_cache is updated with the value written to the sysconfig register and left. b. The power domain containig the module enters off mode and the module context is lost. c. The module in use becomes active and calls omap_device_enable to enable itself. Here a read of sysconfig register does not happen as _HWMOD_SYSCONFIG_LOADED flag is set. The value to be written to the sysconfig register will be same as the one written in step a. Since _sysc_cache reflects the previous written value an update of the sysconfig register does not happen. This means in modules which employs "always-restore" mechanism after off , the sysconfig regsiters will never get updated. This patch introduces a flag SYSC_NO_CACHE which if set ensures that the sysconfig register is always read into _sysc_cache before an update is attempted. This flags need to be set only by modules which does not do a context save but re-initializes the registers every time the module is accessed. This includes modules like i2c, smartreflex etc. Signed-off-by: NThara Gopinath <thara@ti.com> [paul@pwsan.com: tweaked to apply on a different head, added flag comment] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
-
由 Tony Lindgren 提交于
The comments in cacheflush.h should follow what's in struct cpu_cache_fns. The comments for V6 and V7 are unnecessary. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Tony Lindgren 提交于
The comments in arm_machine_restart() suggest that cpu_proc_fin() will clean and disable cache and turn off interrupts. This does not seem to be implemented for proc-v7.S, implement it the same way as for proc-v6.S. This also makes kexec work for v7. Note that a related TLB and branch traget flush patch is also needed to avoid kexec "crc error". Note that there are still some issues that seem to be related to L2 cache being on and causing occasional uncompress "crc error" with kexec. Anyways, this gets kexec mostly working on V7 for now. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Tony Lindgren 提交于
We need to do that if we tinker with the MMU entries. This fixes the occasional bug with kexec where the new fails to uncompress with "crc error". Most likely at least kexec on v6 and v7 need this fix. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Tony Lindgren 提交于
Without this patch arch/arm/compressed/head.S defaults to generic DCC code that does not work for v7. For more information on the v7 DCC, see Cortex-A8 TRM "12.11.1 Debug communications channel". To use it with post 2.6.33-rc1 or later, you need to have: CONFIG_DEBUG_LL=y ONFIG_DEBUG_ICEDCC=y CONFIG_EARLY_PRINTK=y Earlier kernels need commit 93fd03a8 backported. Tested on omap3430. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
- 18 1月, 2010 2 次提交
-
-
由 Rabin Vincent 提交于
This reverts commit 14f0aa35. That commit was needed earlier because system call restarting for OABI (compat) required an executable stack and thus had problems with NX. Since ab72b007 ("ARM: Fix signal restart issues with NX and OABI compat") has reworked the code to not require an executable stack anymore, we can re-enable NX support for kernels with OABI (compat) support. Signed-off-by: NRabin Vincent <rabin@rab.in> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Tony Lindgren 提交于
Because of the include of the decompress_inflate.c file from boot/compress/misc.c, there are different flush() defines: In file included from arch/arm/boot/compressed/misc.c:249: arch/arm/boot/compressed/../../../../lib/decompress_inflate.c:138:29: error: macro "flush" passed 2 arguments, but takes just 0 Fix this by removing the define of flush() in misc.c for CONFIG_DEBUG_ICEDCC as it's already defined in mach/uncompress.h, and that is being included unconditionally. Also use a static inline function instead of define for mach-mxc and mach-gemini to avoid similar bug for those platforms. Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-