Describe the dynamic power coefficient of A57 and A53 CPUs.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Setup a thermal zone driven by SoC temperature sensor. Create passive trip
points and bind them to CPUFreq cooling device that supports power
extension.

Based on work by Dien Pham <dien.pham.ry@renesas.com> for r8a7796 SoC.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Set the capacity-dmips-mhz for RZ/G2M(r8a774a1) SoC, that is based on
dhrystone.

Based on work done by Gaku Inami <gaku.inami.xw@bp.renesas.com> for
r8a7796 SoC.

The average dhrystone result for 5 iterations is as below:

r8a774a1 SoC (CA57x2 + CA53x4)
  CPU   max-freq   dhrystone
  ---------------------------------
  CA57   1500 MHz  11428571 lps/s
  CA53   1200 MHz   5000000 lps/s

From this, CPU capacity-dmips-mhz for CA57 and CA53 are calculated
as follows:

r8a774a1 SoC
  CA57 : 1024 / (11428571 / 1500) * (11428571 / 1500) = 1024
  CA53 : 1024 / (11428571 / 1500) * ( 5000000 / 1200) =  560

Since each CPUs have different max frequencies, the final CPU
capacities of A53 scaled by the above difference is as below

$ cat /sys/devices/system/cpu/cpu*/cpu_capacity
1024
1024
448
448
448
448
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds the "cpu-map" into r8a774a1 composed of multi-cluster. This
definition is used to parse the cpu topology.

Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> for r8a7796 SoC.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Similarly to what done for the r8a7796 with commit 737e05bf
("arm64: dts: renesas: revise properties for R-Car Gen3 SoCs'
usb 2.0"), this patch lists the clock for the USB High-Speed Module
(HS-USB) with the USB2.0 Host (EHCI/OHCI) IP DT node, and it lists
the clock for the USB2.0 Host IP with the HS-USB module DT node.

Fixes: 4c2c2fb9 ("arm64: dts: renesas: r8a774a1: Add USB2.0 phy and host(EHCI/OHCI) device nodes")
Fixes: ed898d4f ("arm64: dts: renesas: r8a774a1: Add USB-DMAC and HSUSB device nodes")
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds TMU[01234] device tree nodes to the r8a774a1
SoC specific DT.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds the CMT[0123] device tree nodes to the
r8a774a1 SoC specific DT.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds PCIe{0,1} device nodes for R8A774A1 SoC.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The RZ/G2M (a.k.a. r8a774a1) comes with two clusters of
processors, similarly to the r8a7796.
The first cluster is made of A57s, the second cluster is
made of A53s.

The operating points for the cluster with the A57s are:

 Frequency | Voltage
-----------|---------
 500 MHz   | 0.82V
 1.0 GHz   | 0.82V
 1.5 GHz   | 0.82V

The operating points for the cluster with the A53s are:

 Frequency | Voltage
-----------|---------
 800 MHz   | 0.82V
 1.0 GHz   | 0.82V
 1.2 GHz   | 0.82V

This patch adds the definitions for the operating points
to the SoC specific DT.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NChris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Since the commit 233da2c9 ("dt-bindings: phy: rcar-gen3-phy-usb2:
Revise #phy-cells property") revised the #phy-cells, this patch follows
the updated document for R-Car Gen3 and RZ/A2 SoCs.
Signed-off-by: NYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add IPMMU-DS0 to the Ethernet-AVB device node.

Based on work by Magnus Damm for the r8a7795.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Hook up r8a774a1 Audio-DMAC nodes to the IPMMU-MP.

Based on work for the r8a7795 by Magnus Damm.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Hook up r8a774a1 DMAC nodes to the IPMMUs. In particular SYS-DMAC0
gets tied to IPMMU-DS0, and SYS-DMAC1 and SYS-DMAC2 get tied to IPMMU-DS1.

Based on work for the r8a7796 by Magnus Damm.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The r8a774a1 has a single FDP1 instance similar to r8a7796.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the DU device to r8a774a1.dtsi in a disabled state.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The r8a774a1 soc has 5 VSP instances similar to r8a7796.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

According to the latest information, clkp2 is available on RZ/G2.
Modify CAN0 and CAN1 nodes accordingly.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NChris Paterson <Chris.Paterson2@renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fallback on some
platforms. Remove it from those platforms.

This fixes warnings generated by the DT schema.
Reported-by: NMichal Simek <michal.simek@xilinx.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: NAntoine Tenart <antoine.tenart@bootlin.com>
Acked-by: NNishanth Menon <nm@ti.com>
Acked-by: NMaxime Ripard <maxime.ripard@bootlin.com>
Acked-by: NManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: NChanho Min <chanho.min@lge.com>
Acked-by: NKrzysztof Kozlowski <krzk@kernel.org>
Acked-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: NGregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: NThierry Reding <treding@nvidia.com>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>
Acked-by: NTero Kristo <t-kristo@ti.com>
Acked-by: NWei Xu <xuwei5@hisilicon.com>
Acked-by: NLiviu Dudau <liviu.dudau@arm.com>
Acked-by: NMatthias Brugger <matthias.bgg@gmail.com>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Acked-by: NScott Branden <scott.branden@broadcom.com>
Acked-by: NKevin Hilman <khilman@baylibre.com>
Acked-by: NChunyan Zhang <zhang.lyra@gmail.com>
Acked-by: NRobert Richter <rrichter@cavium.com>
Acked-by: NJisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: NDinh Nguyen <dinguyen@kernel.org>
Signed-off-by: NRob Herring <robh@kernel.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

HS-USB has registers outside the currently specified memory area,
therefore change the definition accordingly.

Fixes: ed898d4f ("arm64: dts: renesas: r8a774a1: Add USB-DMAC and HSUSB device nodes")
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NChris Paterson <Chris.Paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

SCIF2 on RZ/G2M can be used with both DMAC1 and DMAC2.

Fixes: 3a3933a4 ("arm64: dts: renesas: r8a774a1: Add SCIF and HSCIF nodes")
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Now that include/dt-bindings/clock/r8a774a1-cpg-mssr.h is in Linus'
master branch we can replace clock related magic numbers with the
corresponding labels.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
[simon: corrected whitespace]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Now that include/dt-bindings/power/r8a774a1-sysc.h is in Linus'
master branch we can replace power related magic numbers with
the corresponding labels.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add VIN and CSI-2 nodes to RZ/G2M SoC dtsi.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the device nodes for both RZ/G2M CAN channels.
Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

The thermal device is supposed to be always enabled.  As the default
value of the status property is "okay", there is no need to make this
explicit in SoC-specific .dtsi files where no override is involved.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
[simon: updated for a few new cases]
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add usb3.0 phy, host and function device nodes on RZ/G2M SoC dtsi.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add usb dmac and hsusb device nodes on RZ/G2M SoC dtsi.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add USB2.0 phy and host (EHCI/OHCI) device nodes on RZ/G2M SoC dtsi.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add FCPF and FCPV instances to the r8a774a1 dtsi, similarly
to what was done for the r8a7796 with commit 41dbbf0c
("arm64: dts: r8a7796: Add FCPF and FCPV instances"),
commit 69490bc9 ("arm64: dts: renesas: r8a7796: Point
FDP1 via FCPF to IPMMU-VI0"), and commit cef942d0 ("arm64:
dts: renesas: r8a7796: Point VSPI via FCPVI to IPMMU-VC0").
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add sound support for the RZ/G2M SoC (a.k.a. R8A774A1).

This work is based on similar work done on the R8A7796 SoC
by Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds PWM[0123456] device nodes to the RZ/G2M (a.k.a R8A774A1)
device tree.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds definitions for L2 cache for the Cortex-A53 CPU
cores (512 KiB in size, organized as 32 KiB x 16 ways), adds
Cortex-A53 CPU cores (setting a total of 6 cores, 2 x Cortex-A57
+ 4 x Cortex-A53), and finally enables the performance monitor
unit for the Cortex-A53 cores on the R8A774A1 SoC.

Based on work done for r8a7796 SoC.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the device nodes for all MSIOF SPI controllers on RZ/G2M SoC.

Based on several similar patches of the R8A7796 device tree
by Geert Uytterhoeven <geert+renesas@glider.be>
and Simon Horman <horms+renesas@verge.net.au>.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add r8a774a1 IPMMU nodes.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add thermal support for R8A774A1 (RZ/G2M) SoC.

Based on the work done for r8a7796 SoC.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add the I2C[0-6] and IIC Bus Interface for DVFS (IIC for DVFS)
devices nodes to the r8a774a1 device tree.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add SDHI nodes to the DT of the r8a774a1 SoC.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

Add GPIO device nodes to the DT of the r8a774a1 SoC.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>

This patch adds pinctrl device node for R8A774A1 SoC.
Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NBiju Das <biju.das@bp.renesas.com>
Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>