- 22 3月, 2022 1 次提交
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由 Atish Patra 提交于
The current perf implementation in RISC-V is not very useful as it can not count any events other than cycle/instructions. Moreover, perf record can not be used or the events can not be started or stopped. Remove the implementation now for a better platform driver in future that will implement most of the missing functionality. Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NAtish Patra <atish.patra@wdc.com> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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- 18 3月, 2022 6 次提交
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由 Atish Patra 提交于
Currently, the /proc/cpuinfo outputs the entire riscv,isa string which is not ideal when we have multiple ISA extensions present in the ISA string. Some of them may not be enabled in kernel as well. Same goes for the single letter extensions as well which prints the entire ISA string. Some of they may not be valid ISA extensions as well (e.g 'su') Parse only the valid & enabled ISA extension and print them. Tested-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Atish Patra 提交于
The isa string should begin with either rv64 or rv32. Otherwise, it is an incorrect isa string. Currently, the string parsing continues even if it doesnot begin with current XLEN. Fix this by checking if it found "rv64" or "rv32" in the beginning. Tested-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Atish Patra 提交于
Multi-letter extensions can be probed using exising riscv_isa_extension_available API now. It doesn't support versioning right now as there is no use case for it. Individual extension specific implementation will be added during each extension support. Tested-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Tsukasa OI 提交于
Currently, there is no usage for version numbers in extensions as any ratified non base ISA extension will always at v1.0. Extract the extension names in place for future parsing. Tested-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NTsukasa OI <research_trasio@irq.a4lg.com> [Improved commit text and comments] Signed-off-by: NAtish Patra <atishp@rivosinc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Tsukasa OI 提交于
Current hart ISA ("riscv,isa") parser don't correctly parse: 1. Multi-letter extensions 2. Version numbers All ISA extensions ratified recently has multi-letter extensions (except 'H'). The current "riscv,isa" parser that is easily confused by multi-letter extensions and "p" in version numbers can be a huge problem for adding new extensions through the device tree. Leaving it would create incompatible hacks and would make "riscv,isa" value unreliable. This commit implements minimal parser for "riscv,isa" strings. With this, we can safely ignore multi-letter extensions and version numbers. [Improved commit text and fixed a bug around 's' in base extension] Signed-off-by: NAtish Patra <atishp@rivosinc.com> [Fixed workaround for QEMU] Signed-off-by: NTsukasa OI <research_trasio@irq.a4lg.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com> -
由 Tsukasa OI 提交于
This commit replaces BITS_PER_LONG with number of alphabet letters. Current ISA pretty-printing code expects extension 'a' (bit 0) through 'z' (bit 25). Although bit 26 and higher is not currently used (thus never cause an issue in practice), it will be an annoying problem if we start to use those in the future. This commit disables printing high bits for now. Reviewed-by: NAnup Patel <anup@brainfault.org> Tested-by: NHeiko Stuebner <heiko@sntech.de> Signed-off-by: NTsukasa OI <research_trasio@irq.a4lg.com> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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- 21 1月, 2022 10 次提交
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由 Palmer Dabbelt 提交于
Our nommu_virt_defconfig set SLOB=y and SLAB_MERGE_DEFAULT=n. As of eb52c0fc ("mm: Make SLAB_MERGE_DEFAULT depend on SL[AU]B") it's no longer necessary to set the second, which appears to never have had any effect for SLOB=y anyway. This was suggested by savedefconfig. Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Minghao Chi 提交于
Return value from user_regset_copyin() directly instead of taking this in another redundant variable. Reported-by: NZeal Robot <zealci@zte.com.cn> Signed-off-by: NMinghao Chi <chi.minghao@zte.com.cn> Signed-off-by: NCGEL ZTE <cgel.zte@gmail.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Ron Economos 提交于
Some of the GPIO pins on the Unmatched are wire up to control the power of the board, indicate that in the device tree. Signed-off-by: NRon Economos <w6rz@comcast.net> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Atish Patra 提交于
Currently, SBI APIs accept a hartmask that is generated from struct cpumask. Cpumask data structure can hold upto NR_CPUs value. Thus, it is not the correct data structure for hartids as it can be higher than NR_CPUs for platforms with sparse or discontguous hartids. Remove all association between hartid mask and struct cpumask. Reviewed-by: Anup Patel <anup@brainfault.org> (For Linux RISC-V changes) Acked-by: Anup Patel <anup@brainfault.org> (For KVM RISC-V changes) Signed-off-by: NAtish Patra <atishp@rivosinc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Atish Patra 提交于
The spinwait booting method should only be used for platforms with older firmware without SBI HSM extension or M-mode firmware because spinwait method can't support cpu hotplug, kexec or sparse hartid. It is better to move the entire spinwait implementation to its own config which can be disabled if required. It is enabled by default to maintain backward compatibility and M-mode Linux. Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Atish Patra 提交于
The booting hart selection via lottery is only useful for SMP systems. Moreover, the lottery selection is only necessary for systems using spinwait booting method. It is better to keep the entire lottery selection together so that it can be disabled in future. Move the lottery selection code to under CONFIG_SMP. Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Atish Patra 提交于
The __cpu_up_stack/task_pointer array is only used for spinwait method now. The per cpu array based lookup is also fragile for platforms with discontiguous/sparse hartids. The spinwait method is only used for M-mode Linux or older firmwares without SBI HSM extension. For general Linux systems, ordered booting method is preferred anyways to support cpu hotplug and kexec. Make sure that __cpu_up_stack/task_pointer is only used for spinwait method. Take this opportunity to rename it to __cpu_spinwait_stack/task_pointer to emphasize the purpose as well. Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Atish Patra 提交于
The HSM extension information log also prints the SBI version v0.2. This is misleading as the underlying firmware SBI version may be different from v0.2. Remove the unncessary printing of SBI version. Signed-off-by: NAtish Patra <atishp@rivosinc.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Atish Patra 提交于
Currently both order booting and spinwait approach uses a per cpu array to update stack & task pointer. This approach will not work for the following cases. 1. If NR_CPUs are configured to be less than highest hart id. 2. A platform has sparse hartid. This issue can be fixed for ordered booting as the booting cpu brings up one cpu at a time using SBI HSM extension which has opaque parameter that is unused until now. Introduce a common secondary boot data structure that can store the stack and task pointer. Secondary harts will use this data while booting up to setup the sp & tp. Reviewed-by: NAnup Patel <anup@brainfault.org> Signed-off-by: NAtish Patra <atishp@rivosinc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Heinrich Schuchardt 提交于
The SBI 0.1 specification is obsolete. The current version is 0.3. Hence we should not rely by default on SBI 0.1 being implemented. Signed-off-by: NHeinrich Schuchardt <heinrich.schuchardt@canonical.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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- 20 1月, 2022 16 次提交
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由 Kefeng Wang 提交于
Patch series "mm: percpu: Cleanup percpu first chunk function". When supporting page mapping percpu first chunk allocator on arm64, we found there are lots of duplicated codes in percpu embed/page first chunk allocator. This patchset is aimed to cleanup them and should no function change. The currently supported status about 'embed' and 'page' in Archs shows below, embed: NEED_PER_CPU_PAGE_FIRST_CHUNK page: NEED_PER_CPU_EMBED_FIRST_CHUNK embed page ------------------------ arm64 Y Y mips Y N powerpc Y Y riscv Y N sparc Y Y x86 Y Y ------------------------ There are two interfaces about percpu first chunk allocator, extern int __init pcpu_embed_first_chunk(size_t reserved_size, size_t dyn_size, size_t atom_size, pcpu_fc_cpu_distance_fn_t cpu_distance_fn, - pcpu_fc_alloc_fn_t alloc_fn, - pcpu_fc_free_fn_t free_fn); + pcpu_fc_cpu_to_node_fn_t cpu_to_nd_fn); extern int __init pcpu_page_first_chunk(size_t reserved_size, - pcpu_fc_alloc_fn_t alloc_fn, - pcpu_fc_free_fn_t free_fn, - pcpu_fc_populate_pte_fn_t populate_pte_fn); + pcpu_fc_cpu_to_node_fn_t cpu_to_nd_fn); The pcpu_fc_alloc_fn_t/pcpu_fc_free_fn_t is killed, we provide generic pcpu_fc_alloc() and pcpu_fc_free() function, which are called in the pcpu_embed/page_first_chunk(). 1) For pcpu_embed_first_chunk(), pcpu_fc_cpu_to_node_fn_t is needed to be provided when archs supported NUMA. 2) For pcpu_page_first_chunk(), the pcpu_fc_populate_pte_fn_t is killed too, a generic pcpu_populate_pte() which marked '__weak' is provided, if you need a different function to populate pte on the arch(like x86), please provide its own implementation. [1] https://github.com/kevin78/linux.git percpu-cleanup This patch (of 4): The HAVE_SETUP_PER_CPU_AREA/NEED_PER_CPU_EMBED_FIRST_CHUNK/ NEED_PER_CPU_PAGE_FIRST_CHUNK/USE_PERCPU_NUMA_NODE_ID configs, which have duplicate definitions on platforms that subscribe it. Move them into mm, drop these redundant definitions and instead just select it on applicable platforms. Link: https://lkml.kernel.org/r/20211216112359.103822-1-wangkefeng.wang@huawei.com Link: https://lkml.kernel.org/r/20211216112359.103822-2-wangkefeng.wang@huawei.comSigned-off-by: NKefeng Wang <wangkefeng.wang@huawei.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> [arm64] Cc: Will Deacon <will@kernel.org> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Christoph Lameter <cl@linux.com> Cc: Dennis Zhou <dennis@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: "Rafael J. Wysocki" <rafael@kernel.org> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org> -
由 kernel test robot 提交于
arch/riscv/mm/init.c:48:11-16: WARNING: conversion to bool not needed here Remove unneeded conversion to bool Semantic patch information: Relational and logical operators evaluate to bool, explicit conversion is overly verbose and unneeded. Generated by: scripts/coccinelle/misc/boolconv.cocci Reported-by: Nkernel test robot <lkp@intel.com> Signed-off-by: Nkernel test robot <lkp@intel.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Alexandre Ghiti 提交于
Define precisely the size of the user accessible virtual space size for sv32/39/48 mmu types and explain why the whole virtual address space is split into 2 equal chunks between kernel and user space. Signed-off-by: NAlexandre Ghiti <alexandre.ghiti@canonical.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Reviewed-by: NPalmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Alexandre Ghiti 提交于
Now that the mmu type is determined at runtime using SATP characteristic, use the global variable pgtable_l4_enabled to output mmu type of the processor through /proc/cpuinfo instead of relying on device tree infos. Signed-off-by: NAlexandre Ghiti <alexandre.ghiti@canonical.com> Reviewed-by: NAnup Patel <anup@brainfault.org> Reviewed-by: NPalmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Alexandre Ghiti 提交于
By adding a new 4th level of page table, give the possibility to 64bit kernel to address 2^48 bytes of virtual address: in practice, that offers 128TB of virtual address space to userspace and allows up to 64TB of physical memory. If the underlying hardware does not support sv48, we will automatically fallback to a standard 3-level page table by folding the new PUD level into PGDIR level. In order to detect HW capabilities at runtime, we use SATP feature that ignores writes with an unsupported mode. Signed-off-by: NAlexandre Ghiti <alexandre.ghiti@canonical.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Alexandre Ghiti 提交于
With 4-level page table folding at runtime, we don't know at compile time the size of the virtual address space so we must set VA_BITS dynamically so that sparsemem reserves the right amount of memory for struct pages. Signed-off-by: NAlexandre Ghiti <alexandre.ghiti@canonical.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Alexandre Ghiti 提交于
This simply gathers the different pt_ops initialization in functions where a comment was added to explain why the page table operations must be changed along the boot process. Signed-off-by: NAlexandre Ghiti <alexandre.ghiti@canonical.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Alexandre Ghiti 提交于
Now that kasan shadow region is next to the kernel, for sv48, this region won't be aligned on PGDIR_SIZE and then when populating this region, we'll need to get down to lower levels of the page table. So instead of reimplementing the page table walk for the early population, take advantage of the existing functions used for the final population. Note that kasan swapper initialization must also be split since memblock is not initialized at this point and as the last PGD is shared with the kernel, we'd need to allocate a PUD so postpone the kasan final population after the kernel population is done. Signed-off-by: NAlexandre Ghiti <alexandre.ghiti@canonical.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Alexandre Ghiti 提交于
Now that KASAN_SHADOW_OFFSET is defined at compile time as a config, this value must remain constant whatever the size of the virtual address space, which is only possible by pushing this region at the end of the address space next to the kernel mapping. Signed-off-by: NAlexandre Ghiti <alexandre.ghiti@canonical.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Alexandre Ghiti 提交于
CONFIG_MAXPHYSMEM_* are actually never used, even the nommu defconfigs selecting the MAXPHYSMEM_2GB had no effects on PAGE_OFFSET since it was preempted by !MMU case right before. In addition, the move of the kernel mapping at the end of the address space broke the use of MAXPHYSMEM_2G with MMU since it defines PAGE_OFFSET at the same address as the kernel mapping. Reported-by: NGeert Uytterhoeven <geert@linux-m68k.org> Fixes: 2bfc6cd8 ("riscv: Move kernel mapping outside of linear mapping") Signed-off-by: NAlexandre Ghiti <alexandre.ghiti@canonical.com> Tested-by: NGeert Uytterhoeven <geert@linux-m68k.org> Tested-by: NConor Dooley <Conor.Dooley@microchip.com> Cc: stable@vger.kernel.org Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Jisheng Zhang 提交于
eBPF's exception tables needs to be modified to relative synchronously. Suggested-by: NTong Tiangen <tongtiangen@huawei.com> Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Fixes: 1f77ed94 ("riscv: switch to relative extable and other improvements") Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Jisheng Zhang 提交于
Currently, the #ifdef CONFIG_XIP_KERNEL usage can be divided into the following three types: The first one is for functions/declarations only used in XIP case. The second one is for XIP_FIXUP case. Something as below: |foo_type foo; |#ifdef CONFIG_XIP_KERNEL |#define foo (*(foo_type *)XIP_FIXUP(&foo)) |#endif Usually, it's better to let the foo macro sit with the foo var together. But if various foos are defined adjacently, we can save some #ifdef CONFIG_XIP_KERNEL usage by grouping them together. The third one is for different implementations for XIP, usually, this is a #ifdef...#else...#endif case. This patch moves the pt_ops macro to adjacent #ifdef CONFIG_XIP_KERNEL and group first type usage cases into one. Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Reviewed-by: NAlexandre Ghiti <alex@ghiti.fr> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Jisheng Zhang 提交于
Try our best to replace the conditional compilation using "#ifdef CONFIG_XIP_KERNEL" with "IS_ENABLED(CONFIG_XIP_KERNEL)", to simplify the code and to increase compile coverage. Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Reviewed-by: NAlexandre Ghiti <alex@ghiti.fr> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Jisheng Zhang 提交于
Except "pt_ops", other global vars when CONFIG_XIP_KERNEL=y is defined as below: |foo_type foo; |#ifdef CONFIG_XIP_KERNEL |#define foo (*(foo_type *)XIP_FIXUP(&foo)) |#endif Follow the same way for pt_ops to unify the style and to simplify code. Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Reviewed-by: NAlexandre Ghiti <alex@ghiti.fr> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Jisheng Zhang 提交于
Try our best to replace the conditional compilation using "#ifdef CONFIG_64BIT" by a check for "IS_ENABLED(CONFIG_64BIT)", to simplify the code and to increase compile coverage. Now we can also remove the __maybe_unused used in max_mapped_addr declaration. We also remove the BUG_ON check of mapping the last 4K bytes of the addressable memory since this is always true for every kernel actually. Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Reviewed-by: NAlexandre Ghiti <alex@ghiti.fr> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Jisheng Zhang 提交于
The is_kdump_kernel() returns false for !CRASH_DUMP case, so we don't need the #ifdef CONFIG_CRASH_DUMP for is_kdump_kernel() checking. Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Reviewed-by: NAlexandre Ghiti <alex@ghiti.fr> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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- 16 1月, 2022 1 次提交
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由 Yury Norov 提交于
find_bit API and bitmap API are closely related, but inclusion paths are different - include/asm-generic and include/linux, correspondingly. In the past it made a lot of troubles due to circular dependencies and/or undefined symbols. Fix this by moving find.h under include/linux. Signed-off-by: NYury Norov <yury.norov@gmail.com> Tested-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
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- 15 1月, 2022 1 次提交
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由 Qi Zheng 提交于
Since commit 4064b982 ("mm: allow VM_FAULT_RETRY for multiple times") allowed VM_FAULT_RETRY for multiple times, the FAULT_FLAG_ALLOW_RETRY bit of fault_flag will not be changed in the page fault path, so the following check is no longer needed: flags & FAULT_FLAG_ALLOW_RETRY So just remove it. [akpm@linux-foundation.org: coding style fixes] Link: https://lkml.kernel.org/r/20211110123358.36511-1-zhengqi.arch@bytedance.comSigned-off-by: NQi Zheng <zhengqi.arch@bytedance.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: David Hildenbrand <david@redhat.com> Cc: Kirill Shutemov <kirill@shutemov.name> Cc: Peter Xu <peterx@redhat.com> Cc: Muchun Song <songmuchun@bytedance.com> Cc: Chengming Zhou <zhouchengming@bytedance.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 12 1月, 2022 1 次提交
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由 Anup Patel 提交于
The SBI SRST extension provides a standard way to poweroff and reboot the system irrespective to whether Linux RISC-V S-mode is running natively (HS-mode) or inside Guest/VM (VS-mode). The SBI SRST extension is available in the SBI v0.3 specification. (Refer, https://github.com/riscv/riscv-sbi-doc/releases/tag/v0.3.0-rc1) This patch extends Linux RISC-V SBI implementation to detect and use SBI SRST extension. Signed-off-by: NAnup Patel <anup.patel@wdc.com> Reviewed-by: NAtish Patra <atish.patra@wdc.com> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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- 10 1月, 2022 4 次提交
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由 Jisheng Zhang 提交于
Currently, if 64BIT and !XIP_KERNEL, the phys_ram_base is always 0, no matter the real start of dram reported by memblock is. Fixes: 6d7f91d9 ("riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion") Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Reviewed-by: NAlexandre Ghiti <alex@ghiti.fr> Cc: stable@vger.kernel.org Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Sean Christopherson 提交于
Use what is currently the SMP=y version of riscv_cpuid_to_hartid_mask() for both SMP=y and SMP=n to fix a build failure with KVM=m and SMP=n due to boot_cpu_hartid not being exported. This also fixes a second bug where the SMP=n version assumes the sole CPU in the system is in the incoming mask, which may not hold true in kvm_riscv_vcpu_sbi_ecall() if the KVM guest VM has multiple vCPUs (on a SMP=n system). Fixes: 1ef46c23 ("RISC-V: Implement new SBI v0.2 extensions") Reported-by: NAdam Borowski <kilobyte@angband.pl> Reviewed-by: NAnup Patel <anup.patel@wdc.com> Signed-off-by: NSean Christopherson <seanjc@google.com> Cc: stable@vger.kernel.org Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Jisheng Zhang 提交于
After commit 83e7b876 ("RISC-V: move empty_zero_page definition to C and export it"), the empty_zero_page has been moved outside head.S, the __PAGE_ALIGNED_BSS and .balign LoCs are useless, clean up them. Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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由 Jisheng Zhang 提交于
The function pointer vendor_patch_func is only used during init, so mark it as __initdata. Signed-off-by: NJisheng Zhang <jszhang@kernel.org> Signed-off-by: NPalmer Dabbelt <palmer@rivosinc.com>
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