1. 07 11月, 2019 1 次提交
  2. 06 7月, 2019 1 次提交
    • D
      i2c: tegra: Add Dmitry as a reviewer · f3a3ea28
      Dmitry Osipenko 提交于
      I'm contributing to Tegra's upstream development in general and happened
      to review the Tegra's I2C patches for awhile because I'm actively using
      upstream kernel on all of my Tegra-powered devices and initially some of
      the submitted patches were getting my attention since they were causing
      problems. Recently Wolfram Sang asked whether I'm interested in becoming
      a reviewer for the driver and I don't mind at all.
      Signed-off-by: NDmitry Osipenko <digetx@gmail.com>
      [wsa: ack was expressed by Thierry Reding in a mail thread]
      Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
      f3a3ea28
  3. 03 7月, 2019 3 次提交
    • M
      docs: extcon: convert it to ReST and move to ACPI dir · 5d8cbf71
      Mauro Carvalho Chehab 提交于
      The intel-int3496.txt file is a documentation for an ACPI driver.
      
      There's no reason to keep it on a separate directory.
      
      So, instead of keeping it on some random location, move it
      to a sub-directory inside the ACPI documentation dir,
      renaming it to .rst.
      Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>
      Acked-by: NChanwoo Choi <cw00.choi@samsung.com>
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      5d8cbf71
    • M
      clocksource/drivers: Make Hyper-V clocksource ISA agnostic · fd1fea68
      Michael Kelley 提交于
      Hyper-V clock/timer code and data structures are currently mixed
      in with other code in the ISA independent drivers/hv directory as
      well as the ISA dependent Hyper-V code under arch/x86.
      
      Consolidate this code and data structures into a Hyper-V clocksource driver
      to better follow the Linux model. In doing so, separate out the ISA
      dependent portions so the new clocksource driver works for x86 and for the
      in-process Hyper-V on ARM64 code.
      
      To start, move the existing clockevents code to create the new clocksource
      driver. Update the VMbus driver to call initialization and cleanup routines
      since the Hyper-V synthetic timers are not independently enumerated in
      ACPI.
      
      No behavior is changed and no new functionality is added.
      Suggested-by: NMarc Zyngier <marc.zyngier@arm.com>
      Signed-off-by: NMichael Kelley <mikelley@microsoft.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Reviewed-by: NVitaly Kuznetsov <vkuznets@redhat.com>
      Cc: "bp@alien8.de" <bp@alien8.de>
      Cc: "will.deacon@arm.com" <will.deacon@arm.com>
      Cc: "catalin.marinas@arm.com" <catalin.marinas@arm.com>
      Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>
      Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>
      Cc: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>
      Cc: "linux-hyperv@vger.kernel.org" <linux-hyperv@vger.kernel.org>
      Cc: "olaf@aepfle.de" <olaf@aepfle.de>
      Cc: "apw@canonical.com" <apw@canonical.com>
      Cc: "jasowang@redhat.com" <jasowang@redhat.com>
      Cc: "marcelo.cerri@canonical.com" <marcelo.cerri@canonical.com>
      Cc: Sunil Muthuswamy <sunilmut@microsoft.com>
      Cc: KY Srinivasan <kys@microsoft.com>
      Cc: "sashal@kernel.org" <sashal@kernel.org>
      Cc: "vincenzo.frascino@arm.com" <vincenzo.frascino@arm.com>
      Cc: "linux-arch@vger.kernel.org" <linux-arch@vger.kernel.org>
      Cc: "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>
      Cc: "linux-kselftest@vger.kernel.org" <linux-kselftest@vger.kernel.org>
      Cc: "arnd@arndb.de" <arnd@arndb.de>
      Cc: "linux@armlinux.org.uk" <linux@armlinux.org.uk>
      Cc: "ralf@linux-mips.org" <ralf@linux-mips.org>
      Cc: "paul.burton@mips.com" <paul.burton@mips.com>
      Cc: "daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>
      Cc: "salyzyn@android.com" <salyzyn@android.com>
      Cc: "pcc@google.com" <pcc@google.com>
      Cc: "shuah@kernel.org" <shuah@kernel.org>
      Cc: "0x7f454c46@gmail.com" <0x7f454c46@gmail.com>
      Cc: "linux@rasmusvillemoes.dk" <linux@rasmusvillemoes.dk>
      Cc: "huw@codeweavers.com" <huw@codeweavers.com>
      Cc: "sfr@canb.auug.org.au" <sfr@canb.auug.org.au>
      Cc: "pbonzini@redhat.com" <pbonzini@redhat.com>
      Cc: "rkrcmar@redhat.com" <rkrcmar@redhat.com>
      Cc: "kvm@vger.kernel.org" <kvm@vger.kernel.org>
      Link: https://lkml.kernel.org/r/1561955054-1838-2-git-send-email-mikelley@microsoft.com
      fd1fea68
    • T
      irqchip/al-fic: Introduce Amazon's Annapurna Labs Fabric Interrupt Controller Driver · 1eb77c3b
      Talel Shenhar 提交于
      The Amazon's Annapurna Labs Fabric Interrupt Controller has 32 inputs.
      A FIC (Fabric Interrupt Controller) may be cascaded into another FIC or
      directly to the main CPU Interrupt Controller (e.g. GIC).
      Signed-off-by: NTalel Shenhar <talel@amazon.com>
      Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      1eb77c3b
  4. 29 6月, 2019 2 次提交
  5. 28 6月, 2019 1 次提交
  6. 26 6月, 2019 1 次提交
    • T
      MAINTAINERS: Add entry for the generic VDSO library · e7098031
      Thomas Gleixner 提交于
      
      Assign the following folks in alphabetic order:
      
       - Andy for being the VDSO wizard of x86 and in general. He's also the
         performance monitor of choice and the code in the generic library is
         heavily influenced by his previous x86 VDSO work.
      
       - Thomas for being the dude who has to deal with any form of time(r)
         nonsense anyway
      
       - Vincenzo for being the poor sod who went through all the different
         architecture implementations in order to unify them. A lot of knowledge
         gained from VDSO implementation details to the intricacies of taming the
         build system.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Vincenzo Frascino <vincenzo.frascino@arm.com>
      Cc: linux-arch@vger.kernel.org
      Cc: LAK <linux-arm-kernel@lists.infradead.org>
      Cc: linux-mips@vger.kernel.org
      Cc: linux-kselftest@vger.kernel.org
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
      Cc: Mark Salyzyn <salyzyn@android.com>
      Cc: Peter Collingbourne <pcc@google.com>
      Cc: Shuah Khan <shuah@kernel.org>
      Cc: Dmitry Safonov <0x7f454c46@gmail.com>
      Cc: Rasmus Villemoes <linux@rasmusvillemoes.dk>
      Cc: Huw Davies <huw@codeweavers.com>
      Cc: Shijith Thotton <sthotton@marvell.com>
      Cc: Andre Przywara <andre.przywara@arm.com>
      Cc: Dmitry Safonov <dima@arista.com>
      Cc: Andrei Vagin <avagin@openvz.org>
      Cc: Linus Torvalds <torvalds@linux-foundation.org>
      Cc: Andy Lutomirski <luto@kernel.org>
      Cc: Michael Kelley <mikelley@microsoft.com>
      Cc: Sasha Levin <sashal@kernel.org>
      Link: https://lkml.kernel.org/r/alpine.DEB.2.21.1906240142000.32342@nanos.tec.linutronix.de
      e7098031
  7. 25 6月, 2019 2 次提交
  8. 22 6月, 2019 3 次提交
  9. 21 6月, 2019 1 次提交
    • Y
      EDAC/sifive: Add EDAC platform driver for SiFive SoCs · 91abaeaa
      Yash Shah 提交于
      Add an EDAC driver for SiFive SoCs. The initial version supports ECC
      event monitoring and reporting through the EDAC framework for the SiFive
      L2 cache controller. It registers for notifier events from the L2 cache
      controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events.
      
       [ bp: Massage commit message. ]
      Signed-off-by: NYash Shah <yash.shah@sifive.com>
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      Reviewed-by: NJames Morse <james.morse@arm.com>
      Cc: Albert Ou <aou@eecs.berkeley.edu>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: linux-edac <linux-edac@vger.kernel.org>
      Cc: linux-riscv@lists.infradead.org
      Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
      Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: "Paul E. McKenney" <paulmck@linux.ibm.com>
      Cc: Paul Walmsley <paul.walmsley@sifive.com>
      Cc: sachin.ghadi@sifive.com
      Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com
      91abaeaa
  10. 20 6月, 2019 5 次提交
  11. 19 6月, 2019 1 次提交
  12. 18 6月, 2019 1 次提交
  13. 17 6月, 2019 3 次提交
  14. 15 6月, 2019 1 次提交
  15. 13 6月, 2019 1 次提交
  16. 12 6月, 2019 4 次提交
  17. 11 6月, 2019 2 次提交
  18. 08 6月, 2019 2 次提交
  19. 06 6月, 2019 1 次提交
  20. 04 6月, 2019 2 次提交
  21. 03 6月, 2019 1 次提交
  22. 01 6月, 2019 1 次提交