- 08 2月, 2007 1 次提交
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由 Andrew Victor 提交于
Now that Linux includes support for the Atmel AT91SAM9260 and AT91SAM9261 processors in addition to the original Atmel AT91RM9200 (with support for more AT91 processors pending), the "mach-at91rm9200" and "arch-at91rm9200" directories should be renamed to indicate their more generic nature. The following git commands should be run BEFORE applying this patch: git-mv arch/arm/mach-at91rm9200 arch/arm/mach-at91 git-mv include/asm-arm/arch-at91rm9200 include/asm-arm/arch-at91 Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 14 12月, 2006 1 次提交
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由 Pavel Pisa 提交于
Support to change MX1 CPU frequency at runtime. Tested on PiKRON's PiMX1 board and seems to be fully stable up to 200 MHz end even as low as 8 MHz. Signed-off-by: NPavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 12月, 2006 1 次提交
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由 Sascha Hauer 提交于
HID drivers are in their own directory now, so we have to include the Kconfig file for arm. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 12月, 2006 1 次提交
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由 David Howells 提交于
This facility provides three entry points: ilog2() Log base 2 of unsigned long ilog2_u32() Log base 2 of u32 ilog2_u64() Log base 2 of u64 These facilities can either be used inside functions on dynamic data: int do_something(long q) { ...; y = ilog2(x) ...; } Or can be used to statically initialise global variables with constant values: unsigned n = ilog2(27); When performing static initialisation, the compiler will report "error: initializer element is not constant" if asked to take a log of zero or of something not reducible to a constant. They treat negative numbers as unsigned. When not dealing with a constant, they fall back to using fls() which permits them to use arch-specific log calculation instructions - such as BSR on x86/x86_64 or SCAN on FRV - if available. [akpm@osdl.org: MMC fix] Signed-off-by: NDavid Howells <dhowells@redhat.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Herbert Xu <herbert@gondor.apana.org.au> Cc: David Howells <dhowells@redhat.com> Cc: Wojtek Kaniewski <wojtekka@toxygen.net> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 08 12月, 2006 1 次提交
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由 Dan Williams 提交于
The iop348 processor integrates an Xscale (XSC3 512KB L2 Cache) core with a Serial Attached SCSI (SAS) controller, multi-ported DDR2 memory controller, 3 Application Direct Memory Access (DMA) controllers, a 133Mhz PCI-X interface, a x8 PCI-Express interface, and other peripherals to form a system-on-a-chip RAID subsystem engine. The iop342 processor replaces the SAS controller with a second Xscale core for dual core embedded applications. The iop341 processor is the single core version of iop342. This patch supports the two Intel customer reference platforms iq81340mc for external storage and iq81340sc for direct attach (HBA) development. The developer's manual is available here: ftp://download.intel.com/design/iio/docs/31503701.pdf Changelog: * removed virtual addresses from resource definitions * cleaned up some unnecessary #include's Signed-off-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 04 12月, 2006 1 次提交
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由 Lennert Buytenhek 提交于
XScale cores either have a DSP coprocessor (which contains a single 40 bit accumulator register), or an iWMMXt coprocessor (which contains eight 64 bit registers.) Because of the small amount of state in the DSP coprocessor, access to the DSP coprocessor (CP0) is always enabled, and DSP context switching is done unconditionally on every task switch. Access to the iWMMXt coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is first issued, and iWMMXt context switching is done lazily. CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will have iWMMXt support', but boards are supposed to select this config symbol by hand, and at least one pxa27x board doesn't get this right, so on that board, proc-xscale.S will incorrectly assume that we have a DSP coprocessor, enable CP0 on boot, and we will then only save the first iWMMXt register (wR0) on context switches, which is Bad. This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on might have iWMMXt support, and we will enable iWMMXt context switching if it does.' This means that with this patch, running a CONFIG_IWMMXT=n kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt state over context switches, and running a CONFIG_IWMMXT=y kernel on a non-iWMMXt capable CPU will still do DSP context save/restore. These changes should make iWMMXt work on PXA3xx, and as a side effect, enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined), as well as setting and using HWCAP_IWMMXT properly. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Acked-by: NDan Williams <dan.j.williams@intel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 02 12月, 2006 1 次提交
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由 Andrew Victor 提交于
A number of configuration file changes. These are mainly to replace references to ARCH_AT91RM9200 and ARCH_AT91SAM9261 with the common/generic ARCH_AT91. That way we don't need to mention every specific AT91 processor explicitly. Also adds the configuration option for AT91SAM9260-EK and AT91SAM9261-EK boards. Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 11月, 2006 1 次提交
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由 Martin Michlmayr 提交于
ARM doesn't source drivers/Kconfig like most architectures do, so the newly added drivers/ata is currently not made available on ARM. SATA is used on some ARM machines, like the Thecus N2100, so we need to source drivers/ata/Kconfig. Signed-off-by: NMartin Michlmayr <tbm@cyrius.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 04 10月, 2006 1 次提交
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由 Matt LaPlante 提交于
Randy brought it to my attention that in proper english "can not" should always be written "cannot". I donot see any reason to argue, even if I mightnot understand why this rule exists. This patch fixes "can not" in several Documentation files as well as three Kconfigs. Signed-off-by: NMatt LaPlante <kernel1@cyberdogtech.com> Acked-by: NRandy Dunlap <rdunlap@xenotime.net> Signed-off-by: NAdrian Bunk <bunk@stusta.de>
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- 29 9月, 2006 3 次提交
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由 Kevin Hilman 提交于
Enables the ixp4xx platforms to use Generic time-of-day. Signed-off-by: NKevin Hilman <khilman@mvista.com> Acked-by: NJohn Stultz <johnstul@us.ibm.com> Signed-off-by: NDeepak Saxena <dsaxena@plexity.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kevin Hilman 提交于
This patch adds Generic time-of-day support for the ARM architecture. The support is currently added using #ifdef's so that it can support sub-arches that do not (yet) have a clocksource added. As sub-arches add clocksource support, they should 'select GENERIC_TIME' Signed-off-by: NDeepak Saxena <dsaxena@mvista.com> Signed-off-by: NDaniel Walker <dwalker@mvista.com> Signed-off-by: NKevin Hilman <khilman@mvista.com> Acked-by: NJohn Stultz <johnstul@us.ibm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hyok S. Choi 提交于
In nommu mode, the exception vector location depends on the platforms. Some of the implementations may have some special exception control forwarding method in their ROM/flash and for some of them has its own re-mapping mechanism by the h/w. This patch introduces a special configuration CONFIG_CPU_HIGH_VECTOR which turns on the CR_V bit in nommu mode. The CR_V bit is turned off by default. This feature depends on CP15 and does not supported by ARM740. Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 9月, 2006 1 次提交
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由 Hyok S. Choi 提交于
All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 9月, 2006 3 次提交
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由 Dan Fandrich 提交于
The documentation for the ZBOOT_ROM_BSS config option describes it as "The base address of 64KiB of read/write memory in the target for the ROM-able zImage..." In actuality, it requires more than 100 KiB of space in addition to enough space to hold the decompressed kernel. This patch fixes the description in the Kconfig file. Signed-off-by: NDan Fandrich <dfandrich@intrinsyc.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Lennert Buytenhek 提交于
Introduce the arch/arm/plat-iop directory, for code shared between the iop32x and iop33x, and move the common memory map setup bits there. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Lennert Buytenhek 提交于
Split the iop3xx mach type into iop32x and iop33x -- split the config symbols, and move the code in the mach-iop3xx directory to the mach-iop32x and mach-iop33x directories. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 20 9月, 2006 1 次提交
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由 Russell King 提交于
This adds support for irqtrace for lockdep on ARM. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 02 7月, 2006 1 次提交
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由 Thomas Gleixner 提交于
Patch from Thomas Gleixner From: Thomas Gleixner <tglx@linutronix.de> Switch the ARM irq core handling to the generic implementation. The ARM specific header files now contain mostly migration stubs and helper macros. Note that each machine type must be converted after this step seperately. This was seperated out from the patch for easier review. The main changes for the machine type code is the conversion of the type handlers to a 'type flow' and 'chip' model. This affects only the multiplex interrupt handlers. A conversion macro needs to be added to those implementations, which defines the data structure which is registered by the set_irq_chained_handler() macro. Some minor fixups of include files and the conversion of data structure access is necessary all over the place. The mostly macro based conversion was provided to allow an easy migration of the existing implementations. The code compiles on all defconfigs available in arch/arm/configs except those which were broken also before applying the conversion patches. The code has been boot and runtime tested on most ARM platforms. The results of an extensive testing and bugfixing series can be found at: http://www.linutronix.de/index.php?page=testingSigned-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 6月, 2006 4 次提交
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由 Jürgen Schindele 提交于
Patch from Jrgen Schindele This patch adds support for Trizeps4 SoM and ConXS-evalboard from "Keith und Koep" This DIMM-module is based on PXA270. Signed-off-by: NJrgen Schindele <linux@schindele.name> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Andrew Victor 提交于
Patch from Andrew Victor This prepares the way for adding support for the new Atmel AT91SAM926x processors. Major changes: - Rename time.c to at91rm9200_time.c - Rename common.c to at91rm9200.c - Introduce ARCH_AT91, of which ARCH_AT91RM9200, ARCH_AT91SAM9260 and ARCH_AT91SAM9261 are dependent. Signed-off-by: NAndrew Victor <andrew@sanpeople.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Hyok says Intel Xscale is not currently supported by uCLinux. Rather than adding #error statements to the Xscale support files and causing !MMU+Xscale configurations to fail to build, prevent Xscale-based machines from being selected in !MMU mode. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Hyok S. Choi 提交于
Include Kconfig-nommu when MMU is not selected. (This is part of a patch from Hyok.) Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 6月, 2006 1 次提交
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由 Tony Lindgren 提交于
Update cpufreq support for 24xx Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 26 6月, 2006 2 次提交
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由 Ben Dooks 提交于
Patch from Ben Dooks Add the rest of the supported S3C24XX family to the configuration selection for ARCH_S3C2410. This should try and make it clearer for people trying to find the S3C2440 or freinds where they can be found.-- Signed-off-by: NBen Dooks <ben-linux@fluff.org>Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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由 Milan Svoboda 提交于
Patch from Milan Svoboda IXP4XX platform can happily live without pci bus. This patch modifies Kconfig to support this option and modifies Makefile so pci only files are compiled only when pci is really selected. Patch is tested and ixdp465 runs fine with or without the pci bus.-- Signed-off-by: NMilan Svoboda <msvoboda@ra.rockwell.com>Signed-off-by: Deepak Saxena <dsaxena@plexity.net>Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- 21 6月, 2006 1 次提交
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由 Deepak Saxena 提交于
Patch from Deepak Saxena This patch makes soft reboot work on the Versatile board. Thanks to Catalin Marinas @ ARM for pointing out the proper way to do this. Signed-off-by: NDeepak Saxena <dsaxena@plexity.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 6月, 2006 1 次提交
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由 Sascha Hauer 提交于
Patch from Sascha Hauer This patch adds the base support for Hilscher's netX network processors. Signed-off-by: NRobert Schwebel <r.schwebel@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 18 6月, 2006 1 次提交
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由 Vitaly Wool 提交于
Patch from Vitaly Wool This patch adds basic chip support for PNX4008 ARM platform. It's basically the same as the previous one, but with the rmk's comments taken into account. Signed-off-by: NVitaly Wool <vwool@ru.mvista.com> Signed-off-by: NDmitry Pervushin <dpervushin@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 30 4月, 2006 1 次提交
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由 Deepak Saxena 提交于
Patch from Deepak Saxena This patch allows for the addition of IXP4xx systems that do not make use of the PCI interface by moving the CONFIG_PCI symbol selection to be platform-specific instead of for all of IXP4xx. If at least one machine with PCI support is built, the PCI code will be compiled in, but when building !PCI, this will drastically shrink the kernel size. Signed-off-by: NDeepak Saxena <dsaxena@plexity.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 11 4月, 2006 1 次提交
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由 Yasunori Goto 提交于
Current implementations define NODES_SHIFT in include/asm-xxx/numnodes.h for each arch. Its definition is sometimes configurable. Indeed, ia64 defines 5 NODES_SHIFT values in the current git tree. But it looks a bit messy. SGI-SN2(ia64) system requires 1024 nodes, and the number of nodes already has been changeable by config. Suitable node's number may be changed in the future even if it is other architecture. So, I wrote configurable node's number. This patch set defines just default value for each arch which needs multi nodes except ia64. But, it is easy to change to configurable if necessary. On ia64 the number of nodes can be already configured in generic ia64 and SN2 config. But, NODES_SHIFT is defined for DIG64 and HP'S machine too. So, I changed it so that all platforms can be configured via CONFIG_NODES_SHIFT. It would be simpler. See also: http://marc.theaimsgroup.com/?l=linux-kernel&m=114358010523896&w=2Signed-off-by: NYasunori Goto <y-goto@jp.fujitsu.com> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Richard Henderson <rth@twiddle.net> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Jack Steiner <steiner@sgi.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 01 4月, 2006 1 次提交
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由 Richard Purdie 提交于
Add the foundations of a new LEDs subsystem. This patch adds a class which presents LED devices within sysfs and allows their brightness to be controlled. Signed-off-by: NRichard Purdie <rpurdie@rpsys.net> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Greg KH <greg@kroah.com> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 29 3月, 2006 1 次提交
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由 Lennert Buytenhek 提交于
Patch from Lennert Buytenhek This patch adds support for the Intel ixp23xx series of CPUs. The ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit MACs, two 10/100 MACs, expansion bus, four microengines, a Media and Switch Fabric unit almost identical to the one on the ixp2400, two xscale (8250ish) UARTs and a bunch of other stuff. This patch adds the core ixp23xx support code, and support for the ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double Espresso platforms. Signed-off-by: NDeepak Saxena <dsaxena@plexity.net> Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 3月, 2006 1 次提交
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由 Alessandro Zummo 提交于
This patch removes from the ARM subsytem some of the rtc-related functions that have been included in the RTC subsystem. It also fixes some naming collisions. Signed-off-by: NAlessandro Zummo <a.zummo@towertech.it> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 27 3月, 2006 2 次提交
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由 Hyok S. Choi 提交于
The high page vector (0xFFFF0000) does not supported in nommu mode. This patch allows the vectors to be 0x00000000 or the begining of DRAM in nommu mode. Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Akinobu Mita 提交于
- remove __{,test_and_}{set,clear,change}_bit() and test_bit() - if __LINUX_ARM_ARCH__ < 5 - remove ffz() - remove __ffs() - remove generic_fls() - remove generic_ffs() - remove generic_fls64() - remove sched_find_first_bit() - remove generic_hweight{32,16,8}() Signed-off-by: NAkinobu Mita <mita@miraclelinux.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@osdl.org> Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
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- 22 3月, 2006 3 次提交
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由 Lennert Buytenhek 提交于
Patch from Lennert Buytenhek This patch adds support for the Cirrus ep93xx series of CPUs. The ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs, IrDA, MaverickCrunch floating point coprocessor, between 24 and 64 GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster engine, graphics accelerator, IDE controller and a bunch of other stuff. This patch adds the core ep93xx support code, and support for the Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs. Signed-off-by: NLennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Unfortunately, OMAP platforms without the 32K timer left HZ set to an empty value. Fix this by making the dependency on OMAP_32K_TIMER rather than OMAP_32K_TIMER_HZ. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Move the HZ definition into Kconfig, and set appropriate defaults for platforms. Remove mostly empty asm/arch/param.h include file. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 11 3月, 2006 1 次提交
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由 Alessandro Zummo 提交于
Patch from Alessandro Zummo This patches add the 1-wire drivers to the ARM Kconfig. Signed-off-by: NAlessandro Zummo <a.zummo@towertech.it> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 3月, 2006 1 次提交
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由 Catalin Marinas 提交于
Patch from Catalin Marinas Chapter B2.7.3 in the latest ARM ARM (with v6 information) states that the completion of a TLB maintenance operation is only guaranteed by the execution of a DSB (Data Syncronization Barrier, formerly Data Write Barrier or Drain Write Buffer). Note that a DSB is only needed in the flush_tlb_kernel_* functions since the completion is guaranteed by a mode change (i.e. switching back to user mode) for the flush_tlb_user_* functions. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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