- 19 5月, 2011 36 次提交
-
-
由 Hauke Mehrtens 提交于
Some devices like the Netgear WGT634u are using minuses between the blocks of the MAC address and other devices are using colons to separate them. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2366/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Hauke Mehrtens 提交于
Some members of the struct ssb_sprom where not filled with data available in the NVRAM. Some attribute names in the NVRAM changed from SPROM version 3 to version 4. This patch was done by analyzing the the pci sprom parser in the ssb code and some open source parts of the braodcom wireless driver used on embedded devices. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2365/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Hauke Mehrtens 提交于
We are generating the prefix based on the PCI bus address the device is on. This is done like Broadcom does it in their code expect that the the bus number is increased by one. In the SB bus implementation used by Broadcom the SB bus emulates a PCI bus so the kernel sees one PCI bus more then in our implementation. We do not handle prefixes like sb/1/ yet as they are only used on the new bus which is not implemented yet. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2364/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Hauke Mehrtens 提交于
When an other SSB based device without an own SPROM is attached, using the PCI bus to the main SSB based device, the data normally found in the SPROM will be stored in the NVRAM on modern devices. The keys, to load the data from the NVRAM, are all using some sort of prefix like pci/1/1/, pci/1/3/ or sb/1/ before the actual key. This patch extends bcm47xx_fill_sprom() to make it possible to read out these values when some prefix was used. The keys for the SPROM data used on the main chip does not have a prefix. Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2363/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Hauke Mehrtens 提交于
Some embedded devices like the Netgear WNDR3300 have two SSB based cards without an own sprom on the pci bus. We have to provide two different fallback sproms for these and this was not possible with the old solution. In the bcm47xx architecture the sprom data is stored in the nvram in the main flash storage. The architecture code will be able to fill the sprom with the stored data based on the bus where the device was found. The bcm63xx code should do the same thing as before, just using the new API. Acked-by: NMichael Buesch <mb@bu3sch.de> Cc: netdev@vger.kernel.org Cc: linux-wireless@vger.kernel.org Cc: Florian Fainelli <florian@openwrt.org> Signed-off-by: NHauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2362/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
remove au_readl/au_writel, remove the predefined GPIO1/2 KSEG1 register addresses and fix the fallout in all boards and drivers. This also fixes a bug in the mtx-1_wdt driver which was introduced by commit 6ea8115b ("Convert mtx1 wdt to be a platform device and use generic GPIO API") before this patch mtx-1_wdt only modified GPIO215, the patch then used the gpio resource information as bit index into the GPIO2 register but the conversion to the GPIO API didn't realize that. With this patch the drivers original behaviour is restored and GPIO15 is left alone. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> Cc: Florian Fainelli <florian@openwrt.org> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-watchdog@vger.kernel.org Cc: Wim Van Sebroeck <wim@iguana.be> Patchwork: https://patchwork.linux-mips.org/patch/2381/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
-
由 Manuel Lauss 提交于
According to the databooks, the Au1000 DMA engine must be programmed with the physical FIFO addresses. This patch does that; furthermore this opened the possibility to get rid of a lot of now unnecessary address defines. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2348/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
-
由 Manuel Lauss 提交于
Rewrite ethernet setup to use runtime cpu detection, and also clean up the ethernet base address mess as far as possible. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2353/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
-
由 Manuel Lauss 提交于
Detect CPU type at runtime and setup uarts accordingly; also clean up the uart base address mess in the process as far as possible. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2352/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
-
由 Manuel Lauss 提交于
Convert the PM sysdev to syscore_ops and clean up the ddma addresses a bit. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2351/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Convert the PM sysdev to use syscore_ops instead. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2350/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
replace au_readl/au_writel with __raw_readl/__raw_writel, and clean up IC-related stuff from the headers. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2354/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
This fixes a build failure with gpio_keys and CONFIG_GPIOLIB=n (mtx1): CC drivers/input/keyboard/gpio_keys.o gpio_keys.c: In function 'gpio_keys_report_event': gpio_keys.c:325:2: error: implicit declaration of function 'gpio_get_value_cansleep' gpio_keys.c: In function 'gpio_keys_setup_key': gpio_keys.c:390:3: error: implicit declaration of function 'gpio_set_debounce' Also add stubs for the other new functions. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2346/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Manuel Lauss 提交于
Setting Config[OD] gets rid of a _LOT_ of spurious CPLD interrupts, but also decreases overall performance a bit. Signed-off-by: NManuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2347/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
Register the etop platform device inside the machtype specific init code. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2356/ Patchwork: https://patchwork.linux-mips.org/patch/2370/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
This patch adds the driver for the ETOP Packet Processing Engine (PPE32) found inside the XWAY family of Lantiq MIPS SoCs. This driver makes 100MBit ethernet work. Support for all 8 dma channels, gbit and the embedded switch found on the ar9/vr9 still needs to be implemented. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2357/Acked-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
This patch adds support for the DMA engine found inside the XWAY family of SoCs. The engine has 5 ports and 20 channels. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2355/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
The XWAY family allows to extend the number of gpios by using shift registers or latches. This patch adds the 2 drivers needed for this. The extended gpios are output only. [ralf@linux-mips.org: Fixed ltq_stp_probe section() attributes.] Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2258/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
This patch adds mach specific code for the Lantiq EASY50712/50601 evaluation boards Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2255/ Patchwork: https://patchwork.linux-mips.org/patch/2361/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
This patch adds support for Gabor's mips_machine patch. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Cc: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2251/ Patchwork: https://patchwork.linux-mips.org/patch/2358/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
This patch adds the wrappers for registering our platform devices. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2254/ Patchwork: https://patchwork.linux-mips.org/patch/2360/ Patchwork: https://patchwork.linux-mips.org/patch/2359/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
The Lantiq family of SoCs have a EBU (External Bus Unit). This patch adds the driver that allows us to use the EBU as a PCI controller. In order for PCI to work the EBU is set to endianess swap all the data. In addition we need to make use of SWAP_IO_SPACE for device->host DMA to work. The clock of the PCI works in several modes (internal/external). If this is not configured correctly the SoC will hang. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2250/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
Add support for the Lantiq XWAY family of Mips24KEc SoCs. * Danube (PSB50702) * Twinpass (PSB4000) * AR9 (PSB50802) * Amazon SE (PSB5061) The Amazon SE is a lightweight SoC and has no PCI as well as a different clock. We split the code out into seperate files to handle this. The GPIO pins on the SoCs are multi function and there are several bits we can use to configure the pins. To be as compatible as possible to GPIOLIB we add a function int lq_gpio_request(unsigned int pin, unsigned int alt0, unsigned int alt1, unsigned int dir, const char *name); which lets you configure the 2 "alternate function" bits. This way drivers like PCI can make use of GPIOLIB without a cubersome wrapper. The PLL code inside arch/mips/lantiq/xway/clk-xway.c is voodoo to me. It was taken from a 2.4.20 source tree and was never really changed by me since then. Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2249/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 John Crispin 提交于
Add initial support for Mips based SoCs made by Lantiq. This series will add support for the XWAY family. The series allows booting a minimal system using a initramfs or NOR. Missing drivers and support for Amazon and GPON family will be provided in a later series. [Ralf: Remove some cargo cult programming and fixed formatting.] Signed-off-by: NJohn Crispin <blogic@openwrt.org> Signed-off-by: NRalph Hempel <ralph.hempel@lantiq.com> Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2252/ Patchwork: https://patchwork.linux-mips.org/patch/2371/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Maxin John 提交于
Signed-off-by: NMaxin B. John <maxin.john@gmail.com> To: Catalin Marinas <catalin.marinas@arm.com> Cc: Daniel Baluta <dbaluta@ixiacom.com> Cc: naveen yadav <yad.naveen@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: linux-mm@kvack.org Patchwork: https://patchwork.linux-mips.org/patch/2244/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Jayachandran C 提交于
Adds pci/pci-xlr.c to support for XLR PCI/PCI-X interface and XLS PCIe interface. Update irq.c to ack PCI interrupts, use irq handler data to do the PCI/PCIe bus ack. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2337/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Jayachandran C 提交于
Enable XLR CPU support, SMP, initramfs based root filesystem etc. [ralf@linux-mips.org: shrink the defconfig file through make savedefconfig.] Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2338/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Jayachandran C 提交于
Add NLM_XLR_BOARD, CPU_XLR and other config options Makefile updates, mostly based on r4k Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2334/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Jayachandran C 提交于
* include/asm/netlogic added with files common for all Netlogic processors (common with XLP which will be added later) * include/asm/netlogic/xlr for XLR/XLS chip specific files * netlogic/xlr for XLR/XLS platform files Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2334/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Jayachandran C 提交于
CPU_XLR case added to mm/tlbex.c CPU_XLR case added to mm/c-r4k.c for PINDEX attribute Feature overrides for XLR cpu. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2333/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Jayachandran C 提交于
Add war.h and irq.h with XLR/XLS definitions. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2331/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Jayachandran C 提交于
Add Netlogic Microsystems company ID and processor IDs for XLR and XLS processors for CPU probe. Add CPU_XLR to cpu_type_enum. Signed-off-by: NJayachandran C <jayachandranc@netlogicmicro.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2367/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Grant Likely 提交于
Commit b826291c, "drivercore/dt: add a match table pointer to struct device" added an of_match pointer to struct device to cache the of_match_table entry discovered at driver match time. This was unsafe because matching is not an atomic operation with probing a driver. If two or more drivers are attempted to be matched to a driver at the same time, then the cached matching entry pointer could get overwritten. This patch reverts the of_match cache pointer and reworks all users to call of_match_device() directly instead. Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
-
- 18 5月, 2011 4 次提交
-
-
由 Ralf Baechle 提交于
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Florian Fainelli 提交于
The 'size' variable contains the correct register size for both AR7 and Titan, but we never used it to ioremap the correct register size. This problem only shows up on Titan. [ralf@linux-mips.org: Fixed the fix. The original patch as in patchwork recognizes the problem correctly then fails to fix it ...] Reported-by: NAlexander Clouter <alex@digriz.org.uk> Signed-off-by: NFlorian Fainelli <florian@openwrt.org> Patchwork: https://patchwork.linux-mips.org/patch/2380/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-
由 Ralf Baechle 提交于
Initial patch by Yury Polyanskiy <ypolyans@princeton.edu>. Signed-off-by: NRalf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2373/
-
由 Ralf Baechle 提交于
This is the MIPS portion of Joe Perches <joe@perches.com>'s https://patchwork.linux-mips.org/patch/2172/ which seems to have been lost in time and space. Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
-