1. 10 9月, 2011 1 次提交
  2. 02 8月, 2011 1 次提交
    • J
      PCI: Set PCI-E Max Payload Size on fabric · b03e7495
      Jon Mason 提交于
      On a given PCI-E fabric, each device, bridge, and root port can have a
      different PCI-E maximum payload size.  There is a sizable performance
      boost for having the largest possible maximum payload size on each PCI-E
      device.  However, if improperly configured, fatal bus errors can occur.
      Thus, it is important to ensure that PCI-E payloads sends by a device
      are never larger than the MPS setting of all devices on the way to the
      destination.
      
      This can be achieved two ways:
      
      - A conservative approach is to use the smallest common denominator of
        the entire tree below a root complex for every device on that fabric.
      
      This means for example that having a 128 bytes MPS USB controller on one
      leg of a switch will dramatically reduce performances of a video card or
      10GE adapter on another leg of that same switch.
      
      It also means that any hierarchy supporting hotplug slots (including
      expresscard or thunderbolt I suppose, dbl check that) will have to be
      entirely clamped to 128 bytes since we cannot predict what will be
      plugged into those slots, and we cannot change the MPS on a "live"
      system.
      
      - A more optimal way is possible, if it falls within a couple of
        constraints:
      * The top-level host bridge will never generate packets larger than the
        smallest TLP (or if it can be controlled independently from its MPS at
        least)
      * The device will never generate packets larger than MPS (which can be
        configured via MRRS)
      * No support of direct PCI-E <-> PCI-E transfers between devices without
        some additional code to specifically deal with that case
      
      Then we can use an approach that basically ignores downstream requests
      and focuses exclusively on upstream requests. In that case, all we need
      to care about is that a device MPS is no larger than its parent MPS,
      which allows us to keep all switches/bridges to the max MPS supported by
      their parent and eventually the PHB.
      
      In this case, your USB controller would no longer "starve" your 10GE
      Ethernet and your hotplug slots won't affect your global MPS.
      Additionally, the hotplugged devices themselves can be configured to a
      larger MPS up to the value configured in the hotplug bridge.
      
      To choose between the two available options, two PCI kernel boot args
      have been added to the PCI calls.  "pcie_bus_safe" will provide the
      former behavior, while "pcie_bus_perf" will perform the latter behavior.
      By default, the latter behavior is used.
      
      NOTE: due to the location of the enablement, each arch will need to add
      calls to this function.  This patch only enables x86.
      
      This patch includes a number of changes recommended by Benjamin
      Herrenschmidt.
      
      Tested-by: Jordan_Hargrave@dell.com
      Signed-off-by: NJon Mason <mason@myri.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      b03e7495
  3. 22 7月, 2011 4 次提交
  4. 12 7月, 2011 10 次提交
  5. 08 7月, 2011 1 次提交
  6. 30 6月, 2011 1 次提交
    • K
      xen/pci: Use the INT_SRC_OVR IRQ (instead of GSI) to preset the ACPI SCI IRQ. · 155a16f2
      Konrad Rzeszutek Wilk 提交于
      In the past we would use the GSI value to preset the ACPI SCI
      IRQ which worked great as GSI == IRQ:
      
      ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
      
      While that is most often seen, there are some oddities:
      
      ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
      
      which means that GSI 20 (or pin 20) is to be overriden for IRQ 9.
      Our code that presets the interrupt for ACPI SCI however would
      use the GSI 20 instead of IRQ 9 ending up with:
      
      xen: sci override: global_irq=20 trigger=0 polarity=1
      xen: registering gsi 20 triggering 0 polarity 1
      xen: --> pirq=20 -> irq=20
      xen: acpi sci 20
      .. snip..
      calling  acpi_init+0x0/0xbc @ 1
      ACPI: SCI (IRQ9) allocation failed
      ACPI Exception: AE_NOT_ACQUIRED, Unable to install System Control Interrupt handler (20110413/evevent-119)
      ACPI: Unable to start the ACPI Interpreter
      
      as the ACPI interpreter made a call to 'acpi_gsi_to_irq' which got nine.
      It used that value to request an IRQ (request_irq) and since that was not
      present it failed.
      
      The fix is to recognize that for interrupts that are overriden (in our
      case we only care about the ACPI SCI) we should use the IRQ number
      to present the IRQ instead of the using GSI. End result is that we get:
      
      xen: sci override: global_irq=20 trigger=0 polarity=1
      xen: registering gsi 20 triggering 0 polarity 1
      xen: --> pirq=20 -> irq=9 (gsi=9)
      xen: acpi sci 9
      
      which fixes the ACPI interpreter failing on startup.
      
      CC: stable@kernel.org
      Reported-by: NLiwei <xieliwei@gmail.com>
      Tested-by: NLiwei <xieliwei@gmail.com>
      [http://lists.xensource.com/archives/html/xen-devel/2011-06/msg01727.html]
      Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      155a16f2
  7. 03 6月, 2011 1 次提交
  8. 02 6月, 2011 1 次提交
    • M
      x86/PCI/ACPI: fix type mismatch · 6e33a852
      Márton Németh 提交于
      The flags field of struct resource from linux/ioport.h is "unsigned
      long". Change the "type" parameter of coalesce_windows() function to
      match that field. This fixes the following warning messages when
      compiling with "make C=1 W=1 bzImage modules":
      
      arch/x86/pci/acpi.c: In function ‘coalesce_windows’:
      arch/x86/pci/acpi.c:198: warning: conversion to ‘long unsigned int’ from ‘int’ may change the sign of the result
      arch/x86/pci/acpi.c:203: warning: conversion to ‘long unsigned int’ from ‘int’ may change the sign of the result
      Signed-off-by: NMárton Németh <nm127@freemail.hu>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      6e33a852
  9. 22 5月, 2011 1 次提交
    • J
      x86/PCI: derive pcibios_last_bus from ACPI MCFG · a3170c1f
      Jan Beulich 提交于
      On various newer Intel systems the PCI bus(ses) the non-core devices
      live on aren't getting announced by ACPI except through the bus range
      covered by mmconfig. At least the i7core-edac driver depends on these
      devices getting detected.
      
      Mauro, could you check whether with this change the Xeon 55xx hack in
      that driver can go away altogether, and with it the bogus exporting of
      pcibios_scan_specific_bus()?
      Signed-off-by: NJan Beulich <jbeulich@novell.com>
      Cc: Mauro Carvalho Chehab <mchehab@redhat.com>
      Cc: Aristeu Sergio <arozansk@redhat.com>
      Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      a3170c1f
  10. 17 5月, 2011 1 次提交
    • K
      xen/pci: Fix compiler error when CONFIG_XEN_PRIVILEGED_GUEST is not set. · 7c1bfd68
      Konrad Rzeszutek Wilk 提交于
      If we have CONFIG_XEN and the other parameters to build an
      Linux kernel that is non-privileged, the xen_[find|register|unregister]_
      device_domain_owner functions should not be compiled. They should
      use the nops defined in arch/x86/include/asm/xen/pci.h instead.
      
      This fixes:
      
      arch/x86/pci/xen.c:496: error: redefinition of ‘xen_find_device_domain_owner’
      arch/x86/include/asm/xen/pci.h:25: note: previous definition of ‘xen_find_device_domain_owner’ was here
      arch/x86/pci/xen.c:510: error: redefinition of ‘xen_register_device_domain_owner’
      arch/x86/include/asm/xen/pci.h:29: note: previous definition of ‘xen_register_device_domain_owner’ was here
      arch/x86/pci/xen.c:532: error: redefinition of ‘xen_unregister_device_domain_owner’
      arch/x86/include/asm/xen/pci.h:34: note: previous definition of ‘xen_unregister_device_domain_owner’ was here
      Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reported-by: NRandy Dunlap <randy.dunlap@oracle.com>
      7c1bfd68
  11. 11 5月, 2011 2 次提交
  12. 14 4月, 2011 2 次提交
  13. 18 3月, 2011 1 次提交
  14. 14 3月, 2011 1 次提交
  15. 12 3月, 2011 1 次提交
  16. 11 3月, 2011 9 次提交
  17. 04 3月, 2011 1 次提交
  18. 19 2月, 2011 1 次提交
    • K
      pci/xen: When free-ing MSI-X/MSI irq->desc also use generic code. · 3d74a539
      Konrad Rzeszutek Wilk 提交于
      This code path is only run when an MSI/MSI-X PCI device is passed
      in to PV DomU.
      
      In 2.6.37 time-frame we over-wrote the default cleanup handler for
      MSI/MSI-X irq->desc to be "xen_teardown_msi_irqs". That function
      calls the the xen-pcifront driver which can tell the backend to
      cleanup/take back the MSI/MSI-X device.
      
      However, we forgot to continue the process of free-ing the MSI/MSI-X
      device resources (irq->desc) in the PV domU side. Which is what
      the default cleanup handler: default_teardown_msi_irqs did.
      
      Hence we would leak IRQ descriptors.
      
      Without this patch, doing "rmmod igbvf;modprobe igbvf" multiple
      times ends with abandoned IRQ descriptors:
      
       28:          5  xen-pirq-pcifront-msi-x
       29:          8  xen-pirq-pcifront-msi-x
      ...
      130:         10  xen-pirq-pcifront-msi-x
      
      with the end result of running out of IRQ descriptors.
      Reviewed-by: NIan Campbell <Ian.Campbell@citrix.com>
      Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      3d74a539