This adds very basic KZM-A9-GT board (SH73a0) support
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

If the clocks is always same value as the parent clock,
we can use followparent_recalc() for .recalc
Reported-by: NPaul Mundt <lethal@linux-sh.org>
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

R8A7740 USB needs many clocks for workaround,
and it has confusing name "usb24s" and "usb24".
This "usb24s" will be used by other clocks.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Current workaround of I2C on r8a7740 used mdelay(),
but it was an overkill.
This patch cleans up the workaround delay.
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Update the mach-shmobile shared delay calibration code for late
timers. All existing in-tree non-DT socs are however using early
timers today and they are unaffected by this change.

The patch modifies shmobile_setup_delay() from using lpj_fine
to preset_lpj. This change allows us to preset the worst case
loops-per-jiffy value to all CPU cores on the system.

The old code which made use of lpj_fine did not affect the
secondary CPU cores which made it impossible to boot on SMP
without early timers.

Needed for SMP SoCs using late timers like EMEV2 or any other
mach-shmobile SMP SoC that makes use of late timers via DT.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Make sure L1 caches are invalidated when booting secondary
cores. Needed to boot all mach-shmobile SMP systems that
are using Cortex-A9 including sh73a0, r8a7779 and EMEV2.

Thanks to imx and tegra guys for actual code.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Fix SMP TWD boot regression on sh73a0 based platforms caused by:

4200b16d ARM: shmobile: convert to twd_local_timer_register() interface

After the merge of the above commit it has been impossible to boot
sh73a0 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The
kernel crashes at smp_init_cpus() timing which is before the console
has been initialized, so to the user this looks like a kernel lock up
without any particular error message.

This patch fixes the regression on sh73a0 by moving the TWD
registration code from smp_init_cpus() to sys_timer->init() time.

This patch removed shmobile_twd_init() which is no longer needed
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Fix SMP TWD boot regression on r8a7779 based platforms caused by:

4200b16d ARM: shmobile: convert to twd_local_timer_register() interface

After the merge of the above commit it has been impossible to boot
r8a7779 based SoCs with SMP enabled and CONFIG_HAVE_ARM_TWD=y. The
kernel crashes at smp_init_cpus() timing which is before the console
has been initialized, so to the user this looks like a kernel lock up
without any particular error message.

This patch fixes the regression on r8a7779 by moving the TWD
registration code from smp_init_cpus() to sys_timer->init() time.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This also fixes the following modular mmc build failure:

arch/arm/mach-shmobile/built-in.o: In function `mackerel_sdhi0_gpio_cd':
pfc-sh7372.c:(.text+0x1138): undefined reference to `mmc_detect_change'

on this platform by eliminating the use of an inline function, which
calls into the mmc core.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Reviewed-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This also fixes the following modular mmc build failure:

arch/arm/mach-shmobile/built-in.o: In function `ag5evm_sdhi0_gpio_cd':
pfc-sh73a0.c:(.text+0x7c0): undefined reference to `mmc_detect_change'

on this platform by eliminating the use of an inline function, which
calls into the mmc core.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Add generic DT board support for the sh7372 SoC V2.

SCIF serial ports and timers are kept as regular
platform devices. Other on-chip and on-board devices
should be configured via the device tree.

Tested on the mackerel board via kexec using a zImage
kernel with an appended dtb.

At this point there is no interrupt controller support
in place but such code will be added over time when
proper IRQ domain support has been added to INTC.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

This patch is the sh7372 INTC demux rework V2.

Updates the sh7372 INTCS demuxer to not hook into
the INTCA interrupt controller. The mask register
for the chained INTCS interrupt source happens
to be located in the INTCS register range instead of
the INTCA as expected. To allow each INTCA and INTCS
interrupt controller to work in their own IRQ range
this patch moves the INTCS vector away.

Needed for future IRQ domain support.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Use INTC_IRQ_PINS_16H on sh7372 to have two separate
interrupt controllers for the external IRQ pins.

This is preparation work for future IRQ domain support.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Update mach-shmobile to use 0x3400 as INTCS_VECT_BASE.

Since the ARM architecture a little while back added support
for 10 bit irqs we can now undo the previously merged commit
9b7c23ad and use 0x3400 as
INTCS vector base.

This change is necessary to avoid overlapping of interrupt
ranges so separate IRQ domains can be used for different INTC
instances. Without this fix the vectors used by various INTC
instances are overlapping on for instance sh7372 which works
at the moment but breaks upcoming IRQ domain support.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Add INTC_IRQ_PINS_16H to allow broken out support of the
the high 16 external interrupt pins. On SoCs with 32 external
interrupt pins the interrupt vectors for the low 16 and the
high 16 interrupt pins are sparesly populated. The low 16 are
at 0x0200 and high 16 are at 0x3200 which with current macros
results in a separation of 384 linux interrupts. This sparse
population makes it unsuitable with a single IRQ domain to
cover the full IRQ range, so this macro breaks out the 32 pins
into two separate 16 bit controllers to allow two independent
INTC instances with two separate IRQ domains.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Add the function shmobile_setup_delay() to let platforms
configure their maximum loops per jiffy delay. With this
jiffies calculation done the dependency on early timer
is removed.

In the future this allows us to assign timers
using the regular driver model via the device tree.
Signed-off-by: NMagnus Damm <damm@opensource.se>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Disintegrate asm/system.h for ARM.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: Russell King <linux@arm.linux.org.uk>
cc: linux-arm-kernel@lists.infradead.org

Add board and clock setup code for the SH Mobile flctl controller.
Signed-off-by: NBastian Hecht <hechtb@gmail.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>

sh_mipi uses some clocks, but the method of setup depends on CPU.

Current SuperH (like sh73a0) can control all of these clocks
by CPG (Clock Pulse Generator).
It means we can control it by clock framework only.
But on sh7372, it needs CPG settings AND sh_mipi PHYCTRL::PLLDS,
and only sh7372 has PHYCTRL::PLLDS.

But on current sh_mipi driver, PHYCTRL::PLLDS of sh7372 was
overwrote since the callback timing of clock setting was changed
by c2658b70
(fbdev: sh_mipi_dsi: fixup setup timing of sh_mipi_setup()).
To solve this issue, this patch adds extra .phyctrl.

This patch adds detail explanation for unclear mipi settings
and fixup wrong PHYCTRL::PLLDS value for ap4evb (0xb -> 0x6).
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>

Enable core cpuidle timekeeping and irq enabling and remove that
handling from this code.
Signed-off-by: NRobert Lee <rob.lee@linaro.org>
Reviewed-by: NKevin Hilman <khilman@ti.com>
Reviewed-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: NJean Pihet <j-pihet@ti.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Make the TMU clocksource driver mark its device as "always on"
using pm_genpd_dev_always_on() to protect it from surprise power
removals and make sh7372_add_standard_devices() add TMU devices on
sh7372 to the A4R power domain so that their "always on" flags
are taken into account as appropriate.
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
Tested-by: NSimon Horman <horms@verge.net.au>
Acked-by: NPaul Mundt <lethal@linux-sh.org>
Cc: stable@vger.kernel.org

ap4evb board needs the same fix as
1740d344
(ARM: mach-shmobile: mackerel: Reserve DMA memory for the frame buffer)
Signed-off-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Several platforms incorrectly use __io() for casting to 'void __iomem *'.
This converts all of those uses to use the common IOMEM macro.
Reported-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Cc: linux-sh@vger.kernel.org
Acked-by: NArnd Bergmann <arnd@arndb.de>

setup-r8a7779.c has grown a new user of the __io() macro. Rob Herring's
PIO cleanup series already gets rid of all other uses in shmobile, so
we should ensure that this one gets removed as well.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>

Add support for the new smp_twd runtime registration interface
to the shmobile platforms, and remove the old compile-time support.

Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

The structures, passed to the sh_mobile_lcdcfb driver through platform
data, are read only by the driver. Make them const.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

The marker and cache ICBs are now allocated automatically, there's no
need to specify them manually anymore.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

Instead of requiring the users to hardcode MERAM allocation in platform
data, allocate blocks at runtime using genalloc.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

The MERAM resource currently combines both the registers space and the
MERAM space. Only the register space needs to be ioremapped, split the
resource to make that possible.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

The struct sh_mobile_lcdc_chan_cfg platform data contains a list of
video modes. Name the lcd_cfg and num_cfg fields to reflect that they
describe video modes.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

Update board code accordingly.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

Update board code accordingly.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

The field is unused, remove it. Update board code accordingly.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

The field is unused and will be removed. Don't initialize it.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>

Make sure the transmitter devices get registered before the associated
LCDC devices.
Signed-off-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>