- 25 12月, 2013 1 次提交
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由 Maxime Hadjinlian 提交于
This file is mainly a copy of kirkwood-6281.dtsi. The pinctrl seems to be the same. These platforms differs only with their CPU, memory capabilities and the number of GPIO available (36 on 6192, 50 on 6281). Signed-off-by: NMaxime Hadjinlian <maxime.hadjinlian@gmail.com> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 23 12月, 2013 1 次提交
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由 Andrew Lunn 提交于
Add nodes for the two SATA PHYs on kirkwood. Add node for the one SATA PHY on Dove. Add pHandles to the PHYs in the sata nodes. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 25 11月, 2013 1 次提交
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由 Sebastian Hesselbarth 提交于
SDIO controllers found on Marvell Kirkwood 6281/6282 SoCs require pins to be muxed by pinctrl. As there is only one sane pinctrl setting for this, provide default pinctrl properties to the controller nodes. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 06 8月, 2013 1 次提交
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由 Ezequiel Garcia 提交于
Now that mbus has been added to the device tree, it's possible to move the PCIe nodes out of the ocp node, placing it directly below the mbus. This is a more accurate representation of the hardware. Moving the PCIe nodes, we now need to introduce an extra cell to encode the window target ID and attribute. Since this depends on the PCIe port, we split the ranges translation entries, to correspond to each MBus window. In addition, we encode the PCIe memory and I/O apertures in the MBus node, according to the MBus DT binding specification. The choice made is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for I/O space. These apertures can be changed in each per-board DT file. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch> Tested-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 28 5月, 2013 2 次提交
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由 Valentin Longchamp 提交于
Some kirkwood variants (for instance present in the prestera SoCs) do not have all the peripherals whose nodes are declared in kirkwood.dtsi. These missing peripherals are SATA, SDIO, and RTC. As discussed in [1], to avoid that these missing peripherals get initialized which could result in system hangs when accessing undocumented/not present HW registers, their corresponding OF nodes should not get declared at all for some kirkwood variants. The corresponding OF nodes of these peripherals thus are moved from kirkwood.dtsi to the kirkwood-628x.dtsi files so that they still are initialized for these variants where they are present. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2013-May/167154.htmlSigned-off-by: NValentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
This commit adds Device Tree details to enable the PCIe interfaces on Kirkwood. The 6281 has one PCIe interface, the 6282 has two PCIe interfaces. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 24 11月, 2012 2 次提交
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由 Stefan Peter 提交于
Signed-off-by: NStefan Peter <s.peter@mpl.ch> Acked-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Andrew Lunn 提交于
There are a couple of different variants of Kirkwood, which differ in the pin muxing. These DTSI files set the correct compatibility and define commonly used groups of pins, which board dbs files can reference. Signed-off-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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