1. 09 8月, 2013 1 次提交
  2. 27 11月, 2012 2 次提交
  3. 29 7月, 2012 1 次提交
    • M
      video: da8xx-fb: configure FIFO threshold to reduce underflow errors · fb8fa943
      Manjunathappa, Prakash 提交于
      Patch works around the below silicon errata:
      During LCDC initialization, there is the potential for a FIFO
      underflow condition to occur. A FIFO underflow condition
      occurs when the input FIFO is completely empty and the LCDC
      raster controller logic that drives data to the output pins
      attempts to fetch data from the FIFO. When a FIFO underflow
      condition occurs, incorrect data will be driven out on the
      LCDC data pins.
      
      Software should poll the FUF bit field in the LCD_STAT register
      to check if an error condition has occurred or service the
      interrupt if FUF_EN is enabled when FUF occurs. If the FUF bit
      field has been set to 1, this will indicate an underflow
      condition has occurred and then the software should execute a
      reset of the LCDC via the LPSC.
      
      This problem may occur if the LCDC FIFO threshold size
      (LCDDMA_CTRL[TH_FIFO_READY]) is left at its default value after
      reset. Increasing the FIFO threshold size will reduce or
      eliminate underflows. Setting the threshold size to 256 double
      words or larger is recommended.
      
      Above issue is described in section 2.1.3 of silicon errata
      http://www.ti.com/lit/er/sprz313e/sprz313e.pdfSigned-off-by: NRajashekhara, Sudhakar <sudhakar.raj@ti.com>
      Signed-off-by: NManjunathappa, Prakash <prakash.pm@ti.com>
      Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
      fb8fa943
  4. 16 11月, 2010 1 次提交
  5. 25 5月, 2010 1 次提交
    • M
      fbdev: da8xx/omap-l1xx: implement double buffering · 1f9c3e1f
      Martin Ambrose 提交于
      This work includes the following:
      
      - Implement handler for FBIO_WAITFORVSYNC ioctl.
      
      - Allocate the data and palette buffers separately.  A consequence of
        this is that the palette and data loading is now done in different
        phases.  And that the LCD must be disabled temporarily after the palette
        is loaded but this will only happen once after init and each time the
        palette is changed.  I think this is OK.
      
      - Allocate two (ping and pong) framebuffers from memory.
      
      - Add pan_display handler which toggles the LCDC DMA registers between
        the ping and pong buffers.
      Signed-off-by: NMartin Ambrose <martin@ti.com>
      Cc: Chaithrika U S <chaithrika@ti.com>
      Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
      Cc: Krzysztof Helt <krzysztof.h1@poczta.fm>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      1f9c3e1f
  6. 16 12月, 2009 1 次提交
  7. 23 9月, 2009 2 次提交