1. 25 9月, 2018 4 次提交
  2. 24 9月, 2018 6 次提交
    • T
      gpio: omap: Get rid of pm_runtime_irq_safe() · 5284521a
      Tony Lindgren 提交于
      If a gpio instance has any GPIO bits requested we do a pm_runtime_get()
      on the device. Now with cpu_pm handling the deeper SoC idle state quirks,
      let's just remove pm_runtime_irq_safe() call and add a warning in case we
      ever happen to encounter it.
      
      Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
      Cc: Keerthy <j-keerthy@ti.com>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      5284521a
    • T
      gpio: omap: Remove custom PM calls and use cpu_pm instead · b764a586
      Tony Lindgren 提交于
      For a long time the gpio-omap custom PM calls have been annoying me so
      let's replace them with cpu_pm instead. This will enable GPIO PM for
      deeper idle states on omap4. And we can handle GPIO PM for omap2/3/4
      in the same way.
      
      Note that with this patch we are also slightly changing GPIO PM to be
      less aggressive for omap3 and only will idle GPIO when PER context
      may be lost.
      
      For omap2, we don't need to save context and don't want to remove any
      triggering so let's add a quirk flag for that.
      
      Let's do this all in a single patch to avoid a situation where old
      custom calls still are used with new code.
      
      Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
      Cc: Keerthy <j-keerthy@ti.com>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      b764a586
    • T
      gpio: omap: Add level wakeup handling for omap4 based SoCs · ec0daae6
      Tony Lindgren 提交于
      I noticed that unlike omap2 and 3 based SoCs, omap4 based SoCs keep
      the GPIO clocks enabled for GPIO level interrupts with wakeup enabled.
      This blocks deeper idle states as the whole domain will stay busy.
      
      The GPIO functional clock seems to stay enabled if the wakeup register
      is enabled and a level interrupt is triggered. In that case the only
      way to have the GPIO module idle is to reset it. It is possible this
      has gone unnoticed with OSWR (Open SWitch Retention) and off mode
      during idle resetting GPIO context most GPIO instances in the earlier
      Android trees for example.
      
      Looks like the way to deal with this is to have omap4 based SoCs
      only set wake for the duration of idle for level interrupts, and clear
      level registers for the idle. With level interrupts we can do this as
      the level interrupt from device will be still there on resume.
      
      I've taken the long path to fixing this to avoid yet more hard to
      read code. I've set up a quirks flag, and a struct for function
      pointers so we can use these to clean up other quirk handling easier
      in the later patches. The current level quirk handling is moved to
      the new functions.
      
      Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
      Cc: Ladislav Michl <ladis@linux-mips.org>
      Cc: Tero Kristo <t-kristo@ti.com>
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      Acked-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Tested-by: NKeerthy <j-keerthy@ti.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      ec0daae6
    • J
      gpiolib: Fix array members of same chip processed separately · c4c958aa
      Janusz Krzysztofik 提交于
      New code introduced by commit bf9346f5 ("gpiolib: Identify arrays
      matching GPIO hardware") forcibly tries to find an array member which
      has its array index number equal to its hardware pin number and set
      up an array info for possible fast bitmap processing of all arrray
      pins belonging to that chip which also satisfy that numbering rule.
      
      Depending on array content, it may happen that consecutive array
      members which belong to the same chip but don't have array indexes
      equal to their pin hardware numbers will be split into groups, some of
      them processed together via the fast bitmap path, and rest of them
      separetely.  However, applications may expect all those pins being
      processed together with a single call to .set_multiple() chip callback,
      like that was done before the change.
      
      Limit applicability of fast bitmap processing path to cases where all
      pins of consecutive array members starting from 0 which belong to the
      same chip have their hardware numbers equal to their corresponding
      array indexes.  That should still speed up processing of applications
      using whole GPIO banks as I/O ports, while not breaking simultaneous
      manipulation of consecutive pins of the same chip which don't follow
      the equal numbering rule.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      c4c958aa
    • J
      gpiolib: Fix missing updates of bitmap index · 35ae7f96
      Janusz Krzysztofik 提交于
      In new code introduced by commit b17566a6 ("gpiolib: Implement fast
      processing path in get/set array"), bitmap index is not updated with
      next found zero bit position as it should while skipping over pins
      already processed via fast bitmap path, possibly resulting in an
      infinite loop.  Fix it.
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      35ae7f96
    • L
      gpio: htc-egpio: Unique label per chip · 212d7069
      Linus Walleij 提交于
      Give the HTC EGPIO chips unique names, htc-egpio-0,
      htc-egpio-1 etc, so that it gets possible to associate
      machine descriptor tables with individual chips.
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      212d7069
  3. 20 9月, 2018 3 次提交
  4. 18 9月, 2018 12 次提交
  5. 17 9月, 2018 3 次提交
  6. 14 9月, 2018 1 次提交
  7. 13 9月, 2018 5 次提交
    • J
      gpiolib: Implement fast processing path in get/set array · b17566a6
      Janusz Krzysztofik 提交于
      Certain GPIO descriptor arrays returned by gpio_get_array() may contain
      information on direct mapping of array members to pins of a single GPIO
      chip in hardware order.  In such cases, bitmaps of values can be passed
      directly from/to the chip's .get/set_multiple() callbacks without
      wasting time on iterations.
      
      Add respective code to gpiod_get/set_array_bitmap_complex() functions.
      Pins not applicable for fast path are processed as before, skipping
      over the 'fast' ones.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      b17566a6
    • J
      gpiolib: Pass array info to get/set array functions · 77588c14
      Janusz Krzysztofik 提交于
      In order to make use of array info obtained from gpiod_get_array() and
      speed up processing of arrays matching single GPIO chip layout, that
      information must be passed to get/set array functions.  Extend the
      functions' API with that additional parameter and update all users.
      Pass NULL if a user builds an array itself from single GPIOs.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Miguel Ojeda Sandonis <miguel.ojeda.sandonis@gmail.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
      Cc: Lukas Wunner <lukas@wunner.de>
      Cc: Peter Korsgaard <peter.korsgaard@barco.com>
      Cc: Peter Rosin <peda@axentia.se>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Rojhalat Ibrahim <imr@rtschenk.de>
      Cc: Dominik Brodowski <linux@dominikbrodowski.net>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Kishon Vijay Abraham I <kishon@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Lars-Peter Clausen <lars@metafoo.de>
      Cc: Michael Hennerich <Michael.Hennerich@analog.com>
      Cc: Jonathan Cameron <jic23@kernel.org>
      Cc: Hartmut Knaack <knaack.h@gmx.de>
      Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jiri Slaby <jslaby@suse.com>
      Cc: Yegor Yefremov <yegorslists@googlemail.com>
      Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      77588c14
    • J
      gpiolib: Identify arrays matching GPIO hardware · bf9346f5
      Janusz Krzysztofik 提交于
      Certain GPIO array lookup results may map directly to GPIO pins of a
      single GPIO chip in hardware order.  If that condition is recognized
      and handled efficiently, significant performance gain of get/set array
      functions may be possible.
      
      While processing a request for an array of GPIO descriptors, identify
      those which represent corresponding pins of a single GPIO chip.  Skip
      over pins which require open source or open drain special processing.
      Moreover, identify pins which require inversion.  Pass a pointer to
      that information with the array to the caller so it can benefit from
      enhanced performance as soon as get/set array functions can accept and
      make efficient use of it.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      bf9346f5
    • J
      gpiolib: Pass bitmaps, not integer arrays, to get/set array · b9762beb
      Janusz Krzysztofik 提交于
      Most users of get/set array functions iterate consecutive bits of data,
      usually a single integer, while processing array of results obtained
      from, or building an array of values to be passed to those functions.
      Save time wasted on those iterations by changing the functions' API to
      accept bitmaps.
      
      All current users are updated as well.
      
      More benefits from the change are expected as soon as planned support
      for accepting/passing those bitmaps directly from/to respective GPIO
      chip callbacks if applicable is implemented.
      
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: Miguel Ojeda Sandonis <miguel.ojeda.sandonis@gmail.com>
      Cc: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
      Cc: Lukas Wunner <lukas@wunner.de>
      Cc: Peter Korsgaard <peter.korsgaard@barco.com>
      Cc: Peter Rosin <peda@axentia.se>
      Cc: Andrew Lunn <andrew@lunn.ch>
      Cc: Florian Fainelli <f.fainelli@gmail.com>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Rojhalat Ibrahim <imr@rtschenk.de>
      Cc: Dominik Brodowski <linux@dominikbrodowski.net>
      Cc: Russell King <rmk+kernel@armlinux.org.uk>
      Cc: Kishon Vijay Abraham I <kishon@ti.com>
      Cc: Tony Lindgren <tony@atomide.com>
      Cc: Lars-Peter Clausen <lars@metafoo.de>
      Cc: Michael Hennerich <Michael.Hennerich@analog.com>
      Cc: Jonathan Cameron <jic23@kernel.org>
      Cc: Hartmut Knaack <knaack.h@gmx.de>
      Cc: Peter Meerwald-Stadler <pmeerw@pmeerw.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jiri Slaby <jslaby@suse.com>
      Cc: Yegor Yefremov <yegorslists@googlemail.com>
      Cc: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
      Signed-off-by: NJanusz Krzysztofik <jmkrzyszt@gmail.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Tested-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      b9762beb
    • U
      gpiolib: Don't support irq sharing for userspace · fa38869b
      Uwe Kleine-König 提交于
      This concerns gpio edge detection for GPIO IRQs used from
      userspace for GPIO event listeners.
      
      Trying to work out the right event if it's not sure that the
      examined gpio actually moved is impossible.
      
      Consider two gpios "gpioA" and "gpioB" that share an interrupt.
      gpioA's irq should trigger on any edge, gpioB's on a falling edge.
      If now the common irq fires and both gpio lines are high, there
      are several possibilities that could have happend:
      
       a) gpioA just had a low-to-high edge
       b) gpioB just had a high-to-low-to-high spike
       c) a combination of both a) and b)
      
      While c) is unlikely (in most setups) a) and b) alone are bad
      enough. Currently the code assumes case a) unconditionally and
      doesn't report an event for gpioB. Note that even if there is no
      irq sharing involved a spike for a gpio might not result in an
      event if it's configured to trigger for a single edge only.
      
      The only way to improve this is to drop support for interrupt
      sharing. This way a spike results in an event for the right gpio
      at least. Note that apart from dropping IRQF_SHARED this
      effectively undoes commit df1e76f2
      ("gpiolib: skip unwanted events, don't convert them to opposite edge").
      
      This obviously breaks setups that rely on interrupt sharing,
      but given that this cannot be reliable, this is probably an
      acceptable trade-off.
      Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
      [Assuming there are no users of interrupt sharing yet]
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      fa38869b
  8. 12 9月, 2018 2 次提交
  9. 11 9月, 2018 1 次提交
    • L
      gpio: of: Handle SPI chipselect legacy bindings · 6953c57a
      Linus Walleij 提交于
      The SPI chipselects are assumed to be active low in the current
      binding, so when we want to use GPIO descriptors and handle
      the active low/high semantics in gpiolib, we need a special
      parsing quirk to deal with this.
      
      We check for the property "spi-cs-high" and if that is
      NOT present we assume the CS line is active low.
      
      If the line is tagged as active low in the device tree and
      has no "spi-cs-high" property all is fine, the device
      tree and the SPI bindings are in agreement.
      
      If the line is tagged as active high in the device tree with
      the second cell flag and has no "spi-cs-high" property we
      enforce active low semantics (as this is the exception we can
      just tag on the flag).
      
      If the line is tagged as active low with the second cell flag
      AND tagged with "spi-cs-high" the SPI active high property
      takes precedence and we print a warning.
      
      Cc: Mark Brown <broonie@kernel.org>
      Cc: linux-spi@vger.kernel.org
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      6953c57a
  10. 10 9月, 2018 3 次提交
    • H
      gpio-bcm-kona: use new req/relres and dis/enable_irq funcs · 1c939cb5
      Hans Verkuil 提交于
      Since this driver does not use the gpiolib irqchip helpers it will have to
      allocate the irq resources and irq_en/disable itself.
      
      Use the new gpiochip_req/relres_irq helpers to request/release all the
      resources.
      Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
      Cc: Ray Jui <rjui@broadcom.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      1c939cb5
    • H
      gpiolib: override irq_enable/disable · 461c1a7d
      Hans Verkuil 提交于
      When using the gpiolib irqchip helpers install irq_enable/disable
      hooks for the irqchip to ensure that gpiolib knows when the irq
      is enabled or disabled, allowing drivers to disable the irq and then
      use it as an output pin, and later switch the direction to input and
      re-enable the irq.
      Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      461c1a7d
    • H
      gpiolib: add flag to indicate if the irq is disabled · 4e9439dd
      Hans Verkuil 提交于
      GPIO drivers call gpiochip_(un)lock_as_irq whenever they want to use a gpio
      as an interrupt. This is done when the irq is requested and it marks the
      gpio as in use by an interrupt.
      
      This is problematic for cases where a gpio pin is used as an interrupt
      pin, then, after the irq is disabled, is used as a regular gpio pin.
      Currently it is not possible to do this other than by first freeing
      the interrupt so gpiochip_unlock_as_irq is called, since an attempt to
      switch the gpio direction for output will fail since gpiolib believes
      that the gpio is in use for an interrupt and it does not know that it
      the irq is actually disabled.
      
      There are currently two drivers that would like to be able to do this:
      the tda998x_drv.c driver where a regular gpio pin needs to be temporarily
      reconfigured as an interrupt pin during CEC calibration, and the cec-gpio
      driver where you want to configure the gpio pin as an interrupt while
      waiting for traffic over the CEC bus, or as a regular pin when receiving or
      transmitting a CEC message.
      
      The solution is to add a new flag that is set when the irq is enabled,
      and have gpiod_direction_output check for that flag.
      
      We also add functions that drivers that do not use GPIOLIB_IRQCHIP
      can call when they enable/disable the irq.
      Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      4e9439dd