Instead of using the literal value for the number of nanoseconds per
second, use the macro instead to increase readability.
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The of_node_put() function tests whether its argument is NULL and then
returns immediately. Thus the test around the call is not needed.

This issue was detected by using the Coccinelle software.
Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The Pistachio SOC from Imagination Technologies includes a Pulse Width
Modulation DAC which produces 1 to 4 digital bit-outputs which represent
digital waveforms. These PWM outputs are primarily in charge of controlling
backlight LED devices.
Reviewed-by: NAndrew Bresticker <abrestic@chromium.org>
Signed-off-by: NNaidu Tellapati <Naidu.Tellapati@imgtec.com>
Signed-off-by: NSai Masarapu <Sai.Masarapu@imgtec.com>
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@imgtec.com>
Reviewed-by: NVladimir Zapolskiy <vladimir_zapolskiy@mentor.com>
[thierry.reding: fixup license header as discussed on list]
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This patch introduces a bitmap which is used to keep track of the
pwm channels which have been configured in a pwm chip.

The method used earlier to find the number of configured channels,
was to count the pwmdevices with PWMF_REQUESTED field set
and period value configured. This was not correct and failed
when of_pwm_get()/pwm_get() and then pwm_config() was used.
Signed-off-by: NAjit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This adds a generic PWM framework driver for the PWM controller
found on Allwinner SoCs.
Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The slow and system clock should never return a rate of zero, but this
might happen if the clocks property defined in the DT is referencing the
wrong clocks.

Prevent any division by zero from happening by testing the clk_freq
value before calling do_div().
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The include/linux/clk.h header defines dummy implementations for the
various clk_*() functions if HAVE_CLK is not selected to improve build
coverage in randconfig builds.

The dummy implementation of clk_get_rate() returns 0, which causes the
Atmel HLCDC PWM driver's atmel_hlcdc_pwm_config() implementation to end
up calling:

	do_div(clk_period_ns, 0)

On x86, do_div(n, base) will end up evaluating to this:

	n >>= ilog2(base)

with base = 0, the implementation of ilog2() will call ____ilog2_NaN(),
which is purposely undefined and results in a linker failure:

	ERROR: "____ilog2_NaN" [drivers/pwm/pwm-atmel-hlcdc.ko] undefined!

The implementation of do_div() checks that base is a power of 2 before
calling ilog2(). The compiler doesn't optimize this away, presumably
because is_power_of_2() is an inline function and the compiler doesn't
or can't inspect it closely enough. ilog2() being a macro it still ends
up generating the ____ilog2_NaN() because of the constant 0.

The root of the problem is that the driver really should be checking
before possibly dividing by zero. That should eventually be fixed, but
for now just assume that the clock runs at a sensible frequency when
available.
Reported-by: NJim Davis <jim.epost@gmail.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

at91sam9x5 has an errata forbidding the use of slow clk as a clk source and
sama5d3 SoCs has another errata forbidding the use of div1 prescaler.

Take both of these erratas into account.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Add PM support for FTM PWM driver using callback function suspend
and resume in .driver.pm of platform_driver.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This patch is to prepare for adding PM support for FTM PWM driver using
callback function suspend and resume in .driver.pm of platform_driver.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

No matter how many times the FTM PWM is enabled, the use_count will
always be one.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

To re-use the existing PWM driver for 64-bit ARM based Exynos7 SoC, make
the driver depend on ARCH_EXYNOS along with PLAT_SAMSUNG.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The HLCDC IP available in some Atmel SoCs (i.e. at91sam9x5, at91sam9n12
or sama5d3 families for instance) provides a PWM device.

This driver add support for a PWM chip exposing a single PWM device (which
will most likely be used to drive a backlight device).
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: NAnthony Harivel <anthony.harivel@emtrion.de>
Tested-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Acked-by: NThierry Reding <thierry.reding@gmail.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Add PWM driver for Broadcom BCM2835 processor (Raspberry Pi)
Signed-off-by: NBart Tanghe <bart.tanghe@thomasmore.be>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

A platform_driver does not need to set an owner, it will be populated by the
driver core.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

PWM_CLPS711X needs HAS_IOMEM, so depend on it, the related error (with
allmodconfig under um):

    MODPOST 1205 modules
  ERROR: "devm_ioremap_resource" [drivers/pwm/pwm-clps711x.ko] undefined!
  ERROR: "devm_ioremap" [drivers/net/phy/mdio-bcm-unimac.ko] undefined!
Signed-off-by: NChen Gang <gang.chen.5i5j@gmail.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The prescale value used for calculating the period was incremented
afterwards, thus the resulting prescale value is by one too high.
This resulted in a PWM frequency only half as high as requested.

This patch moves the 64 bit division out of the prescale loop to
correct the above issue and make the calculation more efficient.
Signed-off-by: NNikolaus Voss <n.voss@weinmann-emt.de>
Tested-by: NBo Shen <voice.shen@atmel.com>
Acked-by: NBo Shen <voice.shen@atmel.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Move resource retrieval from atmel_tc_alloc to tc_probe to avoid lately
reporting resource related issues when a TC block user request a TC block.

Moreover, resources retrieval are usually done in the probe function,
thus moving them add some consistency with other drivers.

Initialization is done once, ie not every time a tc block is requested.
If it fails, the device is not appended to the list of tc blocks.

Furhermore, the device id is retrieved at probe as well, avoiding parsing
DT every time the user requests of tc block.
Signed-off-by: NGaël PORTAY <gael.portay@gmail.com>
Acked-by: NThierry Reding <thierry.reding@gmail.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>

With some versions of gcc (e.g. 4.1.2):

drivers/pwm/core.c: In function ‘pwm_get’:
drivers/pwm/core.c:610: warning: ‘polarity’ may be used uninitialized in this function
drivers/pwm/core.c:609: warning: ‘period’ may be used uninitialized in this function

While these are false positives, we can get rid of them by refactoring
the code to store a pointer to the best match, as suggested before by
Thierry Reding. This does require moving the mutex_unlock() down.

Fixes: d717ea73 ("pwm: Fix period and polarity in pwm_get() for non-perfect matches")
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The rk3288 has the ability to invert the polarity of the PWM.  Let's
enable that ability.  Note that this increases pwm_cells to 3 for
rk3288.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Reviewed-by: NCaesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The i.MX PWM version2 is embedded in several i.MX SoCs, such as i.MX27,
i.MX51 and i.MX6SL.  There is a 4-word (16 bit) sample FIFO in this IP.
Each FIFO slot determines the duty period of a PWM waveform in one full
cycle.  The IP spec mentions that we should not write a fourth sample
because the FIFO will become full and triggers a FIFO write error (FWE)
which will prevent the PWM from starting once it is enabled.  In order
to avoid any sample FIFO overflow issue, this patch clears all sample
FIFO by doing software reset in the configuration hook when the
controller is disabled or waits for a full PWM cycle to get a
relinquished FIFO slot when the controller is enabled and the FIFO is
fully loaded.

The FIFO overflow issue can be reproduced by the following commands on
the i.MX6SL EVK platform, assuming we use PWM2 for the debug LED which
is driven by the pin HSIC_STROBE and the maximal brightness is 255.

	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 0   > /sys/class/leds/user/brightness
	echo 255 > /sys/class/leds/user/brightness

Here, FWE happens (PWMSR register reads 0x58) and the LED can not be
lighten.

Another way to reproduce the FIFO overflow issue is to run this script:

	while true;
		do echo 255 > /sys/class/leds/user/brightness;
	done

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NLiu Ying <Ying.Liu@freescale.com>
Acked-by: NShawn Guo <shawn.guo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This patch contains no logic change to cleanup indentation for register
definitions only.

Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NLiu Ying <Ying.Liu@freescale.com>
Acked-by: NShawn Guo <shawn.guo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This patch adds missing parentheses around the argument of the macro
MX3_PWMCR_PRESCALER(x) to avoid any potential macro expansion issue.
Reported-by: NLothar Waßmann <LW@KARO-electronics.de>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Shawn Guo <shawn.guo@freescale.com>
Cc: Lothar Waßmann <LW@KARO-electronics.de>
Cc: linux-pwm@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NLiu Ying <Ying.Liu@freescale.com>
Acked-by: NShawn Guo <shawn.guo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Since we cannot make sure the 'chip->npwm' will always be none zero here,
and then if either equal to zero, the kzalloc() will return ZERO_SIZE_PTR,
which equals to ((void *)16).

So this patch fix this with just doing the zero check before calling kzalloc().
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

There is no sign of this IP block on non-x86 architectures and rather will not
be. Thus, make this explicit by applying a direct dependency to X86.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Use c99 initializers for structures.

A simplified version of the semantic match that finds this problem is as
follows: (http://coccinelle.lip6.fr/)

// <smpl>
@decl@
identifier i1,fld;
type T;
field list[n] fs;
@@

struct i1 {
 fs
 T fld;
 ...};

@bad@
identifier decl.i1,i2;
expression e;
initializer list[decl.n] is;
@@

struct i1 i2 = { is,
+ .fld = e
- e
 ,...};
// </smpl>
Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
[thierry.reding: rebased and applied same fix for Braswell]
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

An x86 build seems to pull in the linux/io.h include indirectly. On
PowerPC that doesn't happen and the build breaks due to the readl() and
writel() functions not being declared. Fix this by explicitly including
linux/io.h.
Reported-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Let's use managed functions for this driver.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The driver consists of core, PCI, and platform parts. It would be better
to split them into separate files.

The platform driver is now called pwm-lpss-platform. Thus, previously
set CONFIG_PWM_LPSS=m is not enough to build it. But we are on the safe
side since it seems no one from outside Intel is using it for now.

While here, move to use macros module_pci_driver() and
module_platform_driver().
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: NAlan Cox <alan@linux.intel.com>
[thierry.reding: change select to depends on PWM_LPSS, cleanup]
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This is pretty much the same as Baytrail PWM. Only difference is that the
input clock runs on different frequency.
Signed-off-by: NAlan Cox <alan@linux.intel.com>
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Commit 42fa98a9 ("pwm: fsl-ftm: Convert to direct regmap API usage")
introduced the following error when REGMAP_MMIO=n:

drivers/built-in.o: In function `fsl_pwm_probe':
>> pwm-fsl-ftm.c:(.text+0xd7d7): undefined reference to `devm_regmap_init_mmio_clk'

Select select REGMAP_MMIO in order to fix this error.
Reported-by: Nkbuild test robot <fengguang.wu@intel.com>
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

The regmap core supports different endian modes for devices. This patch
convert to direct regmap API usage, preparing to support big endianness
for LS1 SoC.

Using the regmap framework it will be easy to support devices that only
differ in endianness with the same device driver.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This patch intends to prepare for converting to direct regmap API usage.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

If pwm_get() finds a look-up entry with a perfect match (both dev_id and
con_id match), the loop is aborted, and "p" still points to the correct
struct pwm_lookup.

If only an entry with a matching dev_id or con_id is found, the loop
terminates after traversing the whole list, and "p" now points to
arbitrary memory, not part of the pwm_lookup list.
Then pwm_set_period() and pwm_set_polarity() will set random values for
period resp. polarity.

To fix this, save period and polarity when finding a new best match,
just like is done for chip (for the provider) and index.

This fixes the LCD backlight on r8a7740/armadillo-legacy, which was fed
period 0 and polarity -1068821144 instead of 33333 resp. 1.

Fixes: 3796ce1d ("pwm: add period and polarity to struct pwm_lookup")
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Cc: stable@vger.kernel.org
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This patch added to support the PWM controller found on
RK3288 SoC.
Signed-off-by: NCaesar Wang <caesar.wang@rock-chips.com>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

Removes the PWM period table. Instead the prescaler is computed
from the period value passed in the config() function.
Signed-off-by: NAjit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

ST PWM IP has a common enable/disable control for all the PWM
channels on a PWM cell. Disables PWM output on the PWM HW only
when disable is called for the last channel.
Signed-off-by: NAjit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

ST PWM IP shares the same clock prescaler across all the PWM
channels. Hence configuration requests which change the period
will affect all the channels. Do not allow period changes which
will stomp period settings of the already configured channels.
Signed-off-by: NAjit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This patch fixes the pwm driver to write the complete 8 bits of
the prescaler value to the PWM Control register.
Signed-off-by: NAjit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>

This driver supports all current STi platforms' PWM IPs.
Signed-off-by: NAjit Pal Singh <ajitpal.singh@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
[thierry.reding: rename module to pwm-sti, fix build breakage]
Signed-off-by: NThierry Reding <thierry.reding@gmail.com>