1. 30 5月, 2023 8 次提交
  2. 29 5月, 2023 8 次提交
  3. 26 5月, 2023 2 次提交
    • O
      !835 Add Huawei Intelligent Network Card Driver: hinic3 · 1f7abdfd
      openeuler-ci-bot 提交于
      Merge Pull Request from: @aspiresky01 
       
      The NIC driver supports the following features:
      Supports IPv4/IPv6 TCP/UDP checksum offload, TSO (TCP Segmentation Offload), LRO (Large Receive Offload) offload and RSS (Receive Side Scaling) functions
      Supports interrupt aggregation parameter configuration and interrupt adaptation.
      Supports 802.1Q VLAN (Virtual Local Area Network) offloading and filtering.
      Supports NIC SR-IOV (Single Root I/O Virtualization).
      Support PF promiscuous mode, unicast list filtering, multicast list filtering, and full multicast mode.
      Support VF unicast list filtering, multicast list filtering, and full multicast mode.
      Supports VF QinQ mode.
      Supports VF link state configuration and QoS configuration.
      Support VF MAC address management.
      Support VF spoofchk check.
      Loopback testing is supported.
      Support port lighting.
      Support Ethernet mouth self-negotiation, support pause frame. 
       
      Link:https://gitee.com/openeuler/kernel/pulls/835 
      
      Reviewed-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      Reviewed-by: Chiqijun <chiqijun@huawei.com> 
      Signed-off-by: Zheng Zengkai <zhengzengkai@huawei.com> 
      1f7abdfd
    • Z
      net/hinic3: Add Huawei Intelligent Network Card Driver: hinic3 · ebcedbe6
      zhoujiadong 提交于
      driver inclusion
      category: feature
      bugzilla: https://gitee.com/openeuler/kernel/issues/I6V4RY
      CVE: NA
      
      ---------------------------------
      
      The NIC driver supports the following features:
      Supports IPv4/IPv6 TCP/UDP checksum, TSO, LRO offload and RSS functions.
      Supports interrupt aggregation parameter configuration and interrupt
      adaptation.
      Supports 802.1Q VLAN (Virtual Local Area Network) offloading and
      filtering.
      Supports NIC SR-IOV (Single Root I/O Virtualization).
      Support PF promiscuous mode
      Supports VF QinQ mode.
      Supports VF link state configuration and QoS configuration.
      Support VF MAC address management.
      Support VF spoofchk check.
      Support port lighting.
      Support Ethernet mouth self-negotiation, support pause frame.
      Signed-off-by: Nzhoujiadong <zhoujiadong5@huawei.com>
      Reviewed-by: NWulike (Collin) <wulike1@huawei.com>
      ebcedbe6
  4. 25 5月, 2023 4 次提交
  5. 24 5月, 2023 6 次提交
  6. 23 5月, 2023 12 次提交
    • O
      !761 net: stmmac: fix potential double free of dma descriptor resources · 5e730aa5
      openeuler-ci-bot 提交于
      Merge Pull Request from: @Hongchen_Zhang 
       
      a double free problem in stmmac driver was triggered when doing mugen test,
      After apply this patch the double free problem disappear. 
       
      Link:https://gitee.com/openeuler/kernel/pulls/761 
      
      Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
      Reviewed-by: Guo Dongtai <guodongtai@kylinos.cn> 
      Reviewed-by: Yue Haibing <yuehaibing@huawei.com> 
      Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
      5e730aa5
    • O
      !807 Backport 5.10.153 LTS · ed3dd346
      openeuler-ci-bot 提交于
      Merge Pull Request from: @sanglipeng 
       
      Backport 5.10.153 LTS patches from upstream.
      
      Conflicts:
      
      Already merged(3):
      935a8b620210 mm/memory: add non-anonymous page check in the copy_present_page()
      568e3812b177 mm,hugetlb: take hugetlb_lock before decrementing h->resv_huge_pages
        (Already merged mainline commit 12df140f mm,hugetlb: take hugetlb_lock before decrementing h->resv_huge_pages)
      d523384766fd scsi: sd: Revert "scsi: sd: Remove a local variable"
        (Already merged commit 7d7fe3e4 scsi: sd: Revert "scsi: sd: Remove a local variable") 
      
      Context confilict(1):  
      3b250824b6d3 xhci: Add quirk to reset host back to default state at shutdown
              
      Rejected(4):
      ce605b68db53 net: hinic: fix incorrect assignment issue in hinic_set_interrupt_cfg()
        (The involved file drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c is already deleted
          by the commit f1168d29 net/hinic: Update Hardware Abstract Layer)
      bb01910763f9 net: hinic: fix memory leak when reading function table
        (The involved file drivers/net/ethernet/huawei/hinic/hinic_debugfs.c is already deleted
          by the commit f1168d29 net/hinic: Update Hardware Abstract Layer)
      6603843c80b1 net: hinic: fix the issue of CMDQ memory leaks
        (The involved file drivers/net/ethernet/huawei/hinic/hinic_hw_cmdq.c is already deleted
          by the commit f1168d29 net/hinic: Update Hardware Abstract Layer))
      0ce1ef335300 net: hinic: fix the issue of double release MBOX callback of VF
         (The involved function hinic_vf_func_init() is moved to other file.)
      
      Total patches: 91 - 3 - 4 = 84 
       
      Link:https://gitee.com/openeuler/kernel/pulls/807 
      
      Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
      Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
      ed3dd346
    • O
      !805 Add support for HiSilicon UC/H60PA/PAv3 PMU driver · 682685d0
      openeuler-ci-bot 提交于
      Merge Pull Request from: @hejunhao3 
       
      1. Compared with the PAv2 PMU, the PAv3 PMU has different event
      IDs and definitions. The version number in the version register
      is used to distinguish the event IDs and definitions in the driver.
      2. The H60PA PMU and PA are two different devices. The H60PA PMU
      supports higher bandwidth, and the PA PMU delay is relatively low.
      Different HIDs are used to distinguish the delay.
      3. Each cluster is integrated with a unified cache (UC) PMU, which
      provides consistency between NUMA and UMA domains. It sits between
      L2 and the memory system. 
       
      Link:https://gitee.com/openeuler/kernel/pulls/805 
      
      Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
      Reviewed-by: Yang Shen <shenyang39@huawei.com> 
      Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
      682685d0
    • O
      !545 [OLK-5.10] x86/acpi/cstate: Optimize ARB_DISABLE on Centaur CPUs · 3470c3d8
      openeuler-ci-bot 提交于
      Merge Pull Request from: @leoliu-oc 
       
      On all recent Centaur platforms, ARB_DISABLE is handled by PMU automatically while entering C3 type state. No need for OS to issue the ARB_DISABLE, so set bm_control to zero to indicate that.
      
      ### Issue
      https://gitee.com/openeuler/kernel/issues/I6SKA2
      
      ### Test
      N/A
      
      ### Knowe Issue
      N/A
      
      ### Default config change
      N/A 
       
      Link:https://gitee.com/openeuler/kernel/pulls/545 
      
      Reviewed-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> 
      Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
      Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
      3470c3d8
    • O
      !789 x86 FPU/AMX bug fix since kernel v5.18 · e0484d4e
      openeuler-ci-bot 提交于
      Merge Pull Request from: @Linwang_68f8 
       
       **Content:** 
      This PR involves x86/FPU and dynamitic feature (AMX) related bug fixes since kernel V5.18.
      
      There are 15 patches in total in this patch set:
      1. x86/fpu: Cure supervisor mode (ENQCMD) fallout
      The (re)enabling of ENQCMD or the enabling of any supervisor only state results in a possible inconsistency of the host and guest FPU XSTATE layout on systems which support that feature.
      d6d6d50f x86/fpu/xstate: Consolidate size calculations
      781c64bf x86/fpu/xstate: Handle supervisor states in XSTATE permissions
      7aa5128b x86/fpu/xsave: Handle compacted offsets correctly with supervisor states
      6afbb58c x86/fpu: Cache xfeature flags from CPUID
      35a77d45 x86/fpu/xsave: Initialize offset/size cache early
      d47f71f6 x86/fpu: Remove unused supervisor only offsets
      a9f84fb7 x86/fpu: Remove redundant XCOMP_BV initialization
      
      2. x86/fpu: Improve the init_fpstate setup code
      Background:
      The init_fpstate is an XSAVE image that records init states during the boot time. It is presumed to cover all the supported and enabled features. The setup code has been recently optimized to capture legacy states only as all of the other init states are all zeros.
      Problem with AMX state:
      When AMX is enabled, this buffer is too small to include AMX TILE_DATA (8KB) as it is statically allocated with about a page. But, the buffer is formatted to have them all although using the compacted format.
      471f0aa7 x86/fpu: Fix copy_xstate_to_uabi() to copy init states correctly
      a401f45e x86/fpu: Exclude dynamic states from init_fpstate
      d3e021ad x86/fpu: Fix the init_fpstate size check with the actual size
      c32d7cab x86/fpu: Configure init_fpstate attributes orderly
      
      3. x86/fpu/xstate: Follow up on the init_fpstate fallout again
      When copying the non-initialized dynamic state from the task xstate, the code unconditionally retrieves the address in init_fpstate which is needless. Consequently, this triggers a false-positive warning which meaninglessly confuses users.
      62faca1c selftests/x86/amx: Add a ptrace test
      b1588884 x86/fpu/xstate: Prevent false-positive warning in __copy_xstate_uabi_buf()
      2ba8a7ab selftests/x86/amx: Use provided __cpuid_count() macro
      a23039c7 selftests: Provide local define of __cpuid_count()
      
       **Intel-kernel issue:** 
      #I73H0T: https://gitee.com/openeuler/intel-kernel/issues/I73H0T
      
       **Test environment:** 
      openEuler 22.03 SP1 + backporting kernel
      
       **Test cases:** 
      dmesg checking to make sure no fpu corruption found.
      kernel self-test.
      TMUL functional testing.
      Context switch testing.
      oneDNN/BenchDNN.
      
      
       **Known issue:** 
      N/A
      
       **Default config change:** 
      N/A 
       
      Link:https://gitee.com/openeuler/kernel/pulls/789 
      
      Reviewed-by: Jason Zeng <jason.zeng@intel.com> 
      Reviewed-by: Aichun Shi <aichun.shi@intel.com> 
      Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
      Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
      e0484d4e
    • O
      !787 Intel: Support In Field Scan(IFS) Array BIST · aaae3642
      openeuler-ci-bot 提交于
      Merge Pull Request from: @allen-shi 
       
      Intel In Field Scan (IFS) is a hardware feature to run circuit level tests on a CPU core to detect problems that are not caught by parity or ECC checks.
      
      IFS Scan At Field(SAF) multi-blob images supported in [PR471](https://gitee.com/openeuler/kernel/pulls/471) and [PR580](https://gitee.com/openeuler/kernel/pulls/580)
      
      IFS Array BIST performs tests on some portions of the core logic such as caches and register files. These are different portions of the silicon compared to the parts tested by the first test type i.e Scan at Field (SAF). Emerald Rapids (EMR) is the first CPU to support Array BIST.
      
      This PR is to support In Field Scan(IFS) Array BIST and includes 9 commits totally.
      It is upstreamed in v6.4-rc1.
      https://lore.kernel.org/lkml/20230322003359.213046-1-jithu.joseph@intel.com/
      
       
       **Intel-Kernel Issue** 
      [#I73EG8](https://gitee.com/openeuler/intel-kernel/issues/I73EG8)
      
       **Test** 
      Built and run the kernel successfully on openEuler 22.03 LTS SP1.
      Test is PASS on EMR platform.
      
       **Known Issue** 
      N/A
      
       **Default config change** 
      N/A 
       
      Link:https://gitee.com/openeuler/kernel/pulls/787 
      
      Reviewed-by: Jason Zeng <jason.zeng@intel.com> 
      Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
      Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
      aaae3642
    • O
      !781 Intel: backport split lock EMR CPU support for OLK 5.10 · 527f4090
      openeuler-ci-bot 提交于
      Merge Pull Request from: @etzhao 
       
      Hi,
      
      Bus lock detection EMR CPU support for OpenEuler backporting was tested Okay, help to review and merge
      
      Title: bus lock detection and ratelimit feature for OpenEuler.
      
      Passed test cases
      No function change.
      #dmesg 
       see
       [    0.000000] x86/split lock detection: #AC: crashing the kernel on kernel split_locks and warning on user-space split_locks
      #cat /proc/cpuinfo |grep split 
       split_lock_detect
       
      Known issue:
      No
      
      Default config change:
      No
      
      Thanks,
      Ethan 
       
      Link:https://gitee.com/openeuler/kernel/pulls/781 
      
      Reviewed-by: Jason Zeng <jason.zeng@intel.com> 
      Reviewed-by: Aichun Shi <aichun.shi@intel.com> 
      Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
      Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
      527f4090
    • O
      !760 LoongArch: kvm: fix bug of kvm's hugepage · 92b03342
      openeuler-ci-bot 提交于
      Merge Pull Request from: @Hongchen_Zhang 
       
      The virtual machine will cause the physical machine to die when using the huge page because kvm does not enable the huge page feature,
      In order to fix this problem,kvm need to enable the huge page feature when the physical machine enable the huge page feature at the same time.
      
      Test passed with below step:
      1.Allocate huge page resources to virtual machines
      echo 68 > /sys/kernel/mm/hugepages/hugepages-32768kB/nr_hugepages
      mount -t hugetlbfs -o pagesize=32768K none /mnt/kvm_hugepage
      
      2.Start a virtual machine with huge page
      MALLOC_PERTURB_=1  /usr/libexec/qemu-kvm
          -name 'avocado-vt-vm1'
          -machine loongson7a,memory-backend=mem-machine_mem
          -device pcie-root-port,id=pcie-root-port-0,multifunction=on,bus=pcie.0,addr=0x1,chassis=1
          -device pcie-pci-bridge,id=pcie-pci-bridge-0,addr=0x0,bus=pcie-root-port-0 
          -nodefaults
          -device qxl-vga,bus=pcie.0,addr=0x2
          -m 2048
          -object memory-backend-file,size=2048M,mem-path=/mnt/kvm_hugepage,id=mem-machine_mem 
          -smp 2,maxcpus=2,cores=2,threads=1,sockets=1 
          -cpu 'Loongson-3A5000'
          -device pcie-root-port,id=pcie-root-port-1,port=0x1,addr=0x1.0x1,bus=pcie.0,chassis=2
          -device qemu-xhci,id=usb1,bus=pcie-root-port-1,addr=0x0
          -device usb-tablet,id=usb-tablet1,bus=usb1.0,port=1
          -device pcie-root-port,id=pcie-root-port-2,port=0x2,addr=0x1.0x2,bus=pcie.0,chassis=3
          -device virtio-scsi-pci,id=virtio_scsi_pci0,bus=pcie-root-port-2,addr=0x0
          -blockdev node-name=file_image1,driver=file,filename=/root/avocado/data/avocado-vt/images/openEuler-22.03-loongarch64.qcow2
          -blockdev node-name=drive_image1,driver=qcow2,file=file_image1
          -device scsi-hd,id=image1,drive=drive_image1
          -device pcie-root-port,id=pcie-root-port-3,port=0x3,addr=0x1.0x3,bus=pcie.0,chassis=4
          -device virtio-net-pci,mac=9a:ab:6e:88:2f:5b,id=idk4GfF4,netdev=idwjd54m,bus=pcie-root-port-3,addr=0x0 
          -netdev tap,id=idwjd54m 
          -vnc :0 
          -rtc base=utc,clock=host 
          -boot menu=off,order=cdn,once=c,strict=off
          -bios /usr/share/qemu/loongarch_bios.bin
          -enable-kvm
          -monitor telnet:localhost:4444,server,nowait
          -serial stdio 
       
      Link:https://gitee.com/openeuler/kernel/pulls/760 
      
      Reviewed-by: Guo Dongtai <guodongtai@kylinos.cn> 
      Reviewed-by: Kevin Zhu <zhukeqian1@huawei.com> 
      Reviewed-by: Jialin Zhang <zhangjialin11@huawei.com> 
      Signed-off-by: Jialin Zhang <zhangjialin11@huawei.com> 
      92b03342
    • J
      drivers/perf: hisi: Add support for HiSilicon UC PMU driver · 5ed05cb2
      Junhao He 提交于
      driver inclusion
      category: feature
      bugzilla: https://gitee.com/openeuler/kernel/issues/I77IH6
      CVE: NA
      
      ----------------------------------------------------------------------
      
      On HiSilicon Hip09 platform, there is a UC (unified cache) module
      on each chip SCCL (Super CPU Cluster). UC is a cache that provides
      coherence between NUMA and UMA domains. It is located between L2
      and Memory System. While PA uncore PMU model is the same as other
      Hip09 PMU modules and many PMU events are supported. Let's support
      the PMU driver using the HiSilicon uncore PMU framework.
      
      * rd_req_en : rd_req_en is the abbreviation of read request tracetag enable
      and allows user to count only read operations.
      details are listed in the hisi-pmu document.
      
      * srcid_en & srcid: allows user to filter statistics that come from
      specific CPU/ICL by configuration source ID.
      
      * uring_channel: Allows users to filter statistical information based on
      the specified tx request uring channel.
      uring_channel only supported events: [0x47 ~ 0x59].
      Signed-off-by: NJunhao He <hejunhao3@huawei.com>
      5ed05cb2
    • J
      drivers/perf: hisi: Add support for HiSilicon H60PA and PAv3 PMU driver · f60853f0
      Junhao He 提交于
      driver inclusion
      category: feature
      bugzilla: https://gitee.com/openeuler/kernel/issues/I77IH6
      CVE: NA
      
      ----------------------------------------------------------------------
      
      Compared to the original PA device, H60PA offers higher bandwidth.
      The PA H60 is a new device and we use HID to differentiate them.
      
      The events supported by PAv3 and PAv2 are different. They use the
      same HID. The PMU version register is used in the driver to
      distinguish different versions.
      
      For each H60PA PMU, except for the overflow interrupt register, other
      functions of the H60PA PMU are the same as the original PA PMU module.
      It has 8-programable counters and each counter is free-running.
      Interrupt is supported to handle counter (64-bits) overflow.
      Signed-off-by: NJunhao He <hejunhao3@huawei.com>
      f60853f0
    • J
      drivers/perf: hisi: add NULL check for name · 0b9cb1a0
      Junhao He 提交于
      mainline inclusion
      from mainline-v6.4-rc1
      commit 257aedb7
      category: bugfix
      bugzilla: https://gitee.com/openeuler/kernel/issues/I77IH6
      CVE: NA
      
      Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=257aedb72e731082ab514058e57b132f0b29d707
      
      ----------------------------------------------------------------------
      
      When allocations fails that can be NULL now.
      
      If the name provided is NULL, then the initialization process of the PMU
      type and dev will be skipped in function perf_pmu_register().
      Consequently, the PMU will not be able to register into the kernel.
      Moreover, in the case of unregister the PMU, the function device_del()
      will need to handle NULL pointers, which potentially can cause issues.
      
      So move this allocation above the cpuhp_state_add_instance() and directly
      return if it does fail.
      Signed-off-by: NJunhao He <hejunhao3@huawei.com>
      0b9cb1a0
    • J
      drivers/perf: hisi: Remove redundant initialized of pmu->name · 29bcf6cd
      Junhao He 提交于
      mainline inclusion
      from mainline-v6.4-rc1
      commit 25d8c250
      category: cleanup
      bugzilla: https://gitee.com/openeuler/kernel/issues/I77IH6
      CVE: NA
      
      Reference: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=25d8c25025a46e7621edde2eb6d5f55c6d29ee86
      
      ----------------------------------------------------------------------
      
      "pmu->name" is initialized by perf_pmu_register() function, so remove
      the redundant initialized in hisi_pmu_init().
      Signed-off-by: NJunhao He <hejunhao3@huawei.com>
      29bcf6cd