- 20 10月, 2013 1 次提交
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由 Ben Dooks 提交于
Add support for the versatile express systems to boot big-endian. Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
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- 07 8月, 2013 1 次提交
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由 Nicolas Pitre 提交于
This is the MCPM backend for the Virtual Express A15x2 A7x3 CoreTile aka TC2. This provides cluster management for SMP secondary boot and CPU hotplug. Signed-off-by: NNicolas Pitre <nico@linaro.org> Acked-by: NPawel Moll <pawel.moll@arm.com> Reviewed-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> [PM: made it drive SCC registers directly and provide base for SPC] Signed-off-by: NPawel Moll <pawel.moll@arm.com>
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- 25 6月, 2013 1 次提交
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由 Stephen Boyd 提交于
Separate the smp_twd timers from the local timer API. This will allow us to remove ARM local timer support in the near future and gets us closer to moving this driver to drivers/clocksource. Tested-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 30 5月, 2013 2 次提交
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由 Dave Martin 提交于
Add the required code to properly handle race free platform coherency exit to the DCSCB power down method. The power_up_setup callback is used to enable the CCI interface for the cluster being brought up. This must be done in assembly before the kernel environment is entered. Thanks to Achin Gupta and Nicolas Pitre for their help and contributions. Signed-off-by: NDave Martin <dave.martin@linaro.org> Signed-off-by: NNicolas Pitre <nico@linaro.org> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NPawel Moll <pawel.moll@arm.com>
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由 Nicolas Pitre 提交于
This adds basic CPU and cluster reset controls on RTSM for the A15x4-A7x4 model configuration using the Dual Cluster System Configuration Block (DCSCB). The cache coherency interconnect (CCI) is not handled yet. Signed-off-by: NNicolas Pitre <nico@linaro.org> Reviewed-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NPawel Moll <pawel.moll@arm.com>
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- 10 4月, 2013 1 次提交
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由 Stephen Boyd 提交于
The TWD and SCU configs are selected by default as long as MSM_SCORPIONMP is false and/or MCT is false. Implementing the logic this way certainly saves lines in the Kconfig but it precludes those machines which select MSM_SCORPIONMP or MCT from participating in the single zImage effort because when those machines are combined with other SMP capable machines the TWD and SCU are no longer selected by default. Push the select out to the machine entries so that we can compile these machines together and still select the appropriate configs. Cc: Barry Song <baohua.song@csr.com> Acked-by: NDavid Brown <davidb@codeaurora.org> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NPawel Moll <pawel.moll@arm.com> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Russell King <linux@arm.linux.org.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: NSimon Horman <horms@verge.net.au> Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tony Lindgren <tony@atomide.com> Acked-by: NViresh Kumar <viresh.linux@gmail.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 21 3月, 2013 1 次提交
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由 Catalin Marinas 提交于
This patch moves the arch/arm/mach-vexpress/reset.c functionality to drivers/platform/reset/ and adds the necessary Kconfig wiring. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NPawel Moll <pawel.moll@arm.com>
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- 02 1月, 2013 1 次提交
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由 Rob Herring 提交于
In order to support secure and non-secure platforms in multi-platform kernels, errata work-arounds that access secure only registers need to be disabled. Make all the errata options that fit in this category depend on !CONFIG_ARCH_MULTIPLATFORM. This will effectively remove the errata options as platforms are converted over to multi-platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 11月, 2012 1 次提交
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由 Pawel Moll 提交于
This patch starts using all the configuration infrastructure. - generic GPIO library is forced now - sysreg GPIOs are used as MMC CD and WP information sources; thanks to this MMCI auxiliary data is not longer necessary - DVI muxer and mode control is removed from non-DT V2P-CA9 code as this is now handled by the vexpress-dvi driver - clock generators control is removed as is being handled by the common clock driver now - the sysreg and sysctl control is now delegated to the appropriate drivers and all related code was removed - NOR Flash set_vpp function has been removed as the control bit used does _not_ control its VPP line, but the #WP signal instead (which is de facto unusable in case of Linux MTD drivers); this also allowed the remove its DT auxiliary data The non-DT code defines only minimal required number of the config devices. Device Trees are updated to make use of all new features. Signed-off-by: NPawel Moll <pawel.moll@arm.com>
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- 15 9月, 2012 1 次提交
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由 Rob Herring 提交于
Convert vexpress to multi-platform. This always enables vexpress DT and makes it the default v7 platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com>
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- 12 7月, 2012 1 次提交
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由 Will Deacon 提交于
The vexpress Kconfig setup tries to be clever^Whelpful and selects some errata workarounds for certain revisions of the Cortex-A9 and PL310, which may be required depending on the core tile. Since the mach-vexpress can support A5, A7 and A15 coretiles, let's make errata workaround selection optional. Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRob Herring <robherring2@gmail.com> Signed-off-by: NPawel Moll <pawel.moll@arm.com>
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- 27 2月, 2012 1 次提交
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由 Will Deacon 提交于
Commit fa0ce403 ("ARM: 7162/1: errata: tidy up Kconfig options for PL310 errata workarounds") introduced a consistent naming scheme for errata workarounds, but forgot to update the platforms selecting workarounds using the old names. This patch updates ux500 and vexpress to select the appropriate PL310 errata workarounds. Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 2月, 2012 1 次提交
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由 Pawel Moll 提交于
This patch adds generic Versatile Express DT machine description, Device Tree description for the motherboard and documentation for the bindings. Signed-off-by: NPawel Moll <pawel.moll@arm.com>
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- 19 12月, 2011 2 次提交
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由 Dave Martin 提交于
Making SMP depend on (huge list of MACH_ and ARCH_ configs) is bothersome to maintain and likely to lead to merge conflicts. This patch moves the knowledge of which platforms are SMP-capable to the individual machines. To enable this, a new HAVE_SMP config option is introduced to allow machines to indicate that they can run in a SMP configuration. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> (for nomadik, ux500) Acked-by: NTony Lindgren <tony@atomide.com> (for omap) Acked-by: NKukjin Kim <kgene.kim@samsung.com> (for exynos) Acked-by: NSascha Hauer <s.hauer@pengutronix.de> (for imx) Acked-by: NOlof Johansson <olof@lixom.net> (for tegra)
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由 Dave Martin 提交于
Making CACHE_L2X0 depend on (huge list of MACH_ and ARCH_ configs) is bothersome to maintain and likely to lead to merge conflicts. This patch moves the knowledge of which platforms have a L2x0 or PL310 cache controller to the individual machines. To enable this, a new MIGHT_HAVE_CACHE_L2X0 config option is introduced to allow machines to indicate that they may have such a cache controller independently of each other. Boards/SoCs which cannot reliably operate without the L2 cache controller support will need to select CACHE_L2X0 directly from their own Kconfigs instead. This applies to some TrustZone-enabled boards where Linux runs in the Normal World, for example. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com> (for cns3xxx) Acked-by: NTony Lindgren <tony@atomide.com> (for omap) Acked-by: NShawn Guo <shawn.guo@linaro.org> (for imx) Acked-by: NKukjin Kim <kgene.kim@samsung.com> (for exynos) Acked-by: NSascha Hauer <s.hauer@pengutronix.de> (for imx) Acked-by: NOlof Johansson <olof@lixom.net> (for tegra)
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- 27 2月, 2011 1 次提交
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由 Will Deacon 提交于
The Cortex-A9 tile on the Versatile Express suffers from a number of engineering errata. This patch selects workarounds in the ARCH_VEXPRESS_CA9X4 Kconfig entry so that users don't need to worry about which ones to apply. Reported-by: NUlrich Weigand <ulrich.weigand@de.ibm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 02 5月, 2010 2 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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