1. 05 9月, 2008 2 次提交
  2. 04 9月, 2008 1 次提交
  3. 28 8月, 2008 4 次提交
  4. 26 8月, 2008 2 次提交
  5. 25 8月, 2008 2 次提交
  6. 24 8月, 2008 1 次提交
  7. 23 8月, 2008 2 次提交
    • R
      x86 MCE: Fix CPU hotplug problem with multiple multicore AMD CPUs · 8735728e
      Rafael J. Wysocki 提交于
      During CPU hot-remove the sysfs directory created by
      threshold_create_bank(), defined in
      arch/x86/kernel/cpu/mcheck/mce_amd_64.c, has to be removed before
      its parent directory, created by mce_create_device(), defined in
      arch/x86/kernel/cpu/mcheck/mce_64.c .  Moreover, when the CPU in
      question is hotplugged again, obviously the latter has to be created
      before the former.  At present, the right ordering is not enforced,
      because all of these operations are carried out by CPU hotplug
      notifiers which are not appropriately ordered with respect to each
      other.  This leads to serious problems on systems with two or more
      multicore AMD CPUs, among other things during suspend and hibernation.
      
      Fix the problem by placing threshold bank CPU hotplug callbacks in
      mce_cpu_callback(), so that they are invoked at the right places,
      if defined.  Additionally, use kobject_del() to remove the sysfs
      directory associated with the kobject created by
      kobject_create_and_add() in threshold_create_bank(), to prevent the
      kernel from crashing during CPU hotplug operations on systems with
      two or more multicore AMD CPUs.
      
      This patch fixes bug #11337.
      Signed-off-by: NRafael J. Wysocki <rjw@sisk.pl>
      Acked-by: NAndi Kleen <andi@firstfloor.org>
      Tested-by: NMark Langsdorf <mark.langsdorf@amd.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      8735728e
    • S
      x86: use cpuid vector 0xb when available for detecting cpu topology · bbb65d2d
      Suresh Siddha 提交于
      cpuid leaf 0xb provides extended topology enumeration. This interface provides
      the 32-bit x2APIC id of the logical processor and it also provides a new
      mechanism to detect SMT and core siblings (which provides increased
      addressability).
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      bbb65d2d
  8. 22 8月, 2008 2 次提交
  9. 21 8月, 2008 1 次提交
  10. 20 8月, 2008 1 次提交
  11. 19 8月, 2008 1 次提交
  12. 18 8月, 2008 4 次提交
    • T
      x86: configuration options to compile out x86 CPU support code · 8d02c211
      Thomas Petazzoni 提交于
      This patch adds some configuration options that allow to compile out
      CPU vendor-specific code in x86 kernels (in arch/x86/kernel/cpu). The
      new configuration options are only visible when CONFIG_EMBEDDED is
      selected, as they are mostly interesting for space savings reasons.
      
      An example of size saving, on x86 with only Intel CPU support:
      
         text	   data	    bss	    dec	    hex	filename
      1125479	 118760	 212992	1457231	 163c4f	vmlinux.old
      1121355	 116536	 212992	1450883	 162383	vmlinux
        -4124   -2224       0   -6348   -18CC +/-
      
      However, I'm not exactly sure that the Kconfig wording is correct with
      regard to !64BIT / 64BIT.
      
      [ mingo@elte.hu: convert macro to inline ]
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      8d02c211
    • M
      x86, percpu: silence section mismatch warnings related to EARLY_PER_CPU variables · c6a92a25
      Marcin Slusarz 提交于
      Quoting Mike Travis in "x86: cleanup early per cpu variables/accesses v4"
      (23ca4bba):
      
          The DEFINE macro defines the per_cpu variable as well as the early
          map and pointer.  It also initializes the per_cpu variable and map
          elements to "_initvalue".  The early_* macros provide access to
          the initial map (usually setup during system init) and the early
          pointer.  This pointer is initialized to point to the early map
          but is then NULL'ed when the actual per_cpu areas are setup.  After
          that the per_cpu variable is the correct access to the variable.
      
      As these variables are NULL'ed before __init sections are dropped
      (in setup_per_cpu_maps), they can be safely annotated as __ref.
      
      This change silences following section mismatch warnings:
      
      WARNING: vmlinux.o(.data+0x46c0): Section mismatch in reference from the variable x86_cpu_to_apicid_early_ptr to the variable .init.data:x86_cpu_to_apicid_early_map
      The variable x86_cpu_to_apicid_early_ptr references
      the variable __initdata x86_cpu_to_apicid_early_map
      If the reference is valid then annotate the
      variable with __init* (see linux/init.h) or name the variable:
      *driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,
      
      WARNING: vmlinux.o(.data+0x46c8): Section mismatch in reference from the variable x86_bios_cpu_apicid_early_ptr to the variable .init.data:x86_bios_cpu_apicid_early_map
      The variable x86_bios_cpu_apicid_early_ptr references
      the variable __initdata x86_bios_cpu_apicid_early_map
      If the reference is valid then annotate the
      variable with __init* (see linux/init.h) or name the variable:
      *driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,
      
      WARNING: vmlinux.o(.data+0x46d0): Section mismatch in reference from the variable x86_cpu_to_node_map_early_ptr to the variable .init.data:x86_cpu_to_node_map_early_map
      The variable x86_cpu_to_node_map_early_ptr references
      the variable __initdata x86_cpu_to_node_map_early_map
      If the reference is valid then annotate the
      variable with __init* (see linux/init.h) or name the variable:
      *driver, *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,
      Signed-off-by: NMarcin Slusarz <marcin.slusarz@gmail.com>
      Cc: Mike Travis <travis@sgi.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c6a92a25
    • M
      x86: mmconf: fix section mismatch warning · c72a5efe
      Marcin Slusarz 提交于
      WARNING: arch/x86/kernel/built-in.o(.cpuinit.text+0x1591): Section mismatch in reference from the function init_amd() to the function .init.text:check_enable_amd_mmconf_dmi()
      The function __cpuinit init_amd() references
      a function __init check_enable_amd_mmconf_dmi().
      If check_enable_amd_mmconf_dmi is only used by init_amd then
      annotate check_enable_amd_mmconf_dmi with a matching annotation.
      
      check_enable_amd_mmconf_dmi is only called from init_amd which is __cpuinit
      Signed-off-by: NMarcin Slusarz <marcin.slusarz@gmail.com>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c72a5efe
    • M
      x86: correct register constraints for 64-bit atomic operations · 3c3b5c3b
      Mathieu Desnoyers 提交于
      x86_64 add/sub atomic ops does not seems to accept integer values bigger
      than 32 bits as immediates. Intel's add/sub documentation specifies they
      have to be passed as registers.
      
      The only operations in the x86-64 architecture which accept arbitrary
      64-bit immediates is "movq" to any register; similarly, the only
      operation which accept arbitrary 64-bit displacement is "movabs" to or
      from al/ax/eax/rax.
      
      http://gcc.gnu.org/onlinedocs/gcc-4.3.0/gcc/Machine-Constraints.html
      
      states :
      
      e
          32-bit signed integer constant, or a symbolic reference known to fit
          that range (for immediate operands in sign-extending x86-64
          instructions).
      Z
          32-bit unsigned integer constant, or a symbolic reference known to
          fit that range (for immediate operands in zero-extending x86-64
          instructions).
      
      Since add/sub does sign extension, using the "e" constraint seems appropriate.
      
      It applies to 2.6.27-rc, 2.6.26, 2.6.25...
      Signed-off-by: NMathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
      Signed-off-by: NH. Peter Anvin <hpa@zytor.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      3c3b5c3b
  13. 16 8月, 2008 2 次提交
    • I
      x86: add MAP_STACK mmap flag · cd98a04a
      Ingo Molnar 提交于
      as per this discussion:
      
         http://lkml.org/lkml/2008/8/12/423
      
      Pardo reported that 64-bit threaded apps, if their stacks exceed the
      combined size of ~4GB, slow down drastically in pthread_create() - because
      glibc uses MAP_32BIT to allocate the stacks. The use of MAP_32BIT is
      a legacy hack - to speed up context switching on certain early model
      64-bit P4 CPUs.
      
      So introduce a new flag to be used by glibc instead, to not constrain
      64-bit apps like this.
      
      glibc can switch to this new flag straight away - it will be ignored
      by the kernel. If those old CPUs ever matter to anyone, support for
      it can be implemented.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Acked-by: NUlrich Drepper <drepper@gmail.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      cd98a04a
    • I
      x86: add MAP_STACK mmap flag · 2fdc8690
      Ingo Molnar 提交于
      as per this discussion:
      
         http://lkml.org/lkml/2008/8/12/423
      
      Pardo reported that 64-bit threaded apps, if their stacks exceed the
      combined size of ~4GB, slow down drastically in pthread_create() - because
      glibc uses MAP_32BIT to allocate the stacks. The use of MAP_32BIT is
      a legacy hack - to speed up context switching on certain early model
      64-bit P4 CPUs.
      
      So introduce a new flag to be used by glibc instead, to not constrain
      64-bit apps like this.
      
      glibc can switch to this new flag straight away - it will be ignored
      by the kernel. If those old CPUs ever matter to anyone, support for
      it can be implemented.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Acked-by: NUlrich Drepper <drepper@gmail.com>
      2fdc8690
  14. 15 8月, 2008 10 次提交
  15. 13 8月, 2008 3 次提交
    • S
      crypto: padlock - fix VIA PadLock instruction usage with irq_ts_save/restore() · e4914012
      Suresh Siddha 提交于
      Wolfgang Walter reported this oops on his via C3 using padlock for
      AES-encryption:
      
      ##################################################################
      
      BUG: unable to handle kernel NULL pointer dereference at 000001f0
      IP: [<c01028c5>] __switch_to+0x30/0x117
      *pde = 00000000
      Oops: 0002 [#1] PREEMPT
      Modules linked in:
      
      Pid: 2071, comm: sleep Not tainted (2.6.26 #11)
      EIP: 0060:[<c01028c5>] EFLAGS: 00010002 CPU: 0
      EIP is at __switch_to+0x30/0x117
      EAX: 00000000 EBX: c0493300 ECX: dc48dd00 EDX: c0493300
      ESI: dc48dd00 EDI: c0493530 EBP: c04cff8c ESP: c04cff7c
       DS: 007b ES: 007b FS: 0000 GS: 0033 SS: 0068
      Process sleep (pid: 2071, ti=c04ce000 task=dc48dd00 task.ti=d2fe6000)
      Stack: dc48df30 c0493300 00000000 00000000 d2fe7f44 c03b5b43 c04cffc8 00000046
             c0131856 0000005a dc472d3c c0493300 c0493470 d983ae00 00002696 00000000
             c0239f54 00000000 c04c4000 c04cffd8 c01025fe c04f3740 00049800 c04cffe0
      Call Trace:
       [<c03b5b43>] ? schedule+0x285/0x2ff
       [<c0131856>] ? pm_qos_requirement+0x3c/0x53
       [<c0239f54>] ? acpi_processor_idle+0x0/0x434
       [<c01025fe>] ? cpu_idle+0x73/0x7f
       [<c03a4dcd>] ? rest_init+0x61/0x63
       =======================
      
      Wolfgang also found out that adding kernel_fpu_begin() and kernel_fpu_end()
      around the padlock instructions fix the oops.
      
      Suresh wrote:
      
      These padlock instructions though don't use/touch SSE registers, but it behaves
      similar to other SSE instructions. For example, it might cause DNA faults
      when cr0.ts is set. While this is a spurious DNA trap, it might cause
      oops with the recent fpu code changes.
      
      This is the code sequence  that is probably causing this problem:
      
      a) new app is getting exec'd and it is somewhere in between
         start_thread() and flush_old_exec() in the load_xyz_binary()
      
      b) At pont "a", task's fpu state (like TS_USEDFPU, used_math() etc) is
         cleared.
      
      c) Now we get an interrupt/softirq which starts using these encrypt/decrypt
         routines in the network stack. This generates a math fault (as
         cr0.ts is '1') which sets TS_USEDFPU and restores the math that is
         in the task's xstate.
      
      d) Return to exec code path, which does start_thread() which does
         free_thread_xstate() and sets xstate pointer to NULL while
         the TS_USEDFPU is still set.
      
      e) At the next context switch from the new exec'd task to another task,
         we have a scenarios where TS_USEDFPU is set but xstate pointer is null.
         This can cause an oops during unlazy_fpu() in __switch_to()
      
      Now:
      
      1) This should happen with or with out pre-emption. Viro also encountered
         similar problem with out CONFIG_PREEMPT.
      
      2) kernel_fpu_begin() and kernel_fpu_end() will fix this problem, because
         kernel_fpu_begin() will manually do a clts() and won't run in to the
         situation of setting TS_USEDFPU in step "c" above.
      
      3) This was working before the fpu changes, because its a spurious
         math fault  which doesn't corrupt any fpu/sse registers and the task's
         math state was always in an allocated state.
      
      With out the recent lazy fpu allocation changes, while we don't see oops,
      there is a possible race still present in older kernels(for example,
      while kernel is using kernel_fpu_begin() in some optimized clear/copy
      page and an interrupt/softirq happens which uses these padlock
      instructions generating DNA fault).
      
      This is the failing scenario that existed even before the lazy fpu allocation
      changes:
      
      0. CPU's TS flag is set
      
      1. kernel using FPU in some optimized copy  routine and while doing
      kernel_fpu_begin() takes an interrupt just before doing clts()
      
      2. Takes an interrupt and ipsec uses padlock instruction. And we
      take a DNA fault as TS flag is still set.
      
      3. We handle the DNA fault and set TS_USEDFPU and clear cr0.ts
      
      4. We complete the padlock routine
      
      5. Go back to step-1, which resumes clts() in kernel_fpu_begin(), finishes
      the optimized copy routine and does kernel_fpu_end(). At this point,
      we have cr0.ts again set to '1' but the task's TS_USEFPU is stilll
      set and not cleared.
      
      6. Now kernel resumes its user operation. And at the next context
      switch, kernel sees it has do a FP save as TS_USEDFPU is still set
      and then will do a unlazy_fpu() in __switch_to(). unlazy_fpu()
      will take a DNA fault, as cr0.ts is '1' and now, because we are
      in __switch_to(), math_state_restore() will get confused and will
      restore the next task's FP state and will save it in prev tasks's FP state.
      Remember, in __switch_to() we are already on the stack of the next task
      but take a DNA fault for the prev task.
      
      This causes the fpu leakage.
      
      Fix the padlock instruction usage by calling them inside the
      context of new routines irq_ts_save/restore(), which clear/restore cr0.ts
      manually in the interrupt context. This will not generate spurious DNA
      in the  context of the interrupt which will fix the oops encountered and
      the possible FPU leakage issue.
      Reported-and-bisected-by: NWolfgang Walter <wolfgang.walter@stwm.de>
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      e4914012
    • I
      x86: fix xsave build error · 26d809af
      Ingo Molnar 提交于
      fix this build failure with certain glibc versions:
      
      In file included from /usr/include/bits/sigcontext.h:28,
                       from /usr/include/signal.h:333,
                       from Documentation/accounting/getdelays.c:24:
      /home/mingo/tip/usr/include/asm/sigcontext.h:191: error: expected specifier-qualifier-list before ‘u64’
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      26d809af
    • J
      x86: propagate new nonpanic bootmem macros to CONFIG_HAVE_ARCH_BOOTMEM_NODE · 0ed89b06
      Johannes Weiner 提交于
      Commit 74768ed8 "page allocator: use no-panic variant of
      alloc_bootmem() in alloc_large_system_hash()" introduced two new
      _nopanic macros which are undefined for CONFIG_HAVE_ARCH_BOOTMEM_NODE.
      Signed-off-by: NJohannes Weiner <hannes@saeurebad.de>
      Acked-by: N"Jan Beulich" <jbeulich@novell.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      0ed89b06
  16. 12 8月, 2008 1 次提交
  17. 11 8月, 2008 1 次提交