- 14 8月, 2011 2 次提交
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由 Seungwon Jeon 提交于
Host driver can't get a hint of DDR mode through ios->ddr flag anymore. ios->timing is currently used to inform DDR mode as a substitute. And capability of MMC_CAP_MMC_HIGHSPEED is added for DDR support. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Shashidhar Hiremath 提交于
The mask used inside this macro was assuming Buffer_Size1's [BS1's] width to be 14 bits, it is actually 13 bits. Modify masks used in IDMAC_SET_BUFFER1_SIZE such that they use only 13 bits instead of current 14. Signed-off-by: NShashidhar Hiremath <shashidharh@vayavyalabs.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 21 7月, 2011 11 次提交
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由 James Hogan 提交于
If an error occurs mid way through a transaction (such as a missing CRC status response after the 2nd block written out of 3), then the FIFO may still contain data which will interfere with the next transaction. Therefore after an error has been detected, reset the fifo using the CTRL register. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 James Hogan 提交于
When a data write isn't acknowledged by the card (so no CRC status token is detected after the data), the error -EIO is returned instead of the -ETIMEDOUT expected by mmc_test 15 - "Correct xfer_size at write (start failure)" and 17 "Correct xfer_size at write (midway failure)". In PIO mode the reported number of bytes transferred is also exaggerated since the last block actually failed. Handle the "Write no CRC" error specially, setting the error to -ETIMEDOUT and setting the bytes_xferred to 0. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 James Hogan 提交于
Remove error messages for timeout and CRC failure, since the error code already indicates the problem. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 James Hogan 提交于
There are several situations when dw_mci_submit_data_dma() decides to fall back to PIO mode instead of using DMA, due to a short (to avoid overhead) or "complex" (e.g. with unaligned buffers) transaction, even though host->use_dma is set. However dw_mci_stop_dma() decides whether to stop DMA or set the EVENT_XFER_COMPLETE event based on host->use_dma. When falling back to PIO mode this results in data timeout errors getting missed and the driver locking up. Therefore add host->using_dma to indicate whether the current transaction is using dma or not, and adjust dw_mci_stop_dma() to use that instead. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Tested-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 James Hogan 提交于
Update functions for PIO pushing and pulling data to and from the FIFO so that they can handle unaligned output buffers and unaligned buffer lengths. This makes more of the tests in mmc_test pass. Unaligned lengths in pulls are handled by reading the full FIFO item, and storing the remaining bytes in a small internal buffer (part_buf). The next data pull will copy data out of this buffer first before accessing the FIFO again. Similarly, for pushes the final bytes that don't fill a FIFO item are stored in the part_buf (or sent anyway if it's the last transfer), and then the part_buf is included at the beginning of the next buffer pushed. Unaligned buffers in pulls are handled specially if the architecture cannot do efficient unaligned accesses, by reading FIFO items into a aligned local buffer, and memcpy'ing them into the output buffer, again storing any remaining bytes in the internal buffer. Similarly for pushes the buffer is memcpy'd into an aligned local buffer then written to the FIFO. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 James Hogan 提交于
The FIFO_DEPTH hardware configuration parameter can be found from the power-on value of RX_WMark in the FIFOTH register. This is used to initialise the watermarks, but when calculating the number of free fifo spaces a preprocessor definition is used which is hard coded to 32. Fix reading the value out of FIFOTH (the default value in the RX_WMark field is FIFO_DEPTH-1 not FIFO_DEPTH). Allow the fifo depth to be overriden by platform data (since a bootloader may have changed FIFOTH making auto-detection unreliable). Store the fifo_depth for later use. Also fix the calculation to find the number of free bytes in the fifo to include the fifo depth in the left shift by the data shift, since the fifo depth is measured in fifo items not bytes. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 James Hogan 提交于
Convert the card insert/remove tasklet to a workqueue, and call the setpower platform specific callback without the spinlock held. This means neither of the setpower or get_cd callbacks are called from atomic context which allows them to sleep. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 James Hogan 提交于
When a request is made, the card presence is checked and the request is queued. These two parts must be atomic with respect to card removal, or a card removal could be handled in between, and the new request wouldn't get cancelled until another card was inserted. Therefore move the spinlock protection from dw_mci_queue_request() up into dw_mci_request() to cover the presence check. Note that the test_bit() used for the presence check isn't atomic itself, so should have been protected by a spinlock anyway. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 James Hogan 提交于
DMA is only used for transactions exceeding a certain length, otherwise PIO is used. The TXDR and RXDR interrupts are masked when in DMA mode but still fire. When switching to PIO mode (e.g. to get SCR field when an SD card is inserted) these interrupts are not cleared and so they trigger the ISR as soon as they are unmasked. If the previous DMA did a write, then the ISR will handle the TXDR interrupt even if the transaction is a read, completing the transaction without modifying the read buffer. This is fixed primarily by clearing these two interrupts before unmasking them when setting up PIO mode, and also by making the ISR more robust by only handling TXDR/RXDR in the correct read/write direction. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Seungwon Jeon 提交于
Response timeout (RTO), Response crc error (RCRC) and Response error (RE) signals come with command done (CD) and can be raised preceding command done (CD). That is these error interrupts and CD can be handled in separate dw_mci_interrupt(). If mmc_request_done() is called because of a response timeout before command done has occured, we might send the next request before the CD of current request is finished. This can bring about a broken sequence of request and request-done. And Data error interrupt (DRTO, DCRC, SBE, EBE) and data transfer over (DTO) have the same problem. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Seungwon Jeon 提交于
This patch sets the card_width bit of CTYPE for the corresponding card. CTYPE[31] and CTYPE[16] correspond respectively to card[15] and card[0] for 8-bit mode. And CTYPE[15] and CTYPE[0] correspond respectively to card[15] and CTYPE[0] for 1-bit or 4-bit mode. Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 10 6月, 2011 1 次提交
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由 Joe Perches 提交于
Several fixes as well where the +1 was missing. Done via coccinelle scripts like: @@ struct resource *ptr; @@ - ptr->end - ptr->start + 1 + resource_size(ptr) and some grep and typing. Mostly uncompiled, no cross-compilers. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 25 5月, 2011 1 次提交
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由 Jaehoon Chung 提交于
regulator_enable() was incorrectly placed in the suspend function instead of the resume function. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 25 3月, 2011 1 次提交
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由 Jaehoon Chung 提交于
This patch uses the fixed burst bit when using an internal DMA controller. I found increased performance with IDMAC when this bit is set. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 18 3月, 2011 4 次提交
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由 Jaehoon Chung 提交于
This patch adds support for power regulators. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Nkyungmin Park <kyungmin.park@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jaehoon Chung 提交于
This patch is related to re-init processing on suspend/resume. When card is resuming, some register is reset. If card is removable, maybe controller should be rescan for card. But if assume card is non-removable, need to restore the old value at registers. We store the value of FIFOTH at probe time and then restore it in dw_mci_resume(). Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jaehoon Chung 提交于
This patch adds quirks and capabilities to platdata. Some cards don't use the CDn pin; in that case, we assume the card's inserted. Some boards need other capabilities. So, we add capabilities in the board's platdata. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Chris Ball 提交于
count is only ever used by assigning to old_len if count == 0, and then old_len isn't ever used at all. So, both are redundant. Fixes: drivers/mmc/host/dw_mmc.c: In function ‘dw_mci_read_data_pio’: drivers/mmc/host/dw_mmc.c:1034:32: warning: variable ‘old_len’ set but not used [-Wunused-but-set-variable] Signed-off-by: NChris Ball <cjb@laptop.org> Acked-by: NWill Newton <will.newton@imgtec.com>
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- 16 3月, 2011 4 次提交
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由 Jaehoon Chung 提交于
This patch adds DDR mode support to dw_mmc. If we set any bit in UHS_REG bit[16:31], the card of that slot is supported for DDR mode. For example, if UHS_REG[16] is set, card number 0 is DDR mode. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Jaehoon Chung 提交于
This patch adds support for 8-bit buswidth. dw_mmc can use 8-bit buswidth and set to CTYPE_8BIT in card-type register. Signed-off-by: NJaehoon Chung <jh80.chung@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Will Newton 提交于
Setting this bit in the clock enable register will stop the clock when the card is in the IDLE state. Signed-off-by: NWill Newton <will.newton@imgtec.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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由 Will Newton 提交于
We need to run the card detect tasklet at the end of slot initialisation as it is possible that a card has been inserted prior to boot, so we don't see an insertion interrupt and now the card is sitting there inserted but with no power to it. Signed-off-by: NNeil Jones <neil.jones@imgtec.com> Signed-off-by: NWill Newton <will.newton@imgtec.com> Reviewed-by: NMatt Fleming <matt@console-pimps.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 09 1月, 2011 1 次提交
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由 Will Newton 提交于
This adds the mmc host driver for the Synopsys DesignWare mmc host controller, found in a number of embedded SoC designs. Signed-off-by: NWill Newton <will.newton@imgtec.com> Reviewed-by: NMatt Fleming <matt@console-pimps.org> Reviewed-by: NChris Ball <cjb@laptop.org> Signed-off-by: NChris Ball <cjb@laptop.org>
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