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  1. 27 11月, 2014 1 次提交
  3. 22 11月, 2014 1 次提交
  5. 14 11月, 2014 2 次提交
  7. 13 11月, 2014 2 次提交
  9. 12 11月, 2014 1 次提交
    • M
      ASoC: davinci-mcasp: Add overrun/underrun event handling · a7a3324a
      由 Misael Lopez Cruz 提交于 
      An underrun (playback) event occurs when the serializer transfer
data from the XRBUF buffer to the XRSR shift register, but the
XRBUF hasn't been filled. Similarly, the overrun (capture) event
occurs when data from the XRSR shift register is transferred to
the XRBUF but it hasn't been read yet.

These events are handled as XRUN events that cause the pcm to stop.
The stream has to be explicitly restarted by the userspace which
ensures that after stopping/starting McASP the data transfer is
aligned with DMA. The other possibility was to internally stop and
start McASP without DMA even knowing about it.
Signed-off-by: NMisael Lopez Cruz <misael.lopez@ti.com>
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      a7a3324a
  11. 07 11月, 2014 1 次提交
    • P
      ASoC: samsung: add support for exynos7 I2S controller · a5a56871
      由 Padmavathi Venna 提交于 
      Exynos7 I2S controller has no internal dma, supports more
no. of root clock sampling frequencies and has more no.of Rx
fifos to support 7.1CH recording in TDM mode. Due to more no.
of root clock frequency values some of the bit offsets got
shifted up by one. Also I2S1 on previous Samsung platforms
uses v3 dai type but on Exynos7 it is upgraded to v5 with
slightly modified register offsets for supporting more no.of
RFS values. Due to the above changes, the driver has to be
modified to handle all versions of I2S controller. For this
I introduced a new structure to hold modified bit offsets and
masks which is passed as dai data.
Signed-off-by: NPadmavathi Venna <padma.v@samsung.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      a5a56871
  13. 05 11月, 2014 1 次提交
    • D
      ASoC: max98090: Different comp tables for different pclks · defcd98b
      由 Dylan Reid 提交于 
      In addtion expand the table to handle other values of sysclk.  Instead
of making the table 3D, expand it to a more descriptive struct.  The
divisors are specified in Table 19 of the 98090 data sheet version
0p94.

The dmic frequency was previously assumed.  Instead make it explicit
and configurable through device tree.  This now handles independently
set pclk and dmic frequency.

Based on downstream work by Ralph Birt.
Signed-off-by: NDylan Reid <dgreid@chromium.org>
Signed-off-by: NMark Brown <broonie@kernel.org>
      defcd98b
  15. 22 10月, 2014 1 次提交
  17. 20 10月, 2014 11 次提交
  19. 15 10月, 2014 1 次提交
  21. 05 10月, 2014 1 次提交
  23. 04 10月, 2014 1 次提交
  25. 03 10月, 2014 1 次提交
  27. 02 10月, 2014 1 次提交
  29. 30 9月, 2014 3 次提交
  31. 27 9月, 2014 1 次提交
  33. 25 9月, 2014 1 次提交
  35. 24 9月, 2014 1 次提交
  37. 14 9月, 2014 1 次提交
  39. 01 9月, 2014 1 次提交
    • X
      ASoC: fsl-sai: using 'lsb-first' property instead of 'big-endian-data'. · eadb0019
      由 Xiubo Li 提交于 
      The 'big-endian-data' property is originally used to indicate whether the
LSB firstly or MSB firstly will be transmitted to the CODEC or received
from the CODEC, and there has nothing relation to the memory data.

Generally, if the audio data in big endian format, which will be using the
bytes reversion, Here this can only be used to bits reversion.

So using the 'lsb-first' instead of 'big-endian-data' can make the code
to be readable easier and more easy to understand what this property is
used to do.

This property used for configuring whether the LSB or the MSB is transmitted
first for the fifo data.
Signed-off-by: NXiubo Li <Li.Xiubo@freescale.com>
Acked-by: NNicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: NMark Brown <broonie@kernel.org>
      eadb0019
  41. 28 8月, 2014 1 次提交
  43. 26 8月, 2014 1 次提交
  45. 17 8月, 2014 4 次提交