Besides the CPU and DDR PLLs, the CPU and DDR frequencies
can be derived from other PLLs in the SRIF block on the
AR934x SoCs. The current code does not checks if the SRIF
PLLs are used and this can lead to incorrectly calculated
CPU/DDR frequencies.

Fix it by calculating the frequencies from SRIF PLLs if
those are used on a given board.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: <stable@vger.kernel.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/4324/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4172/Signed-off-by: NJohn Crispin <blogic@openwrt.org>

The AR724[12] SoCs have more GPIO lines than the AR7240.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Cc: linux-mips@linux-mips.org
Patchwork: https://http://patchwork.linux-mips.org/patch/4167/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3513/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3511/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3510/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3508/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3507/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Also add 'soc_is_ar934[124x]' helper functions and a Kconfig
symbol for the AR934X SoCs.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3506/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The patch allows to see kernel messages on AR934X SoCs in
early boot stage.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Acked-by: NLuis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3504/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The wireless MAC of the AR933x SoCs uses different base address, and
requires different setup code.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3030/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Also select the USB_ARCH_HAS_EHCI symbol in order to make the
EHCI driver available.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2527/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2524/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2530/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2523/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2522/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The AR933X SoCs are using a different UART, thus require
different code for early printk support.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2521/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2538/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add common platform_device and helper code to make the registration of
the built-in USB controllers easier on the board which are using them.
Also register the USB controller on the AP81 and PB44 boards.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2442/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The AR724X SoCs have more IRQ sources hooked into the MISC IRQ controller.
The patch adds support for them.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2440/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add common platform_device and helper code to make the registration
of the built-in wireless MAC easier on the Atheros AR9130/AR9132
based boards. Also register the WMAC device on the AR81 board.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz <kaloz@openwrt.org>,
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1962/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Several boards are using the built-in SPI controller of the
AR71XX/AR724X/AR913X SoCs. This patch adds common platform_device
and helper code to register it. Additionally, the patch registers
the SPI bus on the PB44 board.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1956/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch implements generic GPIO routines for the built-in
GPIO controllers of the Atheros AR71XX/AR724X/AR913X SoCs.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1948/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch adds initial support for various Atheros SoCs based on the
MIPS 24Kc core. The following models are supported at the moment:

  - AR7130
  - AR7141
  - AR7161
  - AR9130
  - AR9132
  - AR7240
  - AR7241
  - AR7242

The current patch contains minimal support only, but the resulting
kernel can boot into user-space with using of an initramfs image on
various boards which are using these SoCs. Support for more built-in
devices and individual boards will be implemented in further patches.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1947/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>