- 22 6月, 2019 23 次提交
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由 Huang Rui 提交于
This patch moves the rest of Watermarks_t uses into asic level. It's to avoid the conflicts with different asic. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch moves the rest of SmuMetrics_t uses into asic level. It's to avoid the conflicts with different asic. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch moves the rest of PPTable_t uses into asic level. It's to avoid the conflicts with different asic. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch uses the table size member in the structure instead of getting directly, because the table is different in each asic. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
Table id may be different for each asic, so it's good to use this as the input for common interface. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
The smc tables defines should be in the asic level. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
TABLE_COUNT should be inited in asic level. Because the value may be different on each asic even on the same ip. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch introduces new smu feature type, it's to handle the different feature mask defines for each asic with the same smu ip. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch introduces new smu clk type, it's to handle the different ppclk defines for each asic with the same smu ip. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kenneth Feng 提交于
seperate the Vega20 case from navi10 for gfxoff so that gfxoff won't be allowed on Vega20 Signed-off-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kenneth Feng 提交于
add the gfxoff interface to navi10,it's disabled by default. Signed-off-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
1.add smc_firmware_header_v2_1 hfirmware support, support more pptable in smc firmware. 2.optimization current pptable load framework. 3.rename read_pptable_from_vbios with setup_pptable. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
the function os is_dpm_running is aisc related function, so move them to asic file. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
The read_sensor functions has asic related parts code, so move them to asic file to implement. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
The callback of get[set]_power_profile is asic related function, so move theme into vega20_ppt file. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
the function of conv_profile_to_workload is asic related function, so move them into vega20_ppt file Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
OD feature isn't enabled on navi10 so skip it for the moment. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
Driver is able to load soft pptable from smc bin file with this function. We stored the soft pptable in the bottom of smc.bin that the version is v2. v2: remove is_fw_v2_0 flag. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kenneth Feng 提交于
enable backdoor smu fw loading on navi10 v2: squash in define fix (Alex) Signed-off-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch adds navi10 smc ucode init and ppt functions setting. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
SMU11 should use mp11 and smuio11 headers. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch updates smu 11 driver if header for navi10. UVD/VCE won't be used for navi10. Here, reverve them for vega20. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 5月, 2019 6 次提交
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由 Evan Quan 提交于
The UVD/VCE bits are set wrongly. This causes the UVD/VCE clocks are not brought back correctly on needed. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Chengming Gui 提交于
add pm_enabled to control the dpm off/on. v2: Directly return 0 to replace return ret and merge some check code. Signed-off-by: NChengming Gui <Jack.Gui@amd.com> Reviewed-by: NHawking Zhang <hawking.zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Support hotspot and memory temperature retrieval on sw smu routine. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Support realtime uclk activity report. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
Request too frequently may get corrupt data. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NFeifei Xu <Feifei.Xu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Kevin Wang 提交于
add this helper function to get smc version. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 4月, 2019 1 次提交
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由 shaoyunl 提交于
Send message with parameter to SMC to set xgmi pstate Signed-off-by: Nshaoyunl <shaoyun.liu@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 13 4月, 2019 1 次提交
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由 shaoyunl 提交于
XGMI pstate is controlled by SMU, driver need this interface to communicate with SMU Signed-off-by: Nshaoyunl <shaoyun.liu@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 4月, 2019 1 次提交
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由 Kevin Wang 提交于
use smu_update_table_with_arg to replace old code logic Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NEvan Quan <evan.quan@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 4月, 2019 1 次提交
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由 Alex Deucher 提交于
Fixes warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] on 32 bit platforms. Reviewed-by: NTao Zhou <tao.zhou1@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 3月, 2019 1 次提交
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由 Dan Carpenter 提交于
The "size" variable is unsigned. We never pass invalid sizes to this function and we already used it as an array offset earlier so it's too late to check here. Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 3月, 2019 1 次提交
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由 Colin Ian King 提交于
There is a spelling mistake in pr_warn message; fix it. Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 20 3月, 2019 5 次提交
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由 Kevin Wang 提交于
each asic may be has different smc if version, so move its to asic file to implement. Signed-off-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Likun Gao 提交于
Add condition to judge whether overdrive is enabled and correct power limit value for overdrive used by power limit interface. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NKevin Wang <kevin1.wang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NHuang Rui <ray.huang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
This patch uses REG32_PCIE wrapper instead of writting pci_index2 and reading pci_data2. This sequence should be protected by pcie_idx_lock. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Huang Rui 提交于
We actually want to know the index of PPSMC_MSG. Signed-off-by: NHuang Rui <ray.huang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Likun Gao 提交于
Smc table hw init should be skipped for suspend/resume when dpm running. Unified feature enable and disable function into smu_system_features_control. Signed-off-by: NLikun Gao <Likun.Gao@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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