1. 18 3月, 2021 1 次提交
  2. 17 3月, 2021 3 次提交
  3. 09 3月, 2021 1 次提交
    • V
      net: dsa: fix switchdev objects on bridge master mistakenly being applied on ports · 03cbb870
      Vladimir Oltean 提交于
      Tobias reports that after the blamed patch, VLAN objects being added to
      a bridge device are being added to all slave ports instead (swp2, swp3).
      
      ip link add br0 type bridge vlan_filtering 1
      ip link set swp2 master br0
      ip link set swp3 master br0
      bridge vlan add dev br0 vid 100 self
      
      This is because the fix was too broad: we made dsa_port_offloads_netdev
      say "yes, I offload the br0 bridge" for all slave ports, but we didn't
      add the checks whether the switchdev object was in fact meant for the
      physical port or for the bridge itself. So we are reacting on events in
      a way in which we shouldn't.
      
      The reason why the fix was too broad is because the question itself,
      "does this DSA port offload this netdev", was too broad in the first
      place. The solution is to disambiguate the question and separate it into
      two different functions, one to be called for each switchdev attribute /
      object that has an orig_dev == net_bridge (dsa_port_offloads_bridge),
      and the other for orig_dev == net_bridge_port (*_offloads_bridge_port).
      
      In the case of VLAN objects on the bridge interface, this solves the
      problem because we know that VLAN objects are per bridge port and not
      per bridge. And when orig_dev is equal to the net_bridge, we offload it
      as a bridge, but not as a bridge port; that's how we are able to skip
      reacting on those events. Note that this is compatible with future plans
      to have explicit offloading of VLAN objects on the bridge interface as a
      bridge port (in DSA, this signifies that we should add that VLAN towards
      the CPU port).
      
      Fixes: 99b8202b ("net: dsa: fix SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING getting ignored")
      Reported-by: NTobias Waldekranz <tobias@waldekranz.com>
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NTobias Waldekranz <tobias@waldekranz.com>
      Tested-by: NTobias Waldekranz <tobias@waldekranz.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      03cbb870
  4. 02 3月, 2021 2 次提交
  5. 27 2月, 2021 1 次提交
  6. 23 2月, 2021 1 次提交
  7. 17 2月, 2021 3 次提交
  8. 16 2月, 2021 1 次提交
    • V
      net: mscc: ocelot: avoid type promotion when calling ocelot_ifh_set_dest · 1f778d50
      Vladimir Oltean 提交于
      Smatch is confused by the fact that a 32-bit BIT(port) macro is passed
      as argument to the ocelot_ifh_set_dest function and warns:
      
      ocelot_xmit() warn: should '(((1))) << (dp->index)' be a 64 bit type?
      seville_xmit() warn: should '(((1))) << (dp->index)' be a 64 bit type?
      
      The destination port mask is copied into a 12-bit field of the packet,
      starting at bit offset 67 and ending at 56.
      
      So this DSA tagging protocol supports at most 12 bits, which is clearly
      less than 32. Attempting to send to a port number > 12 will cause the
      packing() call to truncate way before there will be 32-bit truncation
      due to type promotion of the BIT(port) argument towards u64.
      
      Therefore, smatch's fears that BIT(port) will do the wrong thing and
      cause unexpected truncation for "port" values >= 32 are unfounded.
      Nonetheless, let's silence the warning by explicitly passing an u64
      value to ocelot_ifh_set_dest, such that the compiler does not need to do
      a questionable type promotion.
      Reported-by: Nkernel test robot <lkp@intel.com>
      Reported-by: NDan Carpenter <dan.carpenter@oracle.com>
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1f778d50
  9. 15 2月, 2021 8 次提交
    • V
      net: dsa: propagate extack to .port_vlan_filtering · 89153ed6
      Vladimir Oltean 提交于
      Some drivers can't dynamically change the VLAN filtering option, or
      impose some restrictions, it would be nice to propagate this info
      through netlink instead of printing it to a kernel log that might never
      be read. Also netlink extack includes the module that emitted the
      message, which means that it's easier to figure out which ones are
      driver-generated errors as opposed to command misuse.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      89153ed6
    • V
      net: dsa: propagate extack to .port_vlan_add · 31046a5f
      Vladimir Oltean 提交于
      Allow drivers to communicate their restrictions to user space directly,
      instead of printing to the kernel log. Where the conversion would have
      been lossy and things like VLAN ID could no longer be conveyed (due to
      the lack of support for printf format specifier in netlink extack), I
      chose to keep the messages in full form to the kernel log only, and
      leave it up to individual driver maintainers to move more messages to
      extack.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      31046a5f
    • V
      net: dsa: tag_ocelot_8021q: add support for PTP timestamping · 0a6f17c6
      Vladimir Oltean 提交于
      For TX timestamping, we use the felix_txtstamp method which is common
      with the regular (non-8021q) ocelot tagger. This method says that skb
      deferral is needed, prepares a timestamp request ID, and puts a clone of
      the skb in a queue waiting for the timestamp IRQ.
      
      felix_txtstamp is called by dsa_skb_tx_timestamp() just before the
      tagger's xmit method. In the tagger xmit, we divert the packets
      classified by dsa_skb_tx_timestamp() as PTP towards the MMIO-based
      injection registers, and we declare them as dead towards dsa_slave_xmit.
      If not PTP, we proceed with normal tag_8021q stuff.
      
      Then the timestamp IRQ fires, the clone queued up from felix_txtstamp is
      matched to the TX timestamp retrieved from the switch's FIFO based on
      the timestamp request ID, and the clone is delivered to the stack.
      
      On RX, thanks to the VCAP IS2 rule that redirects the frames with an
      EtherType for 1588 towards two destinations:
      - the CPU port module (for MMIO based extraction) and
      - if the "no XTR IRQ" workaround is in place, the dsa_8021q CPU port
      the relevant data path processing starts in the ptp_classify_raw BPF
      classifier installed by DSA in the RX data path (post tagger, which is
      completely unaware that it saw a PTP packet).
      
      This time we can't reuse the same implementation of .port_rxtstamp that
      also works with the default ocelot tagger. That is because felix_rxtstamp
      is given an skb with a freshly stripped DSA header, and it says "I don't
      need deferral for its RX timestamp, it's right in it, let me show you";
      and it just points to the header right behind skb->data, from where it
      unpacks the timestamp and annotates the skb with it.
      
      The same thing cannot happen with tag_ocelot_8021q, because for one
      thing, the skb did not have an extraction frame header in the first
      place, but a VLAN tag with no timestamp information. So the code paths
      in felix_rxtstamp for the regular and 8021q tagger are completely
      independent. With tag_8021q, the timestamp must come from the packet's
      duplicate delivered to the CPU port module, but there is potentially
      complex logic to be handled [ and prone to reordering ] if we were to
      just start reading packets from the CPU port module, and try to match
      them to the one we received over Ethernet and which needs an RX
      timestamp. So we do something simple: we tell DSA "give me some time to
      think" (we request skb deferral by returning false from .port_rxtstamp)
      and we just drop the frame we got over Ethernet with no attempt to match
      it to anything - we just treat it as a notification that there's data to
      be processed from the CPU port module's queues. Then we proceed to read
      the packets from those, one by one, which we deliver up the stack,
      timestamped, using netif_rx - the same function that any driver would
      use anyway if it needed RX timestamp deferral. So the assumption is that
      we'll come across the PTP packet that triggered the CPU extraction
      notification eventually, but we don't know when exactly. Thanks to the
      VCAP IS2 trap/redirect rule and the exclusion of the CPU port module
      from the flooding replicators, only PTP frames should be present in the
      CPU port module's RX queues anyway.
      
      There is just one conflict between the VCAP IS2 trapping rule and the
      semantics of the BPF classifier. Namely, ptp_classify_raw() deems
      general messages as non-timestampable, but still, those are trapped to
      the CPU port module since they have an EtherType of ETH_P_1588. So, if
      the "no XTR IRQ" workaround is in place, we need to run another BPF
      classifier on the frames extracted over MMIO, to avoid duplicates being
      sent to the stack (once over Ethernet, once over MMIO). It doesn't look
      like it's possible to install VCAP IS2 rules based on keys extracted
      from the 1588 frame headers.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      0a6f17c6
    • V
      net: dsa: felix: setup MMIO filtering rules for PTP when using tag_8021q · c8c0ba4f
      Vladimir Oltean 提交于
      Since the tag_8021q tagger is software-defined, it has no means by
      itself for retrieving hardware timestamps of PTP event messages.
      
      Because we do want to support PTP on ocelot even with tag_8021q, we need
      to use the CPU port module for that. The RX timestamp is present in the
      Extraction Frame Header. And because we can't use NPI mode which redirects
      the CPU queues to an "external CPU" (meaning the ARM CPU running Linux),
      then we need to poll the CPU port module through the MMIO registers to
      retrieve TX and RX timestamps.
      
      Sadly, on NXP LS1028A, the Felix switch was integrated into the SoC
      without wiring the extraction IRQ line to the ARM GIC. So, if we want to
      be notified of any PTP packets received on the CPU port module, we have
      a problem.
      
      There is a possible workaround, which is to use the Ethernet CPU port as
      a notification channel that packets are available on the CPU port module
      as well. When a PTP packet is received by the DSA tagger (without timestamp,
      of course), we go to the CPU extraction queues, poll for it there, then
      we drop the original Ethernet packet and masquerade the packet retrieved
      over MMIO (plus the timestamp) as the original when we inject it up the
      stack.
      
      Create a quirk in struct felix is selected by the Felix driver (but not
      by Seville, since that doesn't support PTP at all). We want to do this
      such that the workaround is minimally invasive for future switches that
      don't require this workaround.
      
      The only traffic for which we need timestamps is PTP traffic, so add a
      redirection rule to the CPU port module for this. Currently we only have
      the need for PTP over L2, so redirection rules for UDP ports 319 and 320
      are TBD for now.
      
      Note that for the workaround of matching of PTP-over-Ethernet-port with
      PTP-over-MMIO queues to work properly, both channels need to be
      absolutely lossless. There are two parts to achieving that:
      - We keep flow control enabled on the tag_8021q CPU port
      - We put the DSA master interface in promiscuous mode, so it will never
        drop a PTP frame (for the profiles we are interested in, these are
        sent to the multicast MAC addresses of 01-80-c2-00-00-0e and
        01-1b-19-00-00-00).
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c8c0ba4f
    • V
      net: dsa: tag_ocelot: create separate tagger for Seville · 7c4bb540
      Vladimir Oltean 提交于
      The ocelot tagger is a hot mess currently, it relies on memory
      initialized by the attached driver for basic frame transmission.
      This is against all that DSA tagging protocols stand for, which is that
      the transmission and reception of a DSA-tagged frame, the data path,
      should be independent from the switch control path, because the tag
      protocol is in principle hot-pluggable and reusable across switches
      (even if in practice it wasn't until very recently). But if another
      driver like dsa_loop wants to make use of tag_ocelot, it couldn't.
      
      This was done to have common code between Felix and Ocelot, which have
      one bit difference in the frame header format. Quoting from commit
      67c24049 ("net: dsa: felix: create a template for the DSA tags on
      xmit"):
      
          Other alternatives have been analyzed, such as:
          - Create a separate tag_seville.c: too much code duplication for just 1
            bit field difference.
          - Create a separate DSA_TAG_PROTO_SEVILLE under tag_ocelot.c, just like
            tag_brcm.c, which would have a separate .xmit function. Again, too
            much code duplication for just 1 bit field difference.
          - Allocate the template from the init function of the tag_ocelot.c
            module, instead of from the driver: couldn't figure out a method of
            accessing the correct port template corresponding to the correct
            tagger in the .xmit function.
      
      The really interesting part is that Seville should have had its own
      tagging protocol defined - it is not compatible on the wire with Ocelot,
      even for that single bit. In principle, a packet generated by
      DSA_TAG_PROTO_OCELOT when booted on NXP LS1028A would look in a certain
      way, but when booted on NXP T1040 it would look differently. The reverse
      is also true: a packet generated by a Seville switch would be
      interpreted incorrectly by Wireshark if it was told it was generated by
      an Ocelot switch.
      
      Actually things are a bit more nuanced. If we concentrate only on the
      DSA tag, what I said above is true, but Ocelot/Seville also support an
      optional DSA tag prefix, which can be short or long, and it is possible
      to distinguish the two taggers based on an integer constant put in that
      prefix. Nonetheless, creating a separate tagger is still justified,
      since the tag prefix is optional, and without it, there is again no way
      to distinguish.
      
      Claiming backwards binary compatibility is a bit more tough, since I've
      already changed the format of tag_ocelot once, in commit 5124197c
      ("net: dsa: tag_ocelot: use a short prefix on both ingress and egress").
      Therefore I am not very concerned with treating this as a bugfix and
      backporting it to stable kernels (which would be another mess due to the
      fact that there would be lots of conflicts with the other DSA_TAG_PROTO*
      definitions). It's just simpler to say that the string values of the
      taggers have ABI value starting with kernel 5.12, which will be when the
      changing of tag protocol via /sys/class/net/<dsa-master>/dsa/tagging
      goes live.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      7c4bb540
    • V
      net: dsa: tag_ocelot: single out PTP-related transmit tag processing · 62bf5fde
      Vladimir Oltean 提交于
      There is one place where we cannot avoid accessing driver data, and that
      is 2-step PTP TX timestamping, since the switch wants us to provide a
      timestamp request ID through the injection header, which naturally must
      come from a sequence number kept by the driver (it is generated by the
      .port_txtstamp method prior to the tagger's xmit).
      
      However, since other drivers like dsa_loop do not claim PTP support
      anyway, the DSA_SKB_CB(skb)->clone will always be NULL anyway, so if we
      move all PTP-related dereferences of struct ocelot and struct ocelot_port
      into a separate function, we can effectively ensure that this is dead
      code when the ocelot tagger is attached to non-ocelot switches, and the
      stateful portion of the tagger is more self-contained.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      62bf5fde
    • V
      net: mscc: ocelot: use common tag parsing code with DSA · 40d3f295
      Vladimir Oltean 提交于
      The Injection Frame Header and Extraction Frame Header that the switch
      prepends to frames over the NPI port is also prepended to frames
      delivered over the CPU port module's queues.
      
      Let's unify the handling of the frame headers by making the ocelot
      driver call some helpers exported by the DSA tagger. Among other things,
      this allows us to get rid of the strange cpu_to_be32 when transmitting
      the Injection Frame Header on ocelot, since the packing API uses
      network byte order natively (when "quirks" is 0).
      
      The comments above ocelot_gen_ifh talk about setting pop_cnt to 3, and
      the cpu extraction queue mask to something, but the code doesn't do it,
      so we don't do it either.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      40d3f295
    • V
      net: dsa: tag_ocelot: avoid accessing ds->priv in ocelot_rcv · 8a678bb2
      Vladimir Oltean 提交于
      Taggers should be written to do something valid irrespective of the
      switch driver that they are attached to. This is even more true now,
      because since the introduction of the .change_tag_protocol method, a
      certain tagger is not necessarily strictly associated with a driver any
      longer, and I would like to be able to test all taggers with dsa_loop in
      the future.
      
      In the case of ocelot, it needs to move the classified VLAN from the DSA
      tag into the skb if the port is VLAN-aware. We can allow it to do that
      by looking at the dp->vlan_filtering property, no need to invoke
      structures which are specific to ocelot.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8a678bb2
  10. 13 2月, 2021 4 次提交
    • V
      net: dsa: act as passthrough for bridge port flags · a8b659e7
      Vladimir Oltean 提交于
      There are multiple ways in which a PORT_BRIDGE_FLAGS attribute can be
      expressed by the bridge through switchdev, and not all of them can be
      emulated by DSA mid-layer API at the same time.
      
      One possible configuration is when the bridge offloads the port flags
      using a mask that has a single bit set - therefore only one feature
      should change. However, DSA currently groups together unicast and
      multicast flooding in the .port_egress_floods method, which limits our
      options when we try to add support for turning off broadcast flooding:
      do we extend .port_egress_floods with a third parameter which b53 and
      mv88e6xxx will ignore? But that means that the DSA layer, which
      currently implements the PRE_BRIDGE_FLAGS attribute all by itself, will
      see that .port_egress_floods is implemented, and will report that all 3
      types of flooding are supported - not necessarily true.
      
      Another configuration is when the user specifies more than one flag at
      the same time, in the same netlink message. If we were to create one
      individual function per offloadable bridge port flag, we would limit the
      expressiveness of the switch driver of refusing certain combinations of
      flag values. For example, a switch may not have an explicit knob for
      flooding of unknown multicast, just for flooding in general. In that
      case, the only correct thing to do is to allow changes to BR_FLOOD and
      BR_MCAST_FLOOD in tandem, and never allow mismatched values. But having
      a separate .port_set_unicast_flood and .port_set_multicast_flood would
      not allow the driver to possibly reject that.
      
      Also, DSA doesn't consider it necessary to inform the driver that a
      SWITCHDEV_ATTR_ID_BRIDGE_MROUTER attribute was offloaded, because it
      just calls .port_egress_floods for the CPU port. When we'll add support
      for the plain SWITCHDEV_ATTR_ID_PORT_MROUTER, that will become a real
      problem because the flood settings will need to be held statefully in
      the DSA middle layer, otherwise changing the mrouter port attribute will
      impact the flooding attribute. And that's _assuming_ that the underlying
      hardware doesn't have anything else to do when a multicast router
      attaches to a port than flood unknown traffic to it.  If it does, there
      will need to be a dedicated .port_set_mrouter anyway.
      
      So we need to let the DSA drivers see the exact form that the bridge
      passes this switchdev attribute in, otherwise we are standing in the
      way. Therefore we also need to use this form of language when
      communicating to the driver that it needs to configure its initial
      (before bridge join) and final (after bridge leave) port flags.
      
      The b53 and mv88e6xxx drivers are converted to the passthrough API and
      their implementation of .port_egress_floods is split into two: a
      function that configures unicast flooding and another for multicast.
      The mv88e6xxx implementation is quite hairy, and it turns out that
      the implementations of unknown unicast flooding are actually the same
      for 6185 and for 6352:
      
      behind the confusing names actually lie two individual bits:
      NO_UNKNOWN_MC -> FLOOD_UC = 0x4 = BIT(2)
      NO_UNKNOWN_UC -> FLOOD_MC = 0x8 = BIT(3)
      
      so there was no reason to entangle them in the first place.
      
      Whereas the 6185 writes to MV88E6185_PORT_CTL0_FORWARD_UNKNOWN of
      PORT_CTL0, which has the exact same bit index. I have left the
      implementations separate though, for the only reason that the names are
      different enough to confuse me, since I am not able to double-check with
      a user manual. The multicast flooding setting for 6185 is in a different
      register than for 6352 though.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      a8b659e7
    • V
      net: switchdev: pass flags and mask to both {PRE_,}BRIDGE_FLAGS attributes · e18f4c18
      Vladimir Oltean 提交于
      This switchdev attribute offers a counterproductive API for a driver
      writer, because although br_switchdev_set_port_flag gets passed a
      "flags" and a "mask", those are passed piecemeal to the driver, so while
      the PRE_BRIDGE_FLAGS listener knows what changed because it has the
      "mask", the BRIDGE_FLAGS listener doesn't, because it only has the final
      value. But certain drivers can offload only certain combinations of
      settings, like for example they cannot change unicast flooding
      independently of multicast flooding - they must be both on or both off.
      The way the information is passed to switchdev makes drivers not
      expressive enough, and unable to reject this request ahead of time, in
      the PRE_BRIDGE_FLAGS notifier, so they are forced to reject it during
      the deferred BRIDGE_FLAGS attribute, where the rejection is currently
      ignored.
      
      This patch also changes drivers to make use of the "mask" field for edge
      detection when possible.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e18f4c18
    • V
      net: dsa: configure better brport flags when ports leave the bridge · 5e38c158
      Vladimir Oltean 提交于
      For a DSA switch port operating in standalone mode, address learning
      doesn't make much sense since that is a bridge function. In fact,
      address learning even breaks setups such as this one:
      
         +---------------------------------------------+
         |                                             |
         | +-------------------+                       |
         | |        br0        |    send      receive  |
         | +--------+-+--------+ +--------+ +--------+ |
         | |        | |        | |        | |        | |
         | |  swp0  | |  swp1  | |  swp2  | |  swp3  | |
         | |        | |        | |        | |        | |
         +-+--------+-+--------+-+--------+-+--------+-+
                |         ^           |          ^
                |         |           |          |
                |         +-----------+          |
                |                                |
                +--------------------------------+
      
      because if the switch has a single FDB (can offload a single bridge)
      then source address learning on swp3 can "steal" the source MAC address
      of swp2 from br0's FDB, because learning frames coming from swp2 will be
      done twice: first on the swp1 ingress port, second on the swp3 ingress
      port. So the hardware FDB will become out of sync with the software
      bridge, and when swp2 tries to send one more packet towards swp1, the
      ASIC will attempt to short-circuit the forwarding path and send it
      directly to swp3 (since that's the last port it learned that address on),
      which it obviously can't, because swp3 operates in standalone mode.
      
      So DSA drivers operating in standalone mode should still configure a
      list of bridge port flags even when they are standalone. Currently DSA
      attempts to call dsa_port_bridge_flags with 0, which disables egress
      flooding of unknown unicast and multicast, something which doesn't make
      much sense. For the switches that implement .port_egress_floods - b53
      and mv88e6xxx, it probably doesn't matter too much either, since they
      can possibly inject traffic from the CPU into a standalone port,
      regardless of MAC DA, even if egress flooding is turned off for that
      port, but certainly not all DSA switches can do that - sja1105, for
      example, can't. So it makes sense to use a better common default there,
      such as "flood everything".
      
      It should also be noted that what DSA calls "dsa_port_bridge_flags()"
      is a degenerate name for just calling .port_egress_floods(), since
      nothing else is implemented - not learning, in particular. But disabling
      address learning, something that this driver is also coding up for, will
      be supported by individual drivers once .port_egress_floods is replaced
      with a more generic .port_bridge_flags.
      
      Previous attempts to code up this logic have been in the common bridge
      layer, but as pointed out by Ido Schimmel, there are corner cases that
      are missed when doing that:
      https://patchwork.kernel.org/project/netdevbpf/patch/20210209151936.97382-5-olteanv@gmail.com/
      
      So, at least for now, let's leave DSA in charge of setting port flags
      before and after the bridge join and leave.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5e38c158
    • V
      net: switchdev: propagate extack to port attributes · 4c08c586
      Vladimir Oltean 提交于
      When a struct switchdev_attr is notified through switchdev, there is no
      way to report informational messages, unlike for struct switchdev_obj.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NIdo Schimmel <idosch@nvidia.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: NNikolay Aleksandrov <nikolay@nvidia.com>
      Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4c08c586
  11. 12 2月, 2021 2 次提交
  12. 07 2月, 2021 3 次提交
    • V
      net: dsa: make assisted_learning_on_cpu_port bypass offloaded LAG interfaces · a324d3d4
      Vladimir Oltean 提交于
      Given the following topology, and focusing only on Box A:
      
               Box A
               +----------------------------------+
               | Board 1         br0              |
               |             +---------+          |
               |            /           \         |
               |            |           |         |
               |            |         bond0       |
               |            |        +-----+      |
               |192.168.1.1 |       /       \     |
               |  eno0     swp0    swp1    swp2   |
               +---|--------|-------|-------|-----+
                   |        |       |       |
                   +--------+       |       |
                     Cable          |       |
                               Cable|       |Cable
                     Cable          |       |
                   +--------+       |       |
                   |        |       |       |
               +---|--------|-------|-------|-----+
               |  eno0     swp0    swp1    swp2   |
               |192.168.1.2 |       \       /     |
               |            |        +-----+      |
               |            |         bond0       |
               |            |           |         |
               |            \           /         |
               |             +---------+          |
               | Board 2         br0              |
               +----------------------------------+
               Box B
      
      The assisted_learning_on_cpu_port logic will see that swp0 is bridged
      with a "foreign interface" (bond0) and will therefore install all
      addresses learnt by the software bridge towards bond0 (including the
      address of eno0 on Box B) as static addresses towards the CPU port.
      
      But that's not what we want - bond0 is not really a "foreign interface"
      but one we can offload including L2 forwarding from/towards it. So we
      need to refine our logic for assisted learning such that, whenever we
      see an address learnt on a non-DSA interface, we search through the tree
      for any port that offloads that non-DSA interface.
      
      Some confusion might arise as to why we search through the whole tree
      instead of just the local switch returned by dsa_slave_dev_lower_find.
      Or a different angle of the same confusion: why does
      dsa_slave_dev_lower_find(br_dev) return a single dp that's under br_dev
      instead of the whole list of bridged DSA ports?
      
      To answer the second question, it should be enough to install the static
      FDB entry on the CPU port of a single switch in the tree, because
      dsa_port_fdb_add uses DSA_NOTIFIER_FDB_ADD which ensures that all other
      switches in the tree get notified of that address, and add the entry
      themselves using dsa_towards_port().
      
      This should help understand the answer to the first question: the port
      returned by dsa_slave_dev_lower_find may not be on the same switch as
      the ports that offload the LAG. Nonetheless, if the driver implements
      .crosschip_lag_join and .crosschip_bridge_join as mv88e6xxx does, there
      still isn't any reason for trapping addresses learnt on the remote LAG
      towards the CPU, and we should prevent that.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      a324d3d4
    • V
      net: dsa: automatically bring user ports down when master goes down · c0a8a9c2
      Vladimir Oltean 提交于
      This is not fixing any actual bug that I know of, but having a DSA
      interface that is up even when its lower (master) interface is down is
      one of those things that just do not sound right.
      
      Yes, DSA checks if the master is up before actually bringing the
      user interface up, but nobody prevents bringing the master interface
      down immediately afterwards... Then the user ports would attempt
      dev_queue_xmit on an interface that is down, and wonder what's wrong.
      
      This patch prevents that from happening. NETDEV_GOING_DOWN is the
      notification emitted _before_ the master actually goes down, and we are
      protected by the rtnl_mutex, so all is well.
      
      For those of you reading this because you were doing switch testing
      such as latency measurements for autonomously forwarded traffic, and you
      needed a controlled environment with no extra packets sent by the
      network stack, this patch breaks that, because now the user ports go
      down too, which may shut down the PHY etc. But please don't do it like
      that, just do instead:
      
      tc qdisc add dev eno2 clsact
      tc filter add dev eno2 egress flower action drop
      
      Tested with two cascaded DSA switches:
      $ ip link set eno2 down
      sja1105 spi2.0 sw0p2: Link is Down
      mscc_felix 0000:00:00.5 swp0: Link is Down
      fsl_enetc 0000:00:00.2 eno2: Link is Down
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      c0a8a9c2
    • V
      net: dsa: automatically bring up DSA master when opening user port · 9d5ef190
      Vladimir Oltean 提交于
      DSA wants the master interface to be open before the user port is due to
      historical reasons. The promiscuity of interfaces that are down used to
      have issues, as referenced Lennert Buytenhek in commit df02c6ff
      ("dsa: fix master interface allmulti/promisc handling").
      
      The bugfix mentioned there, commit b6c40d68 ("net: only invoke
      dev->change_rx_flags when device is UP"), was basically a "don't do
      that" approach to working around the promiscuity while down issue.
      
      Further work done by Vlad Yasevich in commit d2615bf4 ("net: core:
      Always propagate flag changes to interfaces") has resolved the
      underlying issue, and it is strictly up to the DSA and 8021q drivers
      now, it is no longer mandated by the networking core that the master
      interface must be up when changing its promiscuity.
      
      From DSA's point of view, deciding to error out in dsa_slave_open
      because the master isn't up is
      (a) a bad user experience and
      (b) knocking at an open door.
      Even if there still was an issue with promiscuity while down, DSA could
      still just open the master and avoid it.
      
      Doing it this way has the additional benefit that user space can now
      remove DSA-specific workarounds, like systemd-networkd with BindCarrier:
      https://github.com/systemd/systemd/issues/7478
      
      And we can finally remove one of the 2 bullets in the "Common pitfalls
      using DSA setups" chapter.
      
      Tested with two cascaded DSA switches:
      
      $ ip link set sw0p2 up
      fsl_enetc 0000:00:00.2 eno2: configuring for fixed/internal link mode
      fsl_enetc 0000:00:00.2 eno2: Link is Up - 1Gbps/Full - flow control rx/tx
      mscc_felix 0000:00:00.5 swp0: configuring for fixed/sgmii link mode
      mscc_felix 0000:00:00.5 swp0: Link is Up - 1Gbps/Full - flow control off
      8021q: adding VLAN 0 to HW filter on device swp0
      sja1105 spi2.0 sw0p2: configuring for phy/rgmii-id link mode
      IPv6: ADDRCONF(NETDEV_CHANGE): eno2: link becomes ready
      IPv6: ADDRCONF(NETDEV_CHANGE): swp0: link becomes ready
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      9d5ef190
  13. 05 2月, 2021 1 次提交
  14. 04 2月, 2021 1 次提交
    • V
      net: dsa: fix SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING getting ignored · 99b8202b
      Vladimir Oltean 提交于
      The bridge emits VLAN filtering events and quite a few others via
      switchdev with orig_dev = br->dev. After the blamed commit, these events
      started getting ignored.
      
      The point of the patch was to not offload switchdev objects for ports
      that didn't go through dsa_port_bridge_join, because the configuration
      is unsupported:
      - ports that offload a bonding/team interface go through
        dsa_port_bridge_join when that bonding/team interface is later bridged
        with another switch port or LAG
      - ports that don't offload LAG don't get notified of the bridge that is
        on top of that LAG.
      
      Sadly, a check is missing, which is that the orig_dev is equal to the
      bridge device. This check is compatible with the original intention,
      because ports that don't offload bridging because they use a software
      LAG don't have dp->bridge_dev set.
      
      On a semi-related note, we should not offload switchdev objects or
      populate dp->bridge_dev if the driver doesn't implement .port_bridge_join
      either. However there is no regression associated with that, so it can
      be done separately.
      
      Fixes: 5696c8ae ("net: dsa: Don't offload port attributes on standalone ports")
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NTobias Waldekranz <tobias@waldekranz.com>
      Tested-by: NTobias Waldekranz <tobias@waldekranz.com>
      Link: https://lore.kernel.org/r/20210202233109.1591466-1-olteanv@gmail.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      99b8202b
  15. 30 1月, 2021 5 次提交
    • V
      net: dsa: add a second tagger for Ocelot switches based on tag_8021q · 7c83a7c5
      Vladimir Oltean 提交于
      There are use cases for which the existing tagger, based on the NPI
      (Node Processor Interface) functionality, is insufficient.
      
      Namely:
      - Frames injected through the NPI port bypass the frame analyzer, so no
        source address learning is performed, no TSN stream classification,
        etc.
      - Flow control is not functional over an NPI port (PAUSE frames are
        encapsulated in the same Extraction Frame Header as all other frames)
      - There can be at most one NPI port configured for an Ocelot switch. But
        in NXP LS1028A and T1040 there are two Ethernet CPU ports. The non-NPI
        port is currently either disabled, or operated as a plain user port
        (albeit an internally-facing one). Having the ability to configure the
        two CPU ports symmetrically could pave the way for e.g. creating a LAG
        between them, to increase bandwidth seamlessly for the system.
      
      So there is a desire to have an alternative to the NPI mode. This change
      keeps the default tagger for the Seville and Felix switches as "ocelot",
      but it can be changed via the following device attribute:
      
      echo ocelot-8021q > /sys/class/<dsa-master>/dsa/tagging
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      7c83a7c5
    • V
      net: dsa: allow changing the tag protocol via the "tagging" device attribute · 53da0eba
      Vladimir Oltean 提交于
      Currently DSA exposes the following sysfs:
      $ cat /sys/class/net/eno2/dsa/tagging
      ocelot
      
      which is a read-only device attribute, introduced in the kernel as
      commit 98cdb480 ("net: dsa: Expose tagging protocol to user-space"),
      and used by libpcap since its commit 993db3800d7d ("Add support for DSA
      link-layer types").
      
      It would be nice if we could extend this device attribute by making it
      writable:
      $ echo ocelot-8021q > /sys/class/net/eno2/dsa/tagging
      
      This is useful with DSA switches that can make use of more than one
      tagging protocol. It may be useful in dsa_loop in the future too, to
      perform offline testing of various taggers, or for changing between dsa
      and edsa on Marvell switches, if that is desirable.
      
      In terms of implementation, drivers can support this feature by
      implementing .change_tag_protocol, which should always leave the switch
      in a consistent state: either with the new protocol if things went well,
      or with the old one if something failed. Teardown of the old protocol,
      if necessary, must be handled by the driver.
      
      Some things remain as before:
      - The .get_tag_protocol is currently only called at probe time, to load
        the initial tagging protocol driver. Nonetheless, new drivers should
        report the tagging protocol in current use now.
      - The driver should manage by itself the initial setup of tagging
        protocol, no later than the .setup() method, as well as destroying
        resources used by the last tagger in use, no earlier than the
        .teardown() method.
      
      For multi-switch DSA trees, error handling is a bit more complicated,
      since e.g. the 5th out of 7 switches may fail to change the tag
      protocol. When that happens, a revert to the original tag protocol is
      attempted, but that may fail too, leaving the tree in an inconsistent
      state despite each individual switch implementing .change_tag_protocol
      transactionally. Since the intersection between drivers that implement
      .change_tag_protocol and drivers that support D in DSA is currently the
      empty set, the possibility for this error to happen is ignored for now.
      
      Testing:
      
      $ insmod mscc_felix.ko
      [   79.549784] mscc_felix 0000:00:00.5: Adding to iommu group 14
      [   79.565712] mscc_felix 0000:00:00.5: Failed to register DSA switch: -517
      $ insmod tag_ocelot.ko
      $ rmmod mscc_felix.ko
      $ insmod mscc_felix.ko
      [   97.261724] libphy: VSC9959 internal MDIO bus: probed
      [   97.267363] mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 0
      [   97.274998] mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 1
      [   97.282561] mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 2
      [   97.289700] mscc_felix 0000:00:00.5: Found PCS at internal MDIO address 3
      [   97.599163] mscc_felix 0000:00:00.5 swp0 (uninitialized): PHY [0000:00:00.3:10] driver [Microsemi GE VSC8514 SyncE] (irq=POLL)
      [   97.862034] mscc_felix 0000:00:00.5 swp1 (uninitialized): PHY [0000:00:00.3:11] driver [Microsemi GE VSC8514 SyncE] (irq=POLL)
      [   97.950731] mscc_felix 0000:00:00.5 swp0: configuring for inband/qsgmii link mode
      [   97.964278] 8021q: adding VLAN 0 to HW filter on device swp0
      [   98.146161] mscc_felix 0000:00:00.5 swp2 (uninitialized): PHY [0000:00:00.3:12] driver [Microsemi GE VSC8514 SyncE] (irq=POLL)
      [   98.238649] mscc_felix 0000:00:00.5 swp1: configuring for inband/qsgmii link mode
      [   98.251845] 8021q: adding VLAN 0 to HW filter on device swp1
      [   98.433916] mscc_felix 0000:00:00.5 swp3 (uninitialized): PHY [0000:00:00.3:13] driver [Microsemi GE VSC8514 SyncE] (irq=POLL)
      [   98.485542] mscc_felix 0000:00:00.5: configuring for fixed/internal link mode
      [   98.503584] mscc_felix 0000:00:00.5: Link is Up - 2.5Gbps/Full - flow control rx/tx
      [   98.527948] device eno2 entered promiscuous mode
      [   98.544755] DSA: tree 0 setup
      
      $ ping 10.0.0.1
      PING 10.0.0.1 (10.0.0.1): 56 data bytes
      64 bytes from 10.0.0.1: seq=0 ttl=64 time=2.337 ms
      64 bytes from 10.0.0.1: seq=1 ttl=64 time=0.754 ms
      ^C
       -  10.0.0.1 ping statistics  -
      2 packets transmitted, 2 packets received, 0% packet loss
      round-trip min/avg/max = 0.754/1.545/2.337 ms
      
      $ cat /sys/class/net/eno2/dsa/tagging
      ocelot
      $ cat ./test_ocelot_8021q.sh
              #!/bin/bash
      
              ip link set swp0 down
              ip link set swp1 down
              ip link set swp2 down
              ip link set swp3 down
              ip link set swp5 down
              ip link set eno2 down
              echo ocelot-8021q > /sys/class/net/eno2/dsa/tagging
              ip link set eno2 up
              ip link set swp0 up
              ip link set swp1 up
              ip link set swp2 up
              ip link set swp3 up
              ip link set swp5 up
      $ ./test_ocelot_8021q.sh
      ./test_ocelot_8021q.sh: line 9: echo: write error: Protocol not available
      $ rmmod tag_ocelot.ko
      rmmod: can't unload module 'tag_ocelot': Resource temporarily unavailable
      $ insmod tag_ocelot_8021q.ko
      $ ./test_ocelot_8021q.sh
      $ cat /sys/class/net/eno2/dsa/tagging
      ocelot-8021q
      $ rmmod tag_ocelot.ko
      $ rmmod tag_ocelot_8021q.ko
      rmmod: can't unload module 'tag_ocelot_8021q': Resource temporarily unavailable
      $ ping 10.0.0.1
      PING 10.0.0.1 (10.0.0.1): 56 data bytes
      64 bytes from 10.0.0.1: seq=0 ttl=64 time=0.953 ms
      64 bytes from 10.0.0.1: seq=1 ttl=64 time=0.787 ms
      64 bytes from 10.0.0.1: seq=2 ttl=64 time=0.771 ms
      $ rmmod mscc_felix.ko
      [  645.544426] mscc_felix 0000:00:00.5: Link is Down
      [  645.838608] DSA: tree 0 torn down
      $ rmmod tag_ocelot_8021q.ko
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      53da0eba
    • V
      net: dsa: keep a copy of the tagging protocol in the DSA switch tree · 357f203b
      Vladimir Oltean 提交于
      Cascading DSA switches can be done multiple ways. There is the brute
      force approach / tag stacking, where one upstream switch, located
      between leaf switches and the host Ethernet controller, will just
      happily transport the DSA header of those leaf switches as payload.
      For this kind of setups, DSA works without any special kind of treatment
      compared to a single switch - they just aren't aware of each other.
      Then there's the approach where the upstream switch understands the tags
      it transports from its leaves below, as it doesn't push a tag of its own,
      but it routes based on the source port & switch id information present
      in that tag (as opposed to DMAC & VID) and it strips the tag when
      egressing a front-facing port. Currently only Marvell implements the
      latter, and Marvell DSA trees contain only Marvell switches.
      
      So it is safe to say that DSA trees already have a single tag protocol
      shared by all switches, and in fact this is what makes the switches able
      to understand each other. This fact is also implied by the fact that
      currently, the tagging protocol is reported as part of a sysfs installed
      on the DSA master and not per port, so it must be the same for all the
      ports connected to that DSA master regardless of the switch that they
      belong to.
      
      It's time to make this official and enforce it (yes, this also means we
      won't have any "switch understands tag to some extent but is not able to
      speak it" hardware oddities that we'll support in the future).
      
      This is needed due to the imminent introduction of the dsa_switch_ops::
      change_tag_protocol driver API. When that is introduced, we'll have
      to notify switches of the tagging protocol that they're configured to
      use. Currently the tag_ops structure pointer is held only for CPU ports.
      But there are switches which don't have CPU ports and nonetheless still
      need to be configured. These would be Marvell leaf switches whose
      upstream port is just a DSA link. How do we inform these of their
      tagging protocol setup/deletion?
      
      One answer to the above would be: iterate through the DSA switch tree's
      ports once, list the CPU ports, get their tag_ops, then iterate again
      now that we have it, and notify everybody of that tag_ops. But what to
      do if conflicts appear between one cpu_dp->tag_ops and another? There's
      no escaping the fact that conflict resolution needs to be done, so we
      can be upfront about it.
      
      Ease our work and just keep the master copy of the tag_ops inside the
      struct dsa_switch_tree. Reference counting is now moved to be per-tree
      too, instead of per-CPU port.
      
      There are many places in the data path that access master->dsa_ptr->tag_ops
      and we would introduce unnecessary performance penalty going through yet
      another indirection, so keep those right where they are.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      357f203b
    • V
      net: dsa: document the existing switch tree notifiers and add a new one · 886f8e26
      Vladimir Oltean 提交于
      The existence of dsa_broadcast has generated some confusion in the past:
      https://www.mail-archive.com/netdev@vger.kernel.org/msg365042.html
      
      So let's document the existing dsa_port_notify and dsa_broadcast
      functions and explain when each of them should be used.
      
      Also, in fact, the in-between function has always been there but was
      lacking a name, and is the main reason for this patch: dsa_tree_notify.
      Refactor dsa_broadcast to use it.
      
      This patch also moves dsa_broadcast (a top-level function) to dsa2.c,
      where it really belonged in the first place, but had no companion so it
      stood with dsa_port_notify.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      886f8e26
    • V
      net: dsa: tag_8021q: add helpers to deduce whether a VLAN ID is RX or TX VLAN · 9c7caf28
      Vladimir Oltean 提交于
      The sja1105 implementation can be blind about this, but the felix driver
      doesn't do exactly what it's being told, so it needs to know whether it
      is a TX or an RX VLAN, so it can install the appropriate type of TCAM
      rule.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      9c7caf28
  16. 16 1月, 2021 3 次提交
    • V
      net: dsa: add ops for devlink-sb · 2a6ef763
      Vladimir Oltean 提交于
      Switches that care about QoS might have hardware support for reserving
      buffer pools for individual ports or traffic classes, and configuring
      their sizes and thresholds. Through devlink-sb (shared buffers), this is
      all configurable, as well as their occupancy being viewable.
      
      Add the plumbing in DSA for these operations.
      
      Individual drivers still need to call devlink_sb_register() with the
      shared buffers they want to expose. A helper was not created in DSA for
      this purpose (unlike, say, dsa_devlink_params_register), since in my
      opinion it does not bring any benefit over plainly calling
      devlink_sb_register() directly.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      2a6ef763
    • V
      net: dsa: set configure_vlan_while_not_filtering to true by default · 0ee2af4e
      Vladimir Oltean 提交于
      As explained in commit 54a0ed0d ("net: dsa: provide an option for
      drivers to always receive bridge VLANs"), DSA has historically been
      skipping VLAN switchdev operations when the bridge wasn't in
      vlan_filtering mode, but the reason why it was doing that has never been
      clear. So the configure_vlan_while_not_filtering option is there merely
      to preserve functionality for existing drivers. It isn't some behavior
      that drivers should opt into. Ideally, when all drivers leave this flag
      set, we can delete the dsa_port_skip_vlan_configuration() function.
      
      New drivers always seem to omit setting this flag, for some reason. So
      let's reverse the logic: the DSA core sets it by default to true before
      the .setup() callback, and legacy drivers can turn it off. This way, new
      drivers get the new behavior by default, unless they explicitly set the
      flag to false, which is more obvious during review.
      
      Remove the assignment from drivers which were setting it to true, and
      add the assignment to false for the drivers that didn't previously have
      it. This way, it should be easier to see how many we have left.
      
      The following drivers: lan9303, mv88e6060 were skipped from setting this
      flag to false, because they didn't have any VLAN offload ops in the
      first place.
      
      The Broadcom Starfighter 2 driver calls the common b53_switch_alloc and
      therefore also inherits the configure_vlan_while_not_filtering=true
      behavior.
      
      Also, print a message through netlink extack every time a VLAN has been
      skipped. This is mildly annoying on purpose, so that (a) it is at least
      clear that VLANs are being skipped - the legacy behavior in itself is
      confusing, and the extack should be much more difficult to miss, unlike
      kernel logs - and (b) people have one more incentive to convert to the
      new behavior.
      
      No behavior change except for the added prints is intended at this time.
      
      $ ip link add br0 type bridge vlan_filtering 0
      $ ip link set sw0p2 master br0
      [   60.315148] br0: port 1(sw0p2) entered blocking state
      [   60.320350] br0: port 1(sw0p2) entered disabled state
      [   60.327839] device sw0p2 entered promiscuous mode
      [   60.334905] br0: port 1(sw0p2) entered blocking state
      [   60.340142] br0: port 1(sw0p2) entered forwarding state
      Warning: dsa_core: skipping configuration of VLAN. # This was the pvid
      $ bridge vlan add dev sw0p2 vid 100
      Warning: dsa_core: skipping configuration of VLAN.
      Signed-off-by: NVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: NKurt Kanzenbach <kurt@linutronix.de>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Link: https://lore.kernel.org/r/20210115231919.43834-1-vladimir.oltean@nxp.comSigned-off-by: NJakub Kicinski <kuba@kernel.org>
      0ee2af4e
    • G
      dsa: add support for Arrow XRS700x tag trailer · 54a52823
      George McCollister 提交于
      Add support for Arrow SpeedChips XRS700x single byte tag trailer. This
      is modeled on tag_trailer.c which works in a similar way.
      Signed-off-by: NGeorge McCollister <george.mccollister@gmail.com>
      Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: NFlorian Fainelli <f.fainelli@gmail.com>
      Reviewed-by: NVladimir Oltean <olteanv@gmail.com>
      Signed-off-by: NJakub Kicinski <kuba@kernel.org>
      54a52823