- 05 8月, 2008 1 次提交
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由 Haavard Skinnemoen 提交于
Add arch/avr32/mach-*/include to include search path and copy all the files from include/asm/arch there. The old files will be removed once ARM does the same change and all common drivers are converted. Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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- 27 7月, 2008 1 次提交
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由 David Brownell 提交于
Minor cleanups for the MMC/SD support on avr32: - Make at32_add_device_mci() properly initialize "missing" platform data ... so boards like STK1002 won't try GPIO 0. - Switch over to gpio_is_valid() instead of testing for only one designated value. - Provide STK1002 platform data for the unlikely case that switches are set so first Ethernet controller isn't in use. (That's the only way to get card detect and writeprotect switch sensing on the STK1000.) And get rid of one "unused variable" warning. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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- 26 7月, 2008 1 次提交
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由 David Brownell 提交于
This adds a simple sysfs interface for GPIOs. /sys/class/gpio /export ... asks the kernel to export a GPIO to userspace /unexport ... to return a GPIO to the kernel /gpioN ... for each exported GPIO #N /value ... always readable, writes fail for input GPIOs /direction ... r/w as: in, out (default low); write high, low /gpiochipN ... for each gpiochip; #N is its first GPIO /base ... (r/o) same as N /label ... (r/o) descriptive, not necessarily unique /ngpio ... (r/o) number of GPIOs; numbered N .. N+(ngpio - 1) GPIOs claimed by kernel code may be exported by its owner using a new gpio_export() call, which should be most useful for driver debugging. Such exports may optionally be done without a "direction" attribute. Userspace may ask to take over a GPIO by writing to a sysfs control file, helping to cope with incomplete board support or other "one-off" requirements that don't merit full kernel support: echo 23 > /sys/class/gpio/export ... will gpio_request(23, "sysfs") and gpio_export(23); use /sys/class/gpio/gpio-23/direction to (re)configure it, when that GPIO can be used as both input and output. echo 23 > /sys/class/gpio/unexport ... will gpio_free(23), when it was exported as above The extra D-space footprint is a few hundred bytes, except for the sysfs resources associated with each exported GPIO. The additional I-space footprint is about two thirds of the current size of gpiolib (!). Since no /dev node creation is involved, no "udev" support is needed. Related changes: * This adds a device pointer to "struct gpio_chip". When GPIO providers initialize that, sysfs gpio class devices become children of that device instead of being "virtual" devices. * The (few) gpio_chip providers which have such a device node have been updated. * Some gpio_chip drivers also needed to update their module "owner" field ... for which missing kerneldoc was added. * Some gpio_chips don't support input GPIOs. Those GPIOs are now flagged appropriately when the chip is registered. Based on previous patches, and discussion both on and off LKML. A Documentation/ABI/testing/sysfs-gpio update is ready to submit once this merges to mainline. [akpm@linux-foundation.org: a few maintenance build fixes] Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Cc: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de> Cc: Greg KH <greg@kroah.com> Cc: Kay Sievers <kay.sievers@vrfy.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 24 7月, 2008 1 次提交
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由 Hans-Christian Egtvedt 提交于
This patch adds platform data to the AC97C platform device. This will let the board add a GPIO line which is connected to the external codecs reset line. The platform data, ac97c_platform_data, must also contain the DMA controller ID, RX channel ID and TX channel ID. Tested with Wolfson WM9712 and AP7000. Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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- 18 7月, 2008 1 次提交
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由 Ben Nizette 提交于
This patch does a few small cleanups around the atmel mci platform code and in the atmel-mci driver. The platform changes simply removes an unused variable, uses the fact that by the end we always have some form of platform data and notes that GPIO_PIN_NONE != 0. This last point could cause the incorrect attempt to twice reserve pin PA0. While we've got the hood up, add linux/err.h to the atmel-mci.c include list. It needs it and generally pulls it by voodoo but I did once stumble across a config which don't build. This is against Linus' latest git. Signed-off-by: NBen Nizette <bn@niasdigital.com> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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- 15 7月, 2008 1 次提交
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由 Haavard Skinnemoen 提交于
This is a driver for the MMC controller on the AP7000 chips from Atmel. It should in theory work on AT91 systems too with some tweaking, but since the DMA interface is quite different, it's not entirely clear if it's worth merging this with the at91_mci driver. This driver has been around for a while in BSPs and kernel sources provided by Atmel, but this particular version uses the generic DMA Engine framework (with the slave extensions) instead of an avr32-only DMA controller framework. This driver can also use PIO transfers when no DMA channels are available, and for transfers where using DMA may be difficult or impractical for some reason (e.g. the DMA setup overhead is usually not worth it for very short transfers, and badly aligned buffers or lengths are difficult to handle.) Currently, the driver only support PIO transfers. DMA support has been split out to a separate patch to hopefully make it easier to review. The driver has been tested using mmc-block and ext3fs on several SD, SDHC and MMC+ cards. Reads and writes work fine, with read transfer rates up to 3.5 MiB/s on fast cards with debugging disabled. The driver has also been tested using the mmc_test module on the same cards. All tests except 7, 9, 15 and 17 succeed. The first two are unsupported by all the cards I have, so I don't know if the driver handles this correctly. The last two fail because the hardware flags a Data CRC Error instead of a Data Timeout error. I'm not sure how to deal with that. Documentation for this controller can be found in many data sheets from Atmel, including the AT32AP7000 data sheet which can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 09 7月, 2008 1 次提交
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由 Haavard Skinnemoen 提交于
This adds a driver for the Synopsys DesignWare DMA controller (aka DMACA on AVR32 systems.) This DMA controller can be found integrated on the AT32AP7000 chip and is primarily meant for peripheral DMA transfer, but can also be used for memory-to-memory transfers. This patch is based on a driver from David Brownell which was based on an older version of the DMA Engine framework. It also implements the proposed extensions to the DMA Engine API for slave DMA operations. The dmatest client shows no problems, but there may still be room for improvement performance-wise. DMA slave transfer performance is definitely "good enough"; reading 100 MiB from an SD card running at ~20 MHz yields ~7.2 MiB/s average transfer rate. Full documentation for this controller can be found in the Synopsys DW AHB DMAC Databook: http://www.synopsys.com/designware/docs/iip/DW_ahb_dmac/latest/doc/dw_ahb_dmac_db.pdf The controller has lots of implementation options, so it's usually a good idea to check the data sheet of the chip it's intergrated on as well. The AT32AP7000 data sheet can be found here: http://www.atmel.com/dyn/products/datasheets.asp?family_id=682 Changes since v4: * Use client_count instead of dma_chan_is_in_use() * Add missing include * Unmap buffers unless client told us not to Changes since v3: * Update to latest DMA engine and DMA slave APIs * Embed the hw descriptor into the sw descriptor * Clean up and update MODULE_DESCRIPTION, copyright date, etc. Changes since v2: * Dequeue all pending transfers in terminate_all() * Rename dw_dmac.h -> dw_dmac_regs.h * Define and use controller-specific dma_slave data * Fix up a few outdated comments * Define hardware registers as structs (doesn't generate better code, unfortunately, but it looks nicer.) * Get number of channels from platform_data instead of hardcoding it based on CONFIG_WHATEVER_CPU. * Give slave clients exclusive access to the channel Acked-by: Maciej Sosnowski <maciej.sosnowski@intel.com>, Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: NDan Williams <dan.j.williams@intel.com>
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- 04 7月, 2008 1 次提交
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由 Hans-Christian Egtvedt 提交于
Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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- 02 7月, 2008 4 次提交
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由 Haavard Skinnemoen 提交于
Implement Standby support. In this mode, we'll suspend all drivers, put the SDRAM in self-refresh mode and switch off the HSB bus ("frozen" mode.) Implement Suspend-to-mem support. In this mode, we suspend all drivers, put the SDRAM into self-refresh mode and switch off all internal clocks except the 32 kHz oscillator ("stop" mode.) The lowest-level suspend code runs from a small portion of SRAM allocated at startup time. This gets rid of a small potential race with the SDRAM where we might try to enter self-refresh mode in the middle of an icache burst. We also relocate all interrupt and exception handlers to SRAM during the small window when we enter and exit the low-power modes. We don't need to do any special tricks to start and stop the PLL. The main clock is automatically gated by hardware until the PLL is stable. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
This makes the intc show up in sysfs (probably not very useful), and allows us to easily add suspend/resume support later. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Add SRAM allocator for avr32, which is just a thin wrapper around genalloc. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
The SDRAM controller needs a clock in order to respond to our commands, and suspend doesn't work very well without the SDRAM in self-refresh mode. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 28 6月, 2008 2 次提交
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由 Haavard Skinnemoen 提交于
The only thing left in at32ap.c is some PDC stuff. Rename the file to reflect what it actually does. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Combine at32_clock_init() and at32_portmux_init() into setup_platform() and remove setup_platform() from at32ap.c. No functional change since all setup_platform() ever did was call those two functions. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 27 6月, 2008 6 次提交
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由 Sedji Gaouaou 提交于
The name "mck" causes a conflict on AT91. Call it "pwm_clk" instead. Signed-off-by: NSedji Gaouaou <sedji.gaouaou@atmel.com> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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由 David Brownell 提交于
This is a minor tweak to the at32ap700x pin configuration for the SPI input pin (MISO), enabling the on-chip weak pullup (typical 190K) to (a) ensure a fixed data value for missing or input-only slaves; (b) prevent power waste associated with inputs floating near VDDIO/2. Atmel's boards have no external pullup or pulldown on these pins, so it's unlikely other boards would address these issues with external pulldowns. Were there trouble, board-specific code could turn off the relevant pullup(s). Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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由 Hans-Christian Egtvedt 提交于
This patch adds the PS/2 interface (PSIF) to the device code, split into two platform devices, one for each port. The function for adding the PSIF platform device is also added to the board header file. Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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由 Hans-Christian Egtvedt 提交于
This patch lets the board code choose which pin out to use for the LCD interface. On AT32AP7000 the LCDC is wired to two sets of pins, which lets the user choose between dual ethernet and 32-bit EBI. For the ATNGW100 board it is vital to have the choice to select the alternative pinout since this pinout is routed to the external headers. Update ATSTK1002 and ATSTK1004 to use the new interface. Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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由 David Brownell 提交于
On the odd chance some code uses a pin as a GPIO IRQ without calling gpio_request() or gpio_direction_input(), the debug dump should still show its pin status. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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由 Alex 提交于
On our custom board we have other oscillator rates than on atngw100 and atstk100x. Currently these rates are hardcoded in arch/avr32/mach-at32ap/at32ap700x.c. This patch moves them into board specific code. Signed-off-by: NAlex Raimondi <raimondi@miromico.ch> Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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- 07 6月, 2008 2 次提交
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由 Håvard Skinnemoen 提交于
This function initializes and adds a platform_device for a NAND flash interface on SMC chip select 3. Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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由 Håvard Skinnemoen 提交于
The board init code, typically running from postcore_initcall, may need to set up SMC timings. We have to make sure the SMC driver is ready before this happens. Signed-off-by: NHåvard Skinnemoen <haavard.skinnemoen@atmel.com> Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>
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- 27 5月, 2008 1 次提交
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由 Haavard Skinnemoen 提交于
Move the AP7 cpufreq init to late_initcall() so that we don't try to bring up cpufreq until the governor is ready. x86 also uses late_initcall() for this. Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
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- 20 4月, 2008 5 次提交
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由 Hans-Christian Egtvedt 提交于
This patch is a take two of adding full functionality to PLL1 on AT32AP7000. This allows board-specific code and drivers to configure and enable PLL1. This is useful when precise control over the frequency of e.g. a genclock is needed and requested by users for the ABDAC device. The patch is based upon previous patches from both Haavard Skinnemoen and David Brownell. Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 David Brownell 提交于
This combines three patches from David Brownell: * avr32: tclib support * avr32: simplify clocksources * avr32: Turn count/compare into a oneshot clockevent device Register both TC blocks (instead of just the first one) so that the AT32/AT91 tclib code will pick them up (instead of just the avr32-only PIT-style clocksource). Rename the first one and its resources appropriately. More cleanups to the cycle counter clocksource code - Disable all the weak symbol magic; remove the AVR32-only TCB-based clocksource code (source and header). - Mark the __init code properly. - Don't forget to report IRQF_TIMER. - Make the system work properly with this clocksource, by preventing use of the CPU "idle" sleep state in the idle loop when it's used. Package the avr32 count/compare timekeeping support as a oneshot clockevent device, so it supports NO_HZ and high res timers. This means it also supports plugging in other clockevent devices and clocksources. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Create a new file, pm-at32ap700x.S, in mach-at32ap and move the CPU idle sleep code there. Make it possible to disable the sleep code. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Move the only thing that was actually implemented and used in asm/intc.h, intc_get_pending(), into asm/irq.h and delete asm/intc.h Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Ben Nizette 提交于
New-style I2C drivers require that motherboard-mounted I2C devices are registered with the I2C core, typically at arch_initcall time. This can be done nice and neat by passing the struct i2c_board_info[] through at32_add_device_twi just like we do for the SPI board info. While we've got the hood up, remove a duplicate declaration of at32_add_device_twi() in board.h. [hskinnemoen@atmel.com: add missing i2c_board_info forward-declaration] Signed-Off-By: NBen Nizette <bn@niasdigital.com> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 07 4月, 2008 1 次提交
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由 Stelian Pop 提交于
The atmel_usba_udc driver is being used by several platforms and arches (avr32 and at91 ATM), and each platform may have different endpoint settings. The patch below moves the endpoint declarations into the platform data and make the necessary adjustments for AVR32 (improved by Haavard Skinnemoen <hskinnemoen@atmel.com>). Signed-off-by: NStelian Pop <stelian@popies.net> Acked-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 09 2月, 2008 1 次提交
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由 David Brownell 提交于
PWM device setup, and a simple PWM driver exposing a programming interface giving access to each channel's full capabilities. Note that this doesn't support starting several channels in synch. [hskinnemoen@atmel.com: allocate platform device dynamically] [hskinnemoen@atmel.com: Kconfig fix] Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 06 2月, 2008 1 次提交
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由 David Brownell 提交于
Teach AVR32 to use the "GPIO Library" when exposing its GPIOs, so that signals on external chips (like GPIO expanders) can easily be used. This mostly reorganizes some existing logic, with two minor changes in behavior: - The PSR registers are used instead of the previous "gpio_mask" values, matching AT91 behavior and removing some duplication between that role and that of "pinmux_mask". - NR_IRQs grew to acommodate a bank of external GPIOs. Eventually this number should probably become a board-specific config option. There's a debugfs dump of status for the built-in GPIOs, showing which pins have deglitching, pullups, or open drain drive enabled, as well as the ID string used when requesting each IRQ. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Acked-by: NHaavard Skinnemoen <hskinnemoen@atmel.com> Cc: Jean Delvare <khali@linux-fr.org> Cc: Eric Miao <eric.miao@marvell.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Philipp Zabel <philipp.zabel@gmail.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Ben Gardner <bgardner@wabtec.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 25 1月, 2008 4 次提交
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由 Haavard Skinnemoen 提交于
David Brownell pointed out a mismatch in the avr32 extint code: > I noticed a small glitch that's not fixed by this patch: the > initial type is falling edge, but IRQ_TYPE_NONE is mapped to > IRQ_TYPE_LEVEL_LOW. Potentially surprising. Fix it by setting the initial type (and handler) to low level, matching the meaning of IRQ_TYPE_NONE. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 David Brownell 提交于
Update the AVR32 EIC code to use the new __set_irq_handler_unlocked() call, getting rid of one more instance of this widespread problem. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Change the NMI handler to use the die notifier chain to signal anyone who cares. Add a simple "nmi debugger" which hooks into this chain and that may dump registers, task state, etc. when it happens. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
These are derivatives of the AT32AP7000 chip, which means that most of the code stays the same. Rename a few files, functions, definitions and config symbols to reflect that they apply to all AP700x chips, and exclude some platform devices from chips where they aren't present. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 15 11月, 2007 4 次提交
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由 Haavard Skinnemoen 提交于
Oprofile needs to call intc_get_pending() in order to determine whether a performance counter interrupt is pending. Also, include the header which declares intc_get_pending() and fix the definition to match the prototype. Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 ben.nizette@iinet.net.au 提交于
There's a duplicate clock index between USART0 and USART1 which may be causing system crashes when USART0 is used. Change the USART0 index to '3', indicating the clock that is actually used by USART0. Signed-off-by: NBen Nizette <ben@niasdigital.com> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Haavard Skinnemoen 提交于
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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由 Hans-Christian Egtvedt 提交于
This patch extends the I/O resource to 0xfff000cf which will enable the watchdog driver to access the reset cause (RCAUSE) register. Making it capable of reporting boot status. Signed-off-by: NHans-Christian Egtvedt <hcegtvedt@atmel.com> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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- 23 10月, 2007 1 次提交
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由 Alejandro Martinez Ruiz 提交于
Signed-off-by: NAlejandro Martinez Ruiz <alex@flawedcode.org> Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
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