1. 22 9月, 2014 9 次提交
  2. 29 8月, 2014 2 次提交
  3. 22 8月, 2014 1 次提交
  4. 19 8月, 2014 1 次提交
  5. 07 8月, 2014 2 次提交
  6. 05 8月, 2014 5 次提交
  7. 31 7月, 2014 1 次提交
    • A
      KVM: PPC: PR: Handle FSCR feature deselects · 8e6afa36
      Alexander Graf 提交于
      We handle FSCR feature bits (well, TAR only really today) lazily when the guest
      starts using them. So when a guest activates the bit and later uses that feature
      we enable it for real in hardware.
      
      However, when the guest stops using that bit we don't stop setting it in
      hardware. That means we can potentially lose a trap that the guest expects to
      happen because it thinks a feature is not active.
      
      This patch adds support to drop TAR when then guest turns it off in FSCR. While
      at it it also restricts FSCR access to 64bit systems - 32bit ones don't have it.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      8e6afa36
  8. 30 7月, 2014 1 次提交
  9. 29 7月, 2014 3 次提交
  10. 28 7月, 2014 15 次提交
    • A
      KVM: PPC: Handle magic page in kvmppc_ld/st · c12fb43c
      Alexander Graf 提交于
      We use kvmppc_ld and kvmppc_st to emulate load/store instructions that may as
      well access the magic page. Special case it out so that we can properly access
      it.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c12fb43c
    • A
      KVM: PPC: Use kvm_read_guest in kvmppc_ld · c45c5514
      Alexander Graf 提交于
      We have a nice and handy helper to read from guest physical address space,
      so we should make use of it in kvmppc_ld as we already do for its counterpart
      in kvmppc_st.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c45c5514
    • A
      KVM: PPC: Remove kvmppc_bad_hva() · 9897e88a
      Alexander Graf 提交于
      We have a proper define for invalid HVA numbers. Use those instead of the
      ppc specific kvmppc_bad_hva().
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      9897e88a
    • A
      KVM: PPC: Move kvmppc_ld/st to common code · 35c4a733
      Alexander Graf 提交于
      We have enough common infrastructure now to resolve GVA->GPA mappings at
      runtime. With this we can move our book3s specific helpers to load / store
      in guest virtual address space to common code as well.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      35c4a733
    • A
      KVM: PPC: Implement kvmppc_xlate for all targets · 7d15c06f
      Alexander Graf 提交于
      We have a nice API to find the translated GPAs of a GVA including protection
      flags. So far we only use it on Book3S, but there's no reason the same shouldn't
      be used on BookE as well.
      
      Implement a kvmppc_xlate() version for BookE and clean it up to make it more
      readable in general.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      7d15c06f
    • A
      KVM: PPC: BOOK3S: HV: Update compute_tlbie_rb to handle 16MB base page · 63fff5c1
      Aneesh Kumar K.V 提交于
      When calculating the lower bits of AVA field, use the shift
      count based on the base page size. Also add the missing segment
      size and remove stale comment.
      Signed-off-by: NAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      63fff5c1
    • A
      KVM: PPC: Book3S: Provide different CAPs based on HV or PR mode · 7a58777a
      Alexander Graf 提交于
      With Book3S KVM we can create both PR and HV VMs in parallel on the same
      machine. That gives us new challenges on the CAPs we return - both have
      different capabilities.
      
      When we get asked about CAPs on the kvm fd, there's nothing we can do. We
      can try to be smart and assume we're running HV if HV is available, PR
      otherwise. However with the newly added VM CHECK_EXTENSION we can now ask
      for capabilities directly on a VM which knows whether it's PR or HV.
      
      With this patch I can successfully expose KVM PVINFO data to user space
      in the PR case, fixing magic page mapping for PAPR guests.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Acked-by: NPaolo Bonzini <pbonzini@redhat.com>
      7a58777a
    • A
      KVM: Rename and add argument to check_extension · 784aa3d7
      Alexander Graf 提交于
      In preparation to make the check_extension function available to VM scope
      we add a struct kvm * argument to the function header and rename the function
      accordingly. It will still be called from the /dev/kvm fd, but with a NULL
      argument for struct kvm *.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Acked-by: NPaolo Bonzini <pbonzini@redhat.com>
      784aa3d7
    • S
      Use the POWER8 Micro Partition Prefetch Engine in KVM HV on POWER8 · 9678cdaa
      Stewart Smith 提交于
      The POWER8 processor has a Micro Partition Prefetch Engine, which is
      a fancy way of saying "has way to store and load contents of L2 or
      L2+MRU way of L3 cache". We initiate the storing of the log (list of
      addresses) using the logmpp instruction and start restore by writing
      to a SPR.
      
      The logmpp instruction takes parameters in a single 64bit register:
      - starting address of the table to store log of L2/L2+L3 cache contents
        - 32kb for L2
        - 128kb for L2+L3
        - Aligned relative to maximum size of the table (32kb or 128kb)
      - Log control (no-op, L2 only, L2 and L3, abort logout)
      
      We should abort any ongoing logging before initiating one.
      
      To initiate restore, we write to the MPPR SPR. The format of what to write
      to the SPR is similar to the logmpp instruction parameter:
      - starting address of the table to read from (same alignment requirements)
      - table size (no data, until end of table)
      - prefetch rate (from fastest possible to slower. about every 8, 16, 24 or
        32 cycles)
      
      The idea behind loading and storing the contents of L2/L3 cache is to
      reduce memory latency in a system that is frequently swapping vcores on
      a physical CPU.
      
      The best case scenario for doing this is when some vcores are doing very
      cache heavy workloads. The worst case is when they have about 0 cache hits,
      so we just generate needless memory operations.
      
      This implementation just does L2 store/load. In my benchmarks this proves
      to be useful.
      
      Benchmark 1:
       - 16 core POWER8
       - 3x Ubuntu 14.04LTS guests (LE) with 8 VCPUs each
       - No split core/SMT
       - two guests running sysbench memory test.
         sysbench --test=memory --num-threads=8 run
       - one guest running apache bench (of default HTML page)
         ab -n 490000 -c 400 http://localhost/
      
      This benchmark aims to measure performance of real world application (apache)
      where other guests are cache hot with their own workloads. The sysbench memory
      benchmark does pointer sized writes to a (small) memory buffer in a loop.
      
      In this benchmark with this patch I can see an improvement both in requests
      per second (~5%) and in mean and median response times (again, about 5%).
      The spread of minimum and maximum response times were largely unchanged.
      
      benchmark 2:
       - Same VM config as benchmark 1
       - all three guests running sysbench memory benchmark
      
      This benchmark aims to see if there is a positive or negative affect to this
      cache heavy benchmark. Although due to the nature of the benchmark (stores) we
      may not see a difference in performance, but rather hopefully an improvement
      in consistency of performance (when vcore switched in, don't have to wait
      many times for cachelines to be pulled in)
      
      The results of this benchmark are improvements in consistency of performance
      rather than performance itself. With this patch, the few outliers in duration
      go away and we get more consistent performance in each guest.
      
      benchmark 3:
       - same 3 guests and CPU configuration as benchmark 1 and 2.
       - two idle guests
       - 1 guest running STREAM benchmark
      
      This scenario also saw performance improvement with this patch. On Copy and
      Scale workloads from STREAM, I got 5-6% improvement with this patch. For
      Add and triad, it was around 10% (or more).
      
      benchmark 4:
       - same 3 guests as previous benchmarks
       - two guests running sysbench --memory, distinctly different cache heavy
         workload
       - one guest running STREAM benchmark.
      
      Similar improvements to benchmark 3.
      
      benchmark 5:
       - 1 guest, 8 VCPUs, Ubuntu 14.04
       - Host configured with split core (SMT8, subcores-per-core=4)
       - STREAM benchmark
      
      In this benchmark, we see a 10-20% performance improvement across the board
      of STREAM benchmark results with this patch.
      
      Based on preliminary investigation and microbenchmarks
      by Prerna Saxena <prerna@linux.vnet.ibm.com>
      Signed-off-by: NStewart Smith <stewart@linux.vnet.ibm.com>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      9678cdaa
    • S
      Split out struct kvmppc_vcore creation to separate function · de9bdd1a
      Stewart Smith 提交于
      No code changes, just split it out to a function so that with the addition
      of micro partition prefetch buffer allocation (in subsequent patch) looks
      neater and doesn't require excessive indentation.
      Signed-off-by: NStewart Smith <stewart@linux.vnet.ibm.com>
      Acked-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      de9bdd1a
    • P
      KVM: PPC: Book3S: Make kvmppc_ld return a more accurate error indication · 1b2e33b0
      Paul Mackerras 提交于
      At present, kvmppc_ld calls kvmppc_xlate, and if kvmppc_xlate returns
      any error indication, it returns -ENOENT, which is taken to mean an
      HPTE not found error.  However, the error could have been a segment
      found (no SLB entry) or a permission error.  Similarly,
      kvmppc_pte_to_hva currently does permission checking, but any error
      from it is taken by kvmppc_ld to mean that the access is an emulated
      MMIO access.  Also, kvmppc_ld does no execute permission checking.
      
      This fixes these problems by (a) returning any error from kvmppc_xlate
      directly, (b) moving the permission check from kvmppc_pte_to_hva
      into kvmppc_ld, and (c) adding an execute permission check to kvmppc_ld.
      
      This is similar to what was done for kvmppc_st() by commit 82ff911317c3
      ("KVM: PPC: Deflect page write faults properly in kvmppc_st").
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      1b2e33b0
    • P
      KVM: PPC: Book3S PR: Take SRCU read lock around RTAS kvm_read_guest() call · ef1af2e2
      Paul Mackerras 提交于
      This does for PR KVM what c9438092 ("KVM: PPC: Book3S HV: Take SRCU
      read lock around kvm_read_guest() call") did for HV KVM, that is,
      eliminate a "suspicious rcu_dereference_check() usage!" warning by
      taking the SRCU lock around the call to kvmppc_rtas_hcall().
      
      It also fixes a return of RESUME_HOST to return EMULATE_FAIL instead,
      since kvmppc_h_pr() is supposed to return EMULATE_* values.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: stable@vger.kernel.org
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      ef1af2e2
    • A
      KVM: PPC: Book3S: Fix LPCR one_reg interface · a0840240
      Alexey Kardashevskiy 提交于
      Unfortunately, the LPCR got defined as a 32-bit register in the
      one_reg interface.  This is unfortunate because KVM allows userspace
      to control the DPFD (default prefetch depth) field, which is in the
      upper 32 bits.  The result is that DPFD always get set to 0, which
      reduces performance in the guest.
      
      We can't just change KVM_REG_PPC_LPCR to be a 64-bit register ID,
      since that would break existing userspace binaries.  Instead we define
      a new KVM_REG_PPC_LPCR_64 id which is 64-bit.  Userspace can still use
      the old KVM_REG_PPC_LPCR id, but it now only modifies those fields in
      the bottom 32 bits that userspace can modify (ILE, TC and AIL).
      If userspace uses the new KVM_REG_PPC_LPCR_64 id, it can modify DPFD
      as well.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Cc: stable@vger.kernel.org
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a0840240
    • A
      KVM: PPC: Remove 440 support · b2677b8d
      Alexander Graf 提交于
      The 440 target hasn't been properly functioning for a few releases and
      before I was the only one who fixes a very serious bug that indicates to
      me that nobody used it before either.
      
      Furthermore KVM on 440 is slow to the extent of unusable.
      
      We don't have to carry along completely unused code. Remove 440 and give
      us one less thing to worry about.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b2677b8d
    • B
      KVM: PPC: Booke-hv: Add one reg interface for SPRG9 · 28d2f421
      Bharat Bhushan 提交于
      We now support SPRG9 for guest, so also add a one reg interface for same
      Note: Changes are in bookehv code only as we do not have SPRG9 on booke-pr.
      Signed-off-by: NBharat Bhushan <Bharat.Bhushan@freescale.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      28d2f421