The ULI based boards had the interrupt maps for USB on the ULI incorrectly
set.

Also, the MPC8572DS was missing the interrupt-map-mask for the 3rd PCIe
controller.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Added aliases nodes for kurobox, 83xx, 85xx, and 86xx platforms.
This included added labels and cell-index properties for serial and
pci nodes.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

* Removed address fields in ethernet nodes
* Removed #address-cells, #size-cells from gianfar nodes
* Added cell-index to gianfar and ucc ethernet nodes
* Added enet[0..3] labels
* Renamed compatible node for gianfar mdio to "fsl,gianfar-mdio"
* Removed device_type = "mdio"

The matching for gianfar mdio still supports the old "mdio"/"gianfar" combo
but it is now considered deprecated.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

* Removed device_type = "i2c"
* Added missing second I2C controller on MPC8548 CDS, MPC8544 DS
* Added #address-cells, #size-cells, and cell-index where missing
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The addition of the aliases node is needed for U-Boot
and, eventually, cuImage, to help locate the proper
nodes reliably when using the libfdt approach.
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The interrupt map for the PCI PHB that had the ULI1575 was not correct
on the boards that have it.

* 8544 DS:
   - Fix interrupt mask
   - Be explicit about use of INTA for on chip peripherals

* 8572 DS/8641 HPCN:
   - Fix interrupt mask
   - Expand interrupt map for PCI slots to cover all functions
   - Be explicit about use of INTA for on chip peripherals
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

On the majority of 85xx & 86xx we have a register that's ability to
assert HRESET_REQ to reset the board.  We refactored that code so it
can be shared between both platforms into fsl_soc.c and removed all
the duplication in each platform directory.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Updated the device trees to have the PCI nodes be at the same level as
the SOC node.  This is to make it so that the SOC nodes children address
space is just on chip registers and not other bus memory as well.

Also, for PCIe nodes added a P2P bridge to handle the virtual P2P bridge
that exists in the PHB.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Removed the following cruft from .dts files:
* 32-bit in cpu node -- doesn't exist in any spec and not used by kernel
* removed built-in (chrp legacy)
* Removed #interrupt-cells in places they don't need to be set
* Fixed ranges on lite5200*
* Removed clock-frequency from i8259 pic node, not sure where this came from
* Removed big-endian from i8259 pic nodes, this was just bogus
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The interrupt routing in the device trees for the ULI M1575 was
inproperly using the interrupt line field as pci function.  Fixed
up the device tree's to actual conform for to specification and
changed the interrupt mapping code so it just uses a static mapping
setup as follows:

PIRQA - IRQ9
PIRQB - IRQ10
PIRQC - IRQ11
PIRQD - IRQ12
USB 1.1 OCHI (1c.0) - IRQ12
USB 1.1 OCHI (1c.1) - IRQ9
USB 1.1 OCHI (1c.2) - IRQ10
USB 1.1 ECHI (1c.3) - IRQ11
LAN (1b.0) - IRQ6
AC97 (1d.0) - IRQ6
Modem (1d.1) - IRQ6
HD Audio (1d.2) - IRQ6
SATA (1f.1) - IRQ5
SMB (1e.1) - IRQ7
PMU (1e.2) - IRQ7
PATA (1f.0) - IRQ14/15

Took the oppurtunity to refactor the code into a single file so we
don't have to duplicate these fixes on the two current boards in the
tree and several forth coming boards that will also need the code.

Fixed RTC support that requires a dummy memory read on the P2P bridge
to unlock the RTC and setup the default of the RTC alarm registers to
match with a basic x86 style CMOS RTC.

Moved code that poked ISA registers to a FIXUP_FINAL quirk to ensure
the PCI IO space has been setup properly before we start poking ISA
registers at random locations.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Rewrite the Freescale PCI code to support PCI on 83xx/85xx/86xx and
PCIe on 85xx/86xx.
Signed-off-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The TSEC/eTSEC automatically detect their PHY interface type, unless
the type is RGMII-ID (RGMII with internal delay).  In that situation,
it just detects RGMII.  In order to fix this, we need to pass in rgmii-id
if that is the connection type.
Signed-off-by: NAndy Fleming <afleming@freescale.com>

Make the interrupt numbers match the OpenPIC spec intead of the
Freescale docs which distinguish between internal and external interrupts.

Now we can use the interrupt number directly to find the register offset
associated with it.
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

For the 83xx, 85xx, and 86xx device trees, add a "local-mac-address" property
to every Ethernet node that didn't have one.  Add a comment indicating that
the "address" and/or "mac-address" properties are deprecated in DTS files
and will be removed at a later time.  Change all MAC address properties to
have a zero MAC address value.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

This adds device nodes for the PCI bridges as well as the ISA devices on
the newer revision MPC8641HPCN.  It also adds the PCI ranges to the soc
node so that address translation for the ISA devices works properly.
Signed-off-by: NWade Farnsworth <wfarnsworth@mvista.com>
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Remove errata for PCI-e support of Rev 1.0 of MPC8641 since its considered
obselete and is not production level silicon from Freescale.
Signed-off-by: NZhang Wei <wei.zhang@freescale.com>
Acked-by: NRoy Zang <tie-fei.zang@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

Signed-off-by: NZhang Wei <wei.zhang@freescale.com>
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>

The #cpus property is unused and undocumented and is therefore
being removed.
Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com>
Acked-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

* Removed explicit linux,phandle usage. Use references and labels now
* Removed interrupts property from openpic node
* Removed interrupt-parent property from openpic node that pointed to itself
Signed-off-by: NKumar Gala <galak@kernel.crashing.org>
Acked-by: NJon Loeliger <jdl@freescale.com>

The 'linux,boot-cpu' property is obsolete, so remove it from all of the DTS
files and from booting-without-of.txt.  The boot CPU is actually defined in
the device tree header, and U-Boot sets that field.  The device tree compiler
also complains if the property exists.
Signed-off-by: NTimur Tabi <timur@freescale.com>
Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com>
Acked-by: NDavid Gibson <dwg@au1.ibm.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

Add 'linux,phandle' entry to i8259@4d0 node.
Signed-off-by: NZhang Wei <wei.zhang@freescale.com>
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

As per list discussion, let's add device tree source files
under powerpc/boot/dts.  If nothing else, it is a starting point.
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>

As per list discussion, let's add device tree source files
under powerpc/boot/dts.  If nothing else, it is a starting point.
Signed-off-by: NJon Loeliger <jdl@freescale.com>
Signed-off-by: NPaul Mackerras <paulus@samba.org>