1. 26 10月, 2012 1 次提交
  2. 27 9月, 2012 3 次提交
    • A
      tty/serial/amba-pl011: Quiesce interrupts in poll_get_char · 5c8124a0
      Anton Vorontsov 提交于
      We need to quiesce interrupts in the poll_get_char routine, otherwise,
      if used with KGDB NMI debugger, we'll keep reentering the NMI.
      
      Quiescing interrupts is pretty straightforward, except for TXIM
      interrupt. The interrupt has "ready to transmit" meaning, so it's
      almost always raised, and the only way to silence it is to mask it. But
      that's OK, ops->start_tx will unmask it.
      Signed-off-by: NAnton Vorontsov <anton.vorontsov@linaro.org>
      Acked-by: NAlan Cox <alan@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      5c8124a0
    • A
      tty/serial/amba-pl011: Implement poll_init callback · b3564c2c
      Anton Vorontsov 提交于
      The callback is used to initialize the hardware, nothing else should be
      done, i.e. we should not request interrupts (but we can and do unmask
      some of them, as they might be useful for NMI entry).
      
      As a side-effect, the patch also fixes a division by zero[1] when booting
      with kgdboc options specified (e.g. kgdboc=ttyAMA0,115200n8). The issue
      happens because serial core calls set_termios callback, but the driver
      doesn't know clock frequency, and thus cannot calculate proper baud rate
      values.
      
      [1]
      WARNING: at drivers/tty/serial/serial_core.c:400 uart_get_baud_rate+0xe8/0x14c()
      Modules linked in:
      [<c0018e50>] (unwind_backtrace+0x0/0xf0) from [<c0020ae8>] (warn_slowpath_common+0x4c/0x64)
      [<c0020ae8>] (warn_slowpath_common+0x4c/0x64) from [<c0020b1c>] (warn_slowpath_null+0x1c/0x24)
      [<c0020b1c>] (warn_slowpath_null+0x1c/0x24) from [<c0185ed8>] (uart_get_baud_rate+0xe8/0x14c)
      [<c0185ed8>] (uart_get_baud_rate+0xe8/0x14c) from [<c0187078>] (pl011_set_termios+0x48/0x278)
      [<c0187078>] (pl011_set_termios+0x48/0x278) from [<c01850b0>] (uart_set_options+0xe8/0x114)
      [<c01850b0>] (uart_set_options+0xe8/0x114) from [<c0185de4>] (uart_poll_init+0xd4/0xe0)
      [<c0185de4>] (uart_poll_init+0xd4/0xe0) from [<c016da8c>] (tty_find_polling_driver+0x100/0x17c)
      [<c016da8c>] (tty_find_polling_driver+0x100/0x17c) from [<c0188538>] (configure_kgdboc+0xc8/0x1b8)
      [<c0188538>] (configure_kgdboc+0xc8/0x1b8) from [<c00088a4>] (do_one_initcall+0x30/0x168)
      [<c00088a4>] (do_one_initcall+0x30/0x168) from [<c033784c>] (do_basic_setup+0x94/0xc8)
      [<c033784c>] (do_basic_setup+0x94/0xc8) from [<c03378e0>] (kernel_init+0x60/0xf4)
      [<c03378e0>] (kernel_init+0x60/0xf4) from [<c00144a0>] (kernel_thread_exit+0x0/0x8)
      ---[ end trace 7d41c9186f342c40 ]---
      Division by zero in kernel.
      [<c0018e50>] (unwind_backtrace+0x0/0xf0) from [<c014546c>] (Ldiv0+0x8/0x10)
      [<c014546c>] (Ldiv0+0x8/0x10) from [<c0187098>] (pl011_set_termios+0x68/0x278)
      [<c0187098>] (pl011_set_termios+0x68/0x278) from [<c01850b0>] (uart_set_options+0xe8/0x114)
      [<c01850b0>] (uart_set_options+0xe8/0x114) from [<c0185de4>] (uart_poll_init+0xd4/0xe0)
      [<c0185de4>] (uart_poll_init+0xd4/0xe0) from [<c016da8c>] (tty_find_polling_driver+0x100/0x17c)
      [<c016da8c>] (tty_find_polling_driver+0x100/0x17c) from [<c0188538>] (configure_kgdboc+0xc8/0x1b8)
      [<c0188538>] (configure_kgdboc+0xc8/0x1b8) from [<c00088a4>] (do_one_initcall+0x30/0x168)
      [<c00088a4>] (do_one_initcall+0x30/0x168) from [<c033784c>] (do_basic_setup+0x94/0xc8)
      [<c033784c>] (do_basic_setup+0x94/0xc8) from [<c03378e0>] (kernel_init+0x60/0xf4)
      [<c03378e0>] (kernel_init+0x60/0xf4) from [<c00144a0>] (kernel_thread_exit+0x0/0x8)
      Division by zero in kernel.
      [<c0018e50>] (unwind_backtrace+0x0/0xf0) from [<c014546c>] (Ldiv0+0x8/0x10)
      [<c014546c>] (Ldiv0+0x8/0x10) from [<c0183a98>] (uart_update_timeout+0x4c/0x5c)
      [<c0183a98>] (uart_update_timeout+0x4c/0x5c) from [<c01870f8>] (pl011_set_termios+0xc8/0x278)
      [<c01870f8>] (pl011_set_termios+0xc8/0x278) from [<c01850b0>] (uart_set_options+0xe8/0x114)
      [<c01850b0>] (uart_set_options+0xe8/0x114) from [<c0185de4>] (uart_poll_init+0xd4/0xe0)
      [<c0185de4>] (uart_poll_init+0xd4/0xe0) from [<c016da8c>] (tty_find_polling_driver+0x100/0x17c)
      [<c016da8c>] (tty_find_polling_driver+0x100/0x17c) from [<c0188538>] (configure_kgdboc+0xc8/0x1b8)
      [<c0188538>] (configure_kgdboc+0xc8/0x1b8) from [<c00088a4>] (do_one_initcall+0x30/0x168)
      [<c00088a4>] (do_one_initcall+0x30/0x168) from [<c033784c>] (do_basic_setup+0x94/0xc8)
      [<c033784c>] (do_basic_setup+0x94/0xc8) from [<c03378e0>] (kernel_init+0x60/0xf4)
      [<c03378e0>] (kernel_init+0x60/0xf4) from [<c00144a0>] (kernel_thread_exit+0x0/0x8)
      Signed-off-by: NAnton Vorontsov <anton.vorontsov@linaro.org>
      Acked-by: NAlan Cox <alan@linux.intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      b3564c2c
    • L
      serial: pl011: handle corruption at high clock speeds · c5dd553b
      Linus Walleij 提交于
      This works around a few glitches in the ST version of the PL011
      serial driver when using very high baud rates, as we do in the
      Ux500: 3, 3.25, 4 and 4.05 Mbps.
      
      Problem Observed/rootcause:
      
      When using high baud-rates, and the baudrate*8 is getting close to
      the provided clock frequency (so a division factor close to 1), when
      using bursts of characters (so they are abutted), then it seems as if
      there is not enough time to detect the beginning of the start-bit which
      is a timing reference for the entire character, and thus the sampling
      moment of character bits is moving towards the end of each bit, instead
      of the middle.
      
      Fix:
      Increase slightly the RX baud rate of the UART above the theoretical
      baudrate by 5%. This will definitely give more margin time to the
      UART_RX to correctly sample the data at the middle of the bit period.
      
      Also fix the ages old copy-paste error in the very stressed comment,
      it's referencing the registers used in the PL010 driver rather than
      the PL011 ones.
      Signed-off-by: NGuillaume Jaunet <guillaume.jaunet@stericsson.com>
      Signed-off-by: NChristophe Arnal <christophe.arnal@stericsson.com>
      Signed-off-by: NMatthias Locher <matthias.locher@stericsson.com>
      Signed-off-by: NRajanikanth HV <rajanikanth.hv@stericsson.com>
      Cc: stable <stable@vger.kernel.org>
      Cc: Bibek Basu <bibek.basu@stericsson.com>
      Cc: Par-Gunnar Hjalmdahl <par-gunnar.hjalmdahl@stericsson.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      c5dd553b
  3. 11 9月, 2012 1 次提交
  4. 06 9月, 2012 2 次提交
  5. 29 6月, 2012 1 次提交
  6. 19 6月, 2012 1 次提交
  7. 13 6月, 2012 1 次提交
    • L
      serial/amba-pl011: move custom pin control to driver · 78d80c5a
      Linus Walleij 提交于
      We had a boot regression in Ux500 in the merge window because
      two orthogonal pin control schemes for the PL011 were merged
      at the same time:
      
      - One using the .init() and .exit() hooks into the platform
        for Ux500 putting the pins into default vs sleep state
        respectively as the port was started/stopped.
        commit a0980660
        "ARM: ux500: switch to using pinctrl for uart0"
      
      - One hogging the default setting at PL011 probe()
        commit 258e0551
        "serial: amba-pl011: adopt pinctrl support"
      
      To get a solution that works for both let's scrap the stuff
      in the platform callbacks, instead have the driver itself
      select default and sleep states when the port is
      started/stopped. Hopefully this works for all clients.
      Platform callbacks are bad for device tree migration anyway,
      so this rids us of another problem in Ux500.
      
      Cc: Shawn Guo <shawn.guo@linaro.org>
      Cc: Russell King <rmk+kernel@arm.linux.org.uk>
      Reported-by: NLee Jones <lee.jones@linaro.org>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Tested-by: NShawn Guo <shawn.guo@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
      78d80c5a
  8. 12 5月, 2012 1 次提交
  9. 19 4月, 2012 1 次提交
  10. 07 4月, 2012 1 次提交
  11. 21 3月, 2012 1 次提交
  12. 15 3月, 2012 1 次提交
  13. 25 2月, 2012 1 次提交
  14. 22 2月, 2012 1 次提交
  15. 25 1月, 2012 2 次提交
  16. 22 11月, 2011 1 次提交
  17. 31 10月, 2011 1 次提交
  18. 27 9月, 2011 1 次提交
  19. 09 7月, 2011 1 次提交
    • S
      amba pl011: workaround for uart registers lockup · def90f42
      Shreshtha Kumar Sahu 提交于
      This workaround aims to break the deadlock situation
      which raises during continuous transfer of data for long
      duration over uart with hardware flow control. It is
      observed that CTS interrupt cannot be cleared in uart
      interrupt register (ICR). Hence further transfer over
      uart gets blocked.
      
      It is seen that during such deadlock condition ICR
      don't get cleared even on multiple write. This leads
      pass_counter to decrease and finally reach zero. This
      can be taken as trigger point to run this UART_BT_WA.
      
      Workaround backups the register configuration, does soft
      reset of UART using BIT-0 of PRCC_K_SOFTRST_SET/CLEAR
      registers and restores the registers.
      
      This patch also provides support for uart init and exit
      function calls if present.
      Signed-off-by: NShreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      def90f42
  20. 17 6月, 2011 1 次提交
    • S
      amba pl011: workaround for uart registers lockup · c16d51a3
      Shreshtha Kumar Sahu 提交于
      This workaround aims to break the deadlock situation
      which raises during continuous transfer of data for long
      duration over uart with hardware flow control. It is
      observed that CTS interrupt cannot be cleared in uart
      interrupt register (ICR). Hence further transfer over
      uart gets blocked.
      
      It is seen that during such deadlock condition ICR
      don't get cleared even on multiple write. This leads
      pass_counter to decrease and finally reach zero. This
      can be taken as trigger point to run this UART_BT_WA.
      
      Workaround backups the register configuration, does soft
      reset of UART using BIT-0 of PRCC_K_SOFTRST_SET/CLEAR
      registers and restores the registers.
      
      This patch also provides support for uart init and exit
      function calls if present.
      Signed-off-by: NShreshtha Kumar Sahu <shreshthakumar.sahu@stericsson.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      c16d51a3
  21. 20 4月, 2011 1 次提交
  22. 31 3月, 2011 1 次提交
  23. 10 3月, 2011 2 次提交
  24. 24 2月, 2011 1 次提交
  25. 14 1月, 2011 1 次提交
    • G
      tty: move drivers/serial/ to drivers/tty/serial/ · ab4382d2
      Greg Kroah-Hartman 提交于
      The serial drivers are really just tty drivers, so move them to
      drivers/tty/ to make things a bit neater overall.
      
      This is part of the tty/serial driver movement proceedure as proposed by
      Arnd Bergmann and approved by everyone involved a number of months ago.
      
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Cc: Rogier Wolff <R.E.Wolff@bitwizard.nl>
      Cc: Michael H. Warfield <mhw@wittsend.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      ab4382d2
  26. 06 1月, 2011 7 次提交
    • R
      ARM: PL011: add DMA burst threshold support for ST variants · 38d62436
      Russell King 提交于
      ST Micro variants has some specific dma burst threshold compensation,
      which allows them to make better use of a DMA controller.  Add support
      to set this up.
      
      Based on a patch from Linus Walleij.
      Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      38d62436
    • R
      ARM: PL011: Add support for transmit DMA · 68b65f73
      Russell King 提交于
      Add DMA engine support for transmit to the PL011 driver.  Based on a
      patch from Linus Walliej, with the following changes:
      
      - remove RX DMA support.  As PL011 doesn't give us receive timeout
        interrupts, we only get notified of received data when the RX DMA
        has completed.  This rather sucks for interactive use of the TTY.
      
      - remove abuse of completions.  Completions are supposed to be for
        events, not to tell what condition buffers are in.  Replace it with
        a simple 'queued' bool.
      
      - fix locking - it is only safe to access the circular buffer with the
        port lock held.
      
      - only map the DMA buffer when required - if we're ever behind an IOMMU
        this helps keep IOMMU usage down, and also ensures that we're legal
        when we change the scatterlist entry length.
      
      - fix XON/XOFF sending - we must send XON/XOFF characters out as soon
        as possible - waiting for up to 4095 characters in the DMA buffer
        to be sent first is not acceptable.
      
      - fix XON/XOFF receive handling - we need to stop DMA when instructed
        to by the TTY layer, and restart it again when instructed to.  There
        is a subtle problem here: we must not completely empty the circular
        buffer with DMA, otherwise we will not be notified of XON.
      
      - change the 'enable_dma' flag into a 'using DMA' flag, and track
        whether we can use TX DMA by whether the channel pointer is non-NULL.
        This gives us more control over whether we use DMA in the driver.
      
      - we don't need to have the TX DMA buffer continually allocated for
        each port - instead, allocate it when the port starts up, and free
        it when it's shut down.  Update the 'using DMA' flag if we get
        the buffer, and adjust the TTY FIFO size appropriately.
      
      - if we're going to use PIO to send characters, use the existing IRQ
        based functionality rather than reimplementing it.  This also ensures
        we call uart_write_wakeup() at the appropriate time, otherwise we'll
        stall.
      
      - use DMA engine helper functions for type safety.
      
      - fix init when built as a module - we can't have to initcall functions,
        so we must settle on one.  This means we can eliminate the deferred
        DMA initialization.
      
      - there is no need to terminate transfers on a failed prep_slave_sg()
        call - nothing has been setup, so nothing needs to be terminated.
        This avoids a potential deadlock in the DMA engine code
        (tasklet->callback->failed prepare->terminate->tasklet_disable
         which then ends up waiting for the tasklet to finish running.)
      
      - Dan says that the submission callback should not return an error:
        | dma_submit_error() is something I should have removed after commit
        | a0587bcf "ioat1: move descriptor allocation from submit to prep" all
        | errors should be notified by prep failing to return a descriptor
        | handle.  Negative dma_cookie_t values are only returned by the
        | dma_async_memcpy* calls which translate a prep failure into -ENOMEM.
        So remove the error handling at that point.  This also solves the
        potential deadlock mentioned in the previous comment.
      Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      68b65f73
    • R
      ARM: PL011: Ensure IRQs are disabled in UART interrupt handler · 963cc981
      Russell King 提交于
      As the DMA support introduces a separate interrupt-time callback, our
      interrupt handler will not be the only handler which takes the port
      lock, so we need to ensure that IRQs are disabled.  We must use the
      _irqsave variant so we don't inadvertently enable interrupts.
      Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      963cc981
    • R
      ARM: PL011: Separate hardware FIFO size from TTY FIFO size · ffca2b11
      Russell King 提交于
      With DMA support, we need to tell the TTY subsystem that the DMA buffer
      is the size of the FIFO, otherwise things like tty_wait_until_sent()
      will time out too early.  Keep (and use) the hardware value separately
      from the port->fifosize.
      
      This was part of a larger patch from Linus Walleij, with a little
      modification.
      Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      ffca2b11
    • R
      ARM: PL011: Allow better handling of vendor data · c19f12b5
      Russell King 提交于
      Rather than copying all vendor data into the port structure, copy
      just that which is frequently used, and keep a pointer to the
      remaining vendor data structure.  This makes it easier to add
      vendor quirks in the future.
      Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      c19f12b5
    • R
      ARM: PL011: Ensure error flags are clear at startup · 5063e2c5
      Russell King 提交于
      The error flags weren't being cleared upon UART startup, which
      can cause problems when we add DMA support.  It's good practice
      to ensure that these flags are cleared anyway, so let's do so.
      
      This was part of a larger patch from Linus Walleij.
      Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      5063e2c5
    • R
      ARM: PL011: include revision number in boot-time port printk · e8a7ba86
      Russell King 提交于
      Include the revision number of the PL011 primecell in the boot-time
      port printk to allow proper identification of the peripheral.
      Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      e8a7ba86
  27. 27 7月, 2010 3 次提交