- 11 5月, 2011 17 次提交
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由 Tomi Valkeinen 提交于
Errors from the panel driver were ignored during panel initialization. Handle the errors and fail accordingly. Also move the display initialization to a separate function to make it cleaner. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Jani Nikula 提交于
Add get_dimensions() to struct omap_dss_driver. Use the call, if supported by the driver, in OMAPFB. Signed-off-by: NJani Nikula <ext-jani.1.nikula@nokia.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
VENC code had 50ms sleep after enabling the output and 100ms sleep after disabling the output. I don't see any reason for these sleeps. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
There's a 20ms sleep after VENC reset. It's unknown what bug this circumvents and on what platforms. Add a Kconfig option to disable the sleep. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
For some unknown reason we may get SYNC_LOST errors from the display subsystem at initialization time if we don't sleep before resetting the DSS. See the source (dss.c) for more comments. However, 50ms is quite long time to sleep, and with some configurations the SYNC_LOST may never happen, so this patch creates a Kconfig option to disable the sleep. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
The sleep workaround for the problem described in the comment doesn't really work. This patch removes the workaround, and improves the comment about the bug, and proposes an userspace workaround. omap_dss_set_manager() is called 6 times when loading omapdss and omapfb, which means that 40ms * 6 = 240ms was spent sleeping when booting up. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Clock configuration was defined inside dssdev.phy.dsi struct. The clock config doesn't really belong there, and so it's moved to dssdev.clock struct. Now the explicit clock configuration could also be used for other interfaces than DSI, although there's no support for it currently. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Archit Taneja 提交于
The DSI protocol engine has no interrupt for signalling the end of a Frame transfer. The present approach is to send a BTA after DISPC generates a FRAMEDONE interrupt, and unlock the dsi bus only when the BTA Ack is received. The assumption made with this approach was that OMAP will send a BTA only after the long packet corresponding to the last line is sent. However, it is possible that on the DISPC FRAMEDONE interrupt there are 2 (or more) lines of pixel data in the DSI line buffer. Hence, the BTA Ack could be received for the long packet corresponding to the second last line (or the third last and so on..). Therefore, the current method doesn't ensure that the complete frame data is sent before we start a new transfer. A similar explanation holds valid if we send a BTA in between multiple short/long command packets from the slave port. Introduce dsi_sync_vc functions, based on Tomi Valkeinen's idea, which ensure that the DSI Virtual Channel in use(update_channel) completes its previous work before proceeding to the next Frame/Command. For a frame update, the DSI driver now sends a callback to the Panel Driver on the FRAMEDONE interrupt itself. The callback in the panel driver then unlocks the bus. dsi_sync_vc() functions are placed in dsi_vc_config_l4() and dsi_vc_config_vp() to ensure that the previous task of the Virtual Channel is completed. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Archit Taneja 提交于
The following changes have changed from OMAP3 to OMAP4 DSI: -The register field DSI_PLL_FREQSEL in DSI_PLL_CONFIGURATION2 has been removed. -DCS_CMD_ENABLE and DCS_CMD_CODE bits have been moved from DSI_CTRL to DSI_VC_CTRLi, hence the control of the bits is available per VC. -DSI LDO powergood notification doesn't work on OMAP4. This is mentioned in OMAP4 errata revision 1.8(Errata 1.76). -OCP_WIDTH register field is included in DSI_VC_CTRL. -The SCP clock is also required to access DSI PLL registers Introduce dss features for these changes so that DSI runs on both OMAP3 and OMAP4. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
All DPI panels were missing dependency to OMAP2_DSS_DPI. Add the dependency. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
OMAP3630 has a HW bug causing DSI PLL power command POWER_ON_DIV (0x3) to not work properly. The bug prevents us from enabling DSI PLL power only to HS divider block. This patch adds a dss feature for the bug and converts POWER_ON_DIV requests to POWER_ON_ALL (0x2). Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Archit Taneja 提交于
dss.lcd_clk_source is set to the default value DSS_CLK_SRC_FCK at dss_init. For OMAP2 and OMAP3, the dss.lcd_clk_source should always be the same as dss.dispc_clk_source. The function dss_get_lcd_clk_source() always returns the default value DSS_CLK_SRC_FCK for OMAP2/3. This leads to wrong clock dumps when dispc_clk_source is not DSS_CLK_SRC_FCK. Correct this function to always return dss.dispc_clk_source for OMAP2/3. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
On OMAP4, reading DSI_PLL_CONFIGURATION2 register requires the L3 clock (CIO_CLK_ICG) to PLL. Currently dsi_dump_clocks() tries to read that register without enabling the L3 clock, leading to crash if DSI is not in use. The status of the bit being read from DSI_PLL_CONFIGURATION2 is available from dsi_clock_info->use_sys_clk, so we can avoid the whole problem by just using that. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
use_sys_clk and highfreq fields in dsi.current_cinfo were never set. Luckily they weren't used anywhere so it didn't cause any problems. This patch fixes those fields and they are now set at the same time as the rest of the fields. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
arch/arm/plat-omap/include/plat/nokia-dsi-panel.h is an include for the OMAP DSS panel driver for Nokia's DSI displays. A more logical place for it is in include/video. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
arch/arm/plat-omap/include/plat/panel-generic-dpi.h is an include for the OMAP DSS panel driver for generic DPI displays. A more logical place for it is in include/video. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
arch/arm/plat-omap/include/plat/display.h is an include for the OMAP DSS driver. A more logical place for it is in include/video. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 23 3月, 2011 1 次提交
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由 Matthew Garrett 提交于
There may be multiple ways of controlling the backlight on a given machine. Allow drivers to expose the type of interface they are providing, making it possible for userspace to make appropriate policy decisions. Signed-off-by: NMatthew Garrett <mjg@redhat.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: David Airlie <airlied@linux.ie> Cc: Alex Deucher <alexdeucher@gmail.com> Cc: Ben Skeggs <bskeggs@redhat.com> Cc: Zhang Rui <rui.zhang@intel.com> Cc: Len Brown <lenb@kernel.org> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 18 3月, 2011 2 次提交
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由 Murthy, Raghuveer 提交于
Add dss.dpll4_m4_ck (DSS FCLK) initialization for OMAP4. This is used to compute the pixel clock for DPI interface and also to reconfigure the DSS FCLK to the desired rate, corresponding to the rate computed for pixel clock. Adding these cpu_is_44xx() checks are meant to be temporary, until a cleaner implementation to manage these checks are added. Currently this is needed to get DVI display running on OMAP4 PandaBoard Signed-off-by: NRaghuveer Murthy <raghuveer.murthy@ti.com> [tomi.valkeinen@ti.com: minor changes due to conflicts] Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
OMAP2 does not have dpll4_m4_ck source clock for dss functional clock, but later OMAPs do. Currently we check for cpu type in multiple places to find out if dpll4_m4_ck is available. This patch cleans up dss.c by using the fact that dss.dpll4_m4_ck pointer is NULL on OMAP2. This allows us to remove many of the cpu checks. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 16 3月, 2011 8 次提交
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由 Mythri P K 提交于
calling the platform registration of HDMI driver from core during initialization. Signed-off-by: NMythri P K <mythripk@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Mythri P K 提交于
Adding kconfig and makefile changes to add support for HDMI in OMAP4. Signed-off-by: NMythri P K <mythripk@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Mythri P K 提交于
The panel driver(hdmi_omap4_panel.c) in omap2/dss acts as a controller to manage the enable and disable requests and synchronize audio and video. Signed-off-by: NMythri P K <mythripk@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Mythri P K 提交于
Adding the hdmi interface driver(hdmi.c) to the dss driver. It configures the audio and video portion of HDMI based on functionality called by the panel driver. Signed-off-by: NMythri P K <mythripk@ti.com> Signed-off-by: NYong Zhi <y-zhi@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Mythri P K 提交于
Adding the hdmi interface driver header file (hdmi.h) to the dss driver. Register and structure declaration done here. Signed-off-by: NMythri P K <mythripk@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Mythri P K 提交于
Adding function to reset/set gamma table bit for TV interface, currently only support for disabled is added. Signed-off-by: NMythri P K <mythripk@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Mythri P K 提交于
Adding function to select between HDMI or VENC clock source. Signed-off-by: NMythri P K <mythripk@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Mythri P K 提交于
Adding display type HDMI in dss_features, overlay and the manager so that HDMI type of display will be recognized. Signed-off-by: NMythri P K <mythripk@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 15 3月, 2011 9 次提交
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由 Tomi Valkeinen 提交于
print_irq_status functions can be called with empty irq status when full irq debugging is enabled. This patch makes print_irq_status functions return immediately when given an empty irq status to lessen the debug spam slightly. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
dsi_vc_send_bta_sync() waits for BTA interrupt with a 500ms timeout. If a DSI error happens, no BTA is received and the timeout triggers. This could be handled much faster by listening to DSI errors also. This patch uses the ISR support to notice DSI errors while waiting for the BTA, thus speeding up the fail-path considerably. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Remove bta_callback from the interrupt handler, and use ISR support instead. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Remove bta_completion handling from the interrupt handler, and use ISR support instead. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Add generic ISR support for DSI interrupts. ISRs can be used instead of custom hooks in the interrupt handler. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Tomi Valkeinen 提交于
Clean up the IRQ handler a bit by separating collection of IRQ stats and handling of IRQ errors to separate functions. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Taneja, Archit 提交于
The DSI PLL parameters (regm, regn, regm_dispc, regm_dsi, fint) have different fields and also different Max values on OMAP3 and OMAP4. Use dss features to calculate the register fields and min/max values based on current OMAP revision. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Taneja, Archit 提交于
Create 2 functions dss_feat_get_param_min() and dss_feat_get_param_max() which return the minimum and maximum value of a parameter. Introduce a enum in dss_features called dss_range_param which contains parameters whose ranges we are interested in. Replace this with dss_feat_get_max_dss_fck() which is specific to the parameter DSS_FCK. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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由 Taneja, Archit 提交于
The structures dss_reg_field and dss_clk_source_name have enum members which specify the register field and the clock source respectively. These members are not used to choose the correct result in the corresponding feature functions. Remove these members and change the features array declaration to incorporate these enums. The structure dss_clk_source_name without the enum member is just a pointer to an string. Remove the structure and use a character pointer directly. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 14 3月, 2011 1 次提交
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由 Tomi Valkeinen 提交于
Something seems to be wrong with OMAP4 & VENC, and register access fails in omap_venchw_probe(). This patch skips venc driver registration on OMAP4, thus circumventing the problem for now. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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- 11 3月, 2011 1 次提交
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由 Taneja, Archit 提交于
On OMAP3, the pixel clock for the LCD manager was derived through DISPC_FCLK as: Lcd Pixel clock = DISPC_FCLK / lcd / pcd Where lcd and pcd are divisors in the DISPC_DIVISOR register. On OMAP4, the pixel clocks for LCD1 and LCD2 managers are derived from 2 new clocks named LCD1_CLK and LCD2_CLK. The pixel clocks are calculated as: Lcd_o Pixel clock = LCDo_CLK / lcdo /pcdo, o = 1, 2 Where lcdo and pcdo registers are divisors in DISPC_DIVISORo registers. LCD1_CLK and LCD2_CLK can have DSS_FCLK, and the M4 divider clocks of DSI1 PLL and DSI2 PLL as clock sources respectively. Introduce functions to select and get the clock source for these new clocks. Modify DISPC functions get the correct lck and pck rates based on the clock source of these clocks. Since OMAP2/3 don't have these clocks, force OMAP2/3 to always have the LCD_CLK source as DSS_CLK_SRC_FCK by introducing a dss feature. Introduce clock source names for OMAP4 and some register field changes in DSS_CTRL on OMAP4. Currently, LCD2_CLK can only have DSS_FCLK as its clock source as DSI2 PLL functionality hasn't been introduced yet. BUG for now if DSI2 PLL is selected as clock. Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>
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