- 07 6月, 2019 10 次提交
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由 Abel Vesa 提交于
Switch all the wrappers to clk_hw based API and rename them to indicate that. Add macros for clk based legacy users. This allows us to move closer to a clear split between consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
Switch the imx_clk_fixup_mux function to clk_hw based API, rename accordingly and add a macro for clk based legacy. a macro for clk based legacy. This allows us to move closer to a clear split between consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
Switch the imx_clk_fixup_divider function to clk_hw based API, rename accordingly and add a macro for clk based legacy. This allows us to move closer to a clear split between consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
Switch the imx_clk_gate_exclusive function to clk_hw based API, rename accordingly and add a macro for clk based legacy. This allows us to move closer to a clear split between consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
Switch the imx_clk_pfd function to clk_hw based API, rename accordingly and add a macro for clk based legacy. This allows us to move closer to a clear split between consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
Switch the imx_clk_hw_pllv3 function to clk_hw based API, rename accordingly and add a macro for clk based legacy. This allows us to move closer to a clear split between consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
Switch the clk_register_gate2 function to clk_hw based API, rename accordingly and add a macro for clk based legacy. This allows us to move closer to a clear split between consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
Switch the clk_cpu clock registering function to clk_hw based API and add a macro for clk based legacy. This allows us to move closer to a clear split between consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
Switch all the clk_busy clock registering functions to clk_hw based API. Keep around some clk based wrappers to be used by older imx platforms. This allows us to move closer to a clear split of consumer and provider clk APIs. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Abel Vesa 提交于
In order to move to clk_hw based API, imx_obtain_fixed_clock_hw is added. The end goal here is to have all the clk providers use the clk_hw based API. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NStephen Boyd <sboyd@kernel.org> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 23 5月, 2019 1 次提交
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由 Anson Huang 提交于
All i.MX6 SoCs need to mask unused MMDC channel's handshake for low power modes, this patch provides common API for masking the MMDC channel passed from caller. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Reviewed-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 30 4月, 2019 1 次提交
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由 Anson Huang 提交于
According reference manual, i.MX7D's audio/video PLL's num/denom register offset are 0x20/0x30, they are different from i.MX6's audio/video PLL, correct it by introducing new offset variables for audio/video PLL and using runtime assignment based on PLL type. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 26 3月, 2019 1 次提交
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由 Abel Vesa 提交于
This is never used and the imx_clk_hw_fixed does the same thing. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 27 2月, 2019 1 次提交
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由 Abel Vesa 提交于
Make the entire combination of plls to be one single clock. The parents used for bypasses are specified each as an index in the parents list. The determine_rate does a lookup throughout all the possible combinations for all the divs and returns the best possible 'setup' which in turn is used by set_rate later to set up all the divs and bypasses. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Tested-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 22 2月, 2019 3 次提交
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由 Bai Ping 提交于
New PLLs are introduced on i.MX8M Mini SOC. PLL1416X is Integer PLL, PLL1443X is a Frac PLL. Signed-off-by: NBai Ping <ping.bai@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Abel Vesa 提交于
The parents needs to be pointer to const pointer to const char. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Abel Vesa 提交于
The parent_names needs to be pointer to const pointer to const char. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 04 12月, 2018 10 次提交
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由 A.s. Dong 提交于
Clock providers are recommended to use the new struct clk_hw based API, so implement IMX clk_hw based provider helpers functions to the new approach. Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 A.s. Dong 提交于
As the commit 2893c379 ("clk: make strings in parent name arrays const"), let's make the parent strings const, otherwise we may meet the following warning when compiling: drivers/clk/imx/clk-imx7ulp.c: In function 'imx7ulp_clocks_init': drivers/clk/imx/clk-imx7ulp.c:73:35: warning: passing argument 5 of 'imx_clk_mux_flags' discards 'const' qualifier from pointer target type clks[IMX7ULP_CLK_APLL_PRE_SEL] = imx_clk_mux_flags("apll_pre_sel", base + 0x508, 0, 1, pll_pre_sels, ARRAY_SIZE(pll_pre_sels), CLK_SET_PARENT_GATE); ^ In file included from drivers/clk/imx/clk-imx7ulp.c:23:0: drivers/clk/imx/clk.h:200:27: note: expected 'const char **' but argument is of type 'const char * const*' ... Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 A.s. Dong 提交于
The imx composite clk is designed for Peripheral Clock Control (PCC) module observed in IMX ULP SoC series. NOTE pcc can only be operated when clk is gated. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 A.s. Dong 提交于
The pfdv2 is designed for PLL Fractional Divide (PFD) observed in System Clock Generation (SCG) module in IMX ULP SoC series. e.g. i.MX7ULP. NOTE pfdv2 can only be operated when clk is gated. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 A.s. Dong 提交于
pllv4 is designed for System Clock Generation (SCG) module observed in IMX ULP SoC series. e.g. i.MX7ULP. The SCG modules generates clock used to derive processor, system, peripheral bus and external memory interface clocks while this patch intends to support the PLL part. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Anson Huang <Anson.Huang@nxp.com> Cc: Bai Ping <ping.bai@nxp.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 A.s. Dong 提交于
For dividers with zero indicating clock is disabled, instead of giving a warning each time like "clkx: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set" in exist code, we'd like to introduce enable/disable function for it. e.g. 000b - Clock disabled 001b - Divide by 1 010b - Divide by 2 ... Set rate when the clk is disabled will cache the rate request and only when the clk is enabled will the driver actually program the hardware to have the requested divider value. Similarly, when the clk is disabled we'll write a 0 there, but when the clk is enabled we'll restore whatever rate (divider) was chosen last. It does mean that recalc rate will be sort of odd, because when the clk is off it will return 0, and when the clk is on it will return the right rate. So to make things work, we'll need to return the cached rate in recalc rate when the clk is off and read the hardware when the clk is on. NOTE for the default off divider, the recalc rate will still return 0 as there's still no proper preset rate. Enable such divider will give user a reminder error message. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Include clk.h for sparse warnings] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Lucas Stach 提交于
The SCCG is a new PLL type introduced on i.MX8. The description of this SCCG clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Lucas Stach 提交于
This is a new fractional clock type introduced on i.MX8. The description of this fractional clock can be found here: https://www.nxp.com/docs/en/reference-manual/IMX8MDQLQRM.pdf#page=834Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Abel Vesa 提交于
Add driver for the Clock Control Module found on i.MX8MQ. Signed-off-by: NAnson Huang <anson.huang@nxp.com> Signed-off-by: NBai Ping <ping.bai@nxp.com> Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Abel Vesa 提交于
Since a lot of clocks on imx8m are formed by a mux, gate, predivider and divider, the idea here is to combine all of those into one composite clock, but we need to deal with both predivider and divider at the same time and therefore we add the imx8m_clk_composite_divider_ops and register the composite clock with those. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Suggested-by: NSascha Hauer <s.hauer@pengutronix.de> Reviewed-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 17 10月, 2018 1 次提交
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由 Anson Huang 提交于
Clock framework will enable those clocks registered with CLK_IS_CRITICAL flag, so no need to have clks_init_on array during clock initialization now. Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 07 4月, 2018 1 次提交
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由 Bai Ping 提交于
Add new gate/gate2 wrapper function to register clocks with optional flags. Signed-off-by: NBai Ping <ping.bai@nxp.com> Acked-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 02 11月, 2017 1 次提交
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由 Greg Kroah-Hartman 提交于
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NPhilippe Ombredanne <pombredanne@nexb.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 01 6月, 2017 1 次提交
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由 Fabio Estevam 提交于
According to the MX7D Reference Manual the powerdown bit of CCM_ANALOG_PLL_DDRn register is bit 20, so fix it accordingly. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Reviewed-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 10 1月, 2017 1 次提交
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由 Nikita Yushchenko 提交于
On vf610, PLL1 and PLL2 have registers to configure fractional part of frequency multiplier. This patch adds support for these registers. This fixes "fast system clock" issue on boards where bootloader sets fractional multiplier for PLL1. Suggested-by: NAndrey Smirnov <andrew.smirnov@gmail.com> CC: Chris Healy <cphealy@gmail.com> Signed-off-by: NNikita Yushchenko <nikita.yoush@cogentembedded.com> Tested-by: NAndrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 01 11月, 2016 1 次提交
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由 Philipp Zabel 提交于
Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is generated, and the LVDS display will hang when the ipu_di_clk is sourced from ldb_di_clk. To fix the problem, both the new and current parent of the ldb_di_clk should be disabled before the switch. As this can not be guaranteed by the clock framework during runtime, make the ldb_di[x]_sel muxes read-only. A workaround to set the muxes once during boot could be added to the kernel or bootloader. Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de> Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 20 8月, 2016 1 次提交
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由 Fabio Estevam 提交于
Introduce imx_clk_gate2_shared2() which is similar to the existing imx_clk_gate2_shared() and passes CLK_OPS_PARENT_ENABLE flag, which is useful for i.MX7 shared clocks. Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 02 7月, 2016 2 次提交
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由 Dong Aisheng 提交于
IMX SoCs like i.MX7D requires using CLK_OPS_PARENT_ENABLE flags, adding the corresponding clock APIs variants for easily to use. Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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由 Dong Aisheng 提交于
Re-order and concentrate the same type of clk api for better code maintenance. Cc: Shawn Guo <shawnguo@kernel.org> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 31 3月, 2016 1 次提交
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由 Stefan Agner 提交于
The 2-bit gates found i.MX and Vybrid SoC support different clock configuration: 0b00: clk disabled 0b01: clk enabled in RUN mode but disabled in WAIT and STOP mode 0b10: clk enabled in RUN, WAIT and STOP mode (only Vybrid) 0b11: clk enabled in RUN and WAIT mode For some clocks, we might want to configure different behaviour, e.g. a memory clock should be on even in STOP mode. Add a new function imx_clk_gate2_cgr which allow to configure specific gate values through the cgr_val parameter. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 03 3月, 2016 1 次提交
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由 Stephen Boyd 提交于
This flag is a no-op now. Remove usage of the flag. Acked-by: NShawn Guo <shawnguo@kernel.org> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
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- 26 9月, 2015 1 次提交
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由 Lucas Stach 提交于
Both earlycon and eralyprintk depend on the bootloader setup UART clocks being retained. This patch adds the common logic to detect such situations and make the information available to the clock drivers, as well as adding the facilities to disable those clocks at the end of the kernel init. Signed-off-by: NLucas Stach <l.stach@pengutronix.de> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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- 03 6月, 2015 1 次提交
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由 Shawn Guo 提交于
Define an enum for gpt timer device type in include/soc/imx/timer.h to tell the gpt block differences among SoCs. Update non-DT users (clock drivers) to pass the device type. As we now have include/soc/imx/timer.h, the declaration of mxc_timer_init() is moved into there as the best fit. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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