This enables the new EXYNOS5 platforms in the defconfig, and enables DT
support on EXYNOS4.

Other options enabled: USB host, EXT3/4, regulators and tps65090,
networking and a few of the common usb ethernet adapters as well as the
smsc911x controller used on some boards.

I enabled EFI_PARTITION, since it's used on some filesystem images I'm
using. I didn't see a need to keep Solaris and BSD partition format
still enabled.

Finally, framebuffer console, logo and fonts were enabled.

Note that enabling some of these options introduces build coverage
previously missing, thus introducing a few build errors and warnings
for which fixes have been sent out already.
Signed-off-by: NOlof Johansson <olof@lixom.net>
[kgene.kim@samsung.com: restored exynos4_defconfig from original]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This SoC has two PWM channels
Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: NRoland Stigge <stigge@antcom.de>

Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: NRoland Stigge <stigge@antcom.de>

LPC32xx SoC has a 128 bits unique id that can be used as a system
serial number, if none has been provided by atags or dt.
Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: NRoland Stigge <stigge@antcom.de>

Signed-off-by: NAlexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: NRoland Stigge <stigge@antcom.de>

Obsoleted since commit 7c5763b8 ("drivers:
misc: Remove MISC_DEVICES config option")
Signed-off-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Correcting spelling typo in mach-omap2
Signed-off-by: NMasanari Iida <standby24x7@gmail.com>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Adding core definitions for Altera's SOCFPGA ARM platform.
Mininum support for Altera's SOCFPGA Cyclone 5 hardware.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
Reviewed-by: NPavel Machek <pavel@denx.de>
Reviewed-by: NRob Herring <rob.herring@calxeda.com>
Reviewed-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

On Origen board, we have 2 status leds, so adding them as heartbeat and
mmc0 by default. The patch basically adds the platform data required by
leds-gpio driver.
Signed-off-by: NRicardo Salveti de Araujo <ricardo.salveti@linaro.org>
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

With the greater use of deferred probes we need to be more sure that
initdata is actually used only at system init rather than being used
by devices when they probe (which could happen after the main kernel
init has completed and is much more likely to now).
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Adds missing .reserve field to SMDKC210 board.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

DRM core device and FIMD DRM platform device support is added to
SMDK4212 & SMDK4412 boards.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit 1c20c2 (spi: s3c64xx: Remove the 'set_level' callback from
controller data) didn't update all the users, breaking the build.
Fix that.
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Since clk_xusbxti.rate is 24Mhz as a default,
so we don't need to set that when it is 24Mhz.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Removed system.h as it only contained an inline for arch_reset()
Changed the existing board files to use .restart in there machine
descriptions.

Added device tree support for the restart controller.
Device tree support for mach-vt8500 is still a work-in-progress.
Signed-off-by: NTony Prisk <linux@prisktech.co.nz>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Signed-off-by: NStefan Roese <sr@denx.de>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

On spear320 device supported mode are:

   * AUTO_NET_SMII_MODE
   * AUTO_NET_MII_MODE
   * AUTO_EXP_MODE
   * SMALL_PRINTERS_MODE
   * EXTENDED_MODE

spear320-evb board is designed for EXTENDED_MODE only, hence it does not
boot correctly in current form where pinctrl part for some devices fail.

Configure and boot the SPEAr320 evaluation board in EXTENDED_MODE.
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

   - Correct interrupt bindings for uart, ethernet and pmu.
   - Added interrupt binding for keyboard.
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>

The max limit of con_id is 16 and dev_id is 20. As of now for spear6xx, many clk
ids are exceeding this predefined limit.

This patch is intended to rename clk ids like:
    mux_clk -> _mclk
    gate_clk -> _gclk
    synth_clk -> syn_clk
    ras_gen1_synth_gate_clk -> ras_syn1_gclk
    pll3_48m -> pll3_
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

The max limit of con_id is 16 and dev_id is 20. As of now for spear3xx, many clk
ids are exceeding this predefined limit.

This patch is intended to rename clk ids like:
    mux_clk -> _mclk
    gate_clk -> _gclk
    synth_clk -> syn_clk
    ras_gen1_synth_gate_clk -> ras_syn1_gclk
    ras_pll3_48m -> ras_pll3_
    pll3_48m -> pll3_
Signed-off-by: NVipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: NShiraz Hashim <shiraz.hashim@st.com>
Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>

Bindings for DMA channels are still under discussion and will
change once this has been resolved. Therefore we mark them
the newly added ones as preliminary. Let's hope nobody starts
relying on them...
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Add the necessary dtb-$(CONFIG_...) entries so that "make dtbs"
generates the Device Tree Blobs that correspond to the selected mvebu
SoCs.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This patch fixes "bug: interrupts were enabled early" due to
do_settimeofday() which used in common code for clps711x-platform.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This override does not allow support for multiple machines in a single core.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Since we are trying to do to support multiple machines in a single kernel,
we need to eliminate the use of __initcall to be used for all machines.
Using .init_early call solves this problem.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Fix clock id for rnga driver.
Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This prevents an out-of-bounds access to the clock_event_mode_label when
debugging.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch also includes fix CSPI ID for i.MX53. ID should be 2,
because IDs 0 and 1 are occupied by eCSPI.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch fix incorrect defined bits for GPT clocks according to datasheet.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

This patch adds support for Enhanced Periodic Interrupt Timer (EPIT)
to clock subsystem.
Signed-off-by: NAlexander Shiyan <shc_work@mail.ru>
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>

WARNING: at mm/vmalloc.c:1471 __iommu_free_buffer+0xcc/0xd0()
Trying to vfree() nonexistent vm area (ef095000)
Modules linked in:
[<c0015a18>] (unwind_backtrace+0x0/0xfc) from [<c0025a94>] (warn_slowpath_common+0x54/0x64)
[<c0025a94>] (warn_slowpath_common+0x54/0x64) from [<c0025b38>] (warn_slowpath_fmt+0x30/0x40)
[<c0025b38>] (warn_slowpath_fmt+0x30/0x40) from [<c0016de0>] (__iommu_free_buffer+0xcc/0xd0)
[<c0016de0>] (__iommu_free_buffer+0xcc/0xd0) from [<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138)
[<c0229a5c>] (exynos_drm_free_buf+0xe4/0x138) from [<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc)
[<c022b358>] (exynos_drm_gem_destroy+0x80/0xfc) from [<c0211230>] (drm_gem_object_free+0x28/0x34)
[<c0211230>] (drm_gem_object_free+0x28/0x34) from [<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8)
[<c0211bd0>] (drm_gem_object_release_handle+0xcc/0xd8) from [<c01abe10>] (idr_for_each+0x74/0xb8)
[<c01abe10>] (idr_for_each+0x74/0xb8) from [<c02114e4>] (drm_gem_release+0x1c/0x30)
[<c02114e4>] (drm_gem_release+0x1c/0x30) from [<c0210ae8>] (drm_release+0x608/0x694)
[<c0210ae8>] (drm_release+0x608/0x694) from [<c00b75a0>] (fput+0xb8/0x228)
[<c00b75a0>] (fput+0xb8/0x228) from [<c00b40c4>] (filp_close+0x64/0x84)
[<c00b40c4>] (filp_close+0x64/0x84) from [<c0029d54>] (put_files_struct+0xe8/0x104)
[<c0029d54>] (put_files_struct+0xe8/0x104) from [<c002b930>] (do_exit+0x608/0x774)
[<c002b930>] (do_exit+0x608/0x774) from [<c002bae4>] (do_group_exit+0x48/0xb4)
[<c002bae4>] (do_group_exit+0x48/0xb4) from [<c002bb60>] (sys_exit_group+0x10/0x18)
[<c002bb60>] (sys_exit_group+0x10/0x18) from [<c000ee80>] (ret_fast_syscall+0x0/0x30)

This patch modifies the condition while freeing to match the condition
used while allocation. This fixes the above warning which arises when
array size is equal to PAGE_SIZE where allocation is done using kzalloc
but free is done using vfree.
Signed-off-by: NPrathyush K <prathyush.k@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>

Add device nodes for the three instances of spi controllers in
EXYNOS5 platforms and enable instance SPI 1 for SMDK5250 board.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add the platform bits which are required to support SPI controllers.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add support for clock instances for each spi controller.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NJaswinder Singh <jaswinder.singh@linaro.org>
[kgene.kim@samsung.com: changed the name of clk for consensus]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add device nodes for the three instances of spi controllers in
EXYNOS4 platforms. Enable instance SPI 2 for SMDKV310 board and
disable all spi instances for Origen board.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add the platform bits which are required to support SPI controllers.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The sclk_spi clock is derived currently from the first level divider
(MMCx_RATIO) which is incorrect. The output of the first level clock
is divided by a second level divider (MMCx_PRE_RATIO), the output of
which is used as the spi bus clock (sclk_spi). Fix the clock hierarchy
issues for the sclk_spi clock.
Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org>
Acked-by: NJaswinder Singh <jaswinder.singh@linaro.org>
[kgene.kim@samsung.com: changed the name of clk for consensus]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Versatile Express platform can be used in different configurations,
the console UART used by early printk may be located at different
addresses in the address space.

This patch makes it possible to select the base address of a PL011
UART to be used as a console output in the kernel configuration.
The default behaviour is still the heuristic detecting memory map
on Cortex-A core tiles.

The zImage decompressor will use the same configuration values
or print out nothing if DEBUG_LL is not enabled.
Signed-off-by: NPawel Moll <pawel.moll@arm.com>