This patch renames the SPINOR_OP_* macros of the 4-byte address
instruction set so the new names all share a common pattern: the 4-byte
address name is built from the 3-byte address name appending the "_4B"
suffix.

The patch also introduces new op codes to support other SPI protocols such
as SPI 1-4-4 and SPI 1-2-2.

This is a transitional patch and will help a later patch of spi-nor.c
to automate the translation from the 3-byte address op codes into their
4-byte address version.
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: NMark Brown <broonie@kernel.org>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>

Consider a message size limit when calculating the maximum amount
of data that can be read.

The message size limit has been introduced with 4.9, so cc it
to stable.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

This driver adds mtd support for the Aspeed AST2400 SoC static memory
controllers:

 * New Static Memory Controller (referred as FMC)
   . BMC firmware
   . AST2500 compatible register set
   . 5 chip select pins (CE0 ∼ CE4)
   . supports NOR flash, NAND flash and SPI flash memory.

 * SPI Flash Controller (SPI)
   . host Firmware
   . slightly different register set, between AST2500 and the legacy
     controller
   . supports SPI flash memory
   . 1 chip select pin (CE0)

The legacy static memory controller (referred as SMC) is not
supported, as well as types other than SPI.
Signed-off-by: NCédric Le Goater <clg@kaod.org>
Reviewed-by: NJoel Stanley <joel@jms.id.au>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

This driver adds mtd support for the Aspeed AST2500 SoC static memory
controllers :

 * Firmware SPI Memory Controller (FMC)
   . BMC firmware
   . 3 chip select pins (CE0 ~ CE2)
   . supports SPI type flash memory (CE0-CE1)
   . CE2 can be of NOR type flash but this is not supported by the
     driver

 * SPI Flash Controller (SPI1 and SPI2)
   . host firmware
   . 2 chip select pins (CE0 ~ CE1)
   . supports SPI type flash memory

Each controller has a memory range on which it maps its flash module
slaves. Each slave is assigned a memory window for its mapping that
can be changed at bootime with the Segment Address Register.

Each SPI flash slave can then be accessed in two modes: Command and
User. When in User mode, accesses to the memory segment of the slaves
are translated in SPI transfers. When in Command mode, the HW
generates the SPI commands automatically and the memory segment is
accessed as if doing a MMIO.

Currently, only the User mode is supported. Command mode needs a
little more work to check that the memory window on the AHB bus fits
the module size.

Based on previous work from Milton D. Miller II <miltonm@us.ibm.com>
Signed-off-by: NCédric Le Goater <clg@kaod.org>
Reviewed-by: NJoel Stanley <joel@jms.id.au>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

This patch removes the WARN_ONCE() test in spi_nor_write().
This macro triggers the display of a warning message almost every time we
use a UBI file-system because a write operation is performed at offset 64,
which is in the middle of the SPI NOR memory page. This is a valid
operation for ubifs.

Hence this warning is pretty annoying and useless so we just remove it.
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>
Suggested-by: NRichard Weinberger <richard@nod.at>
Suggested-by: NAndras Szemzo <szemzo.andras@gmail.com>
Acked-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The patch checks whether the Quad Enable bit is already set in the Status
Register. If so, the function exits immediately with a successful return
code.
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>

Xilinx Spartan-3AN FPGAs contain an In-System Flash where they keep
their configuration data and (optionally) some user data.

The protocol of this flash follows most of the spi-nor standard. With
the following differences:

- Page size might not be a power of two.
- The address calculation (default addressing mode).
- The spi nor commands used.

Protocol is described on Xilinx User Guide UG333
Signed-off-by: NRicardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

The x86-64 and some other architectures are missing readsl/writesl
functions, so this driver won't build on them. Use a more portable
ioread32_rep()/iowrite32_rep() instead.
Signed-off-by: NMarek Vasut <marex@denx.de>
Cc: Alan Tull <atull@opensource.altera.com>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Graham Moore <grmoore@opensource.altera.com>
Cc: Vignesh R <vigneshr@ti.com>
Cc: Yves Vandervennet <yvanderv@opensource.altera.com>
Suggested-by: NStefan Roese <sr@denx.de>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

This was entirely automated, using the script by Al:

  PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*<asm/uaccess.h>'
  sed -i -e "s!$PATT!#include <linux/uaccess.h>!" \
        $(git grep -l "$PATT"|grep -v ^include/linux/uaccess.h)

to do the replacement at the end of the merge window.
Requested-by: NAl Viro <viro@zeniv.linux.org.uk>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

The MTD backing dev info objects mtd_bdi was statically allocated.
So when MTD is built as a loadable module, this object fall in the
vmalloc address space.

The problem with that, is that the BDI APIs use wake_up_bit(), which calls
virt_to_page() to retrieve the memory zone of the page containing the
wait_queue to wake up, and virt_to_page() is not valid for vmalloc or
highmem addresses.

Fix this by allocating the BDI objects dynamically with kmalloc. The
objects now fall in the logical address space so that BDI APIs will
work in all cases (mtd builtin or module).
Signed-off-by: NSteve Longerbeam <steve_longerbeam@mentor.com>
Signed-off-by: NJim Baxter <jim_baxter@mentor.com>
Signed-off-by: NSandeep Jain <Sandeep_Jain@mentor.com>
Reviewed-by: NRichard Weinberger <richard@nod.at>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

Provide proper copyright notice and license information.
Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

This patch was triggered by the following Coccinelle error:

./drivers/mtd/maps/sc520cdp.c:246:3-9: \
	ERROR: missing iounmap; ioremap on line 242 \
	and execution via conditional on line 244

Since do_map_probe() is also invoked in this loop, it is also necessary to
map_destroy() any initialised struct mtd_info.
Signed-off-by: NLuis Henriques <henrix@camandro.org>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

All fsl_qspi_devtype_data structures are never modified.
This patch constify them.
Signed-off-by: NLABBE Corentin <clabbe.montjoie@gmail.com>
Acked-by: NHan Xu <han.xu@nxp.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

Add Everspin mr25h40 512KB MRAM to the list of supported chips.
Signed-off-by: NMasahiko Iwamoto <iwamoto@allied-telesis.co.jp>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Acked-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

This commit adds support in the spi-nor driver for the
N25Q016A, a 16Mbit SPI NOR flash from Micron.

Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Jagan Teki <jteki@openedev.com>
Signed-off-by: NMoritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: NJagan Teki <jteki@openedev.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

Add Atmel at25df321 spi-nor flash to the list of spi_nor_ids.

Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: NJagan Teki <jteki@openedev.com>
Acked-by: NWenyou Yang <wenyou.yang@atmel.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

We return success or possibly uninitialized values on these error paths
instead of proper error codes.

Fixes: 14062341 ("mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller")
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: NMarek Vasut <marex@denx.de>
Reviewed-by: NMoritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

There are CQSPI_MAX_CHIPSELECT elements in the ->f_pdata array so the >
should be >=.

Fixes: 14062341 ('mtd: spi-nor: Add driver for Cadence Quad SPI Flash Controller')
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

Signed-off-by: NSean Nyekjaer <sean.nyekjaer@prevas.dk>
Reviewed-by: NJagan Teki <jagan@openedev.com>
Acked-by: NMarek Vasut <marex@denx.de>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

The Spansion S25FL128S also supports dual read mode.
In addition remove flag SECT_4K. 4K erases are supported,
but not uniformly.
Signed-off-by: NHeiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: NJagan Teki <jteki@openedev.com>
Acked-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

With the S25FL127S nor flash part, each writing to the configuration
register takes hundreds of ms. During that  time, no more accesses to
the flash should be done (even reads).

This commit adds a wait loop after the register writing until the flash
finishes its work.

This issue could make rootfs mounting fail when the latter was done too
much closely to this quad enable bit setting step. And in this case, a
driver as UBIFS may try to recover the filesystem and may broke it
completely.
Signed-off-by: NJoël Esponde <joel.esponde@honeywell.com>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

Signed-off-by: NAsh Benz <ash.benz@bk.ru>
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com>

Trivial fix to spelling mistake in dev_err message
Signed-off-by: NColin Ian King <colin.king@canonical.com>
[Brian: add EOL newline]
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

After parsing TRX we should skip to the first block placed behind it.
Our code was working only with TRX with length not aligned to the
blocksize. In other cases (length aligned) it was missing the block
places right after TRX.

This fixes calculation and simplifies the comment.
Signed-off-by: NRafał Miłecki <rafal@milecki.pl>
Signed-off-by: NBrian Norris <computersforpeace@gmail.com>

The nand_to_mtd() helper is here to hide internal mtd_info <-> nand_chip
association and ease future refactors.

Make use of this helper instead of directly accessing chip->mtd.
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>

There is no need to initialize oobregion since it will be filled by
the iterator.

This function is called with mtd_ooblayout_free or mtd_ooblayout_ecc
for the iterator; both of them calls memset() to clear the oobregion.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

I hope this will make the code a little more readable.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

There is no need to initialize oobregion and section since they will
be filled by mtd_ooblayout_find_region().
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

debugfs_create_dir() and debugfs_create_file() returns NULL on error or
a pointer on success. They do not return the error value with ERR_PTR.
So we should not check the return with IS_ERR_OR_NULL, instead we
should just check for NULL.
Signed-off-by: NSudip Mukherjee <sudip.mukherjee@codethink.co.uk>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Drop raw_write return value (no longer used).
Drop raw_read  return value (for symmetry).
Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Enable NAND_ECC_CUSTOM_PAGE_ACCESS in the tango NFC driver.
Fixup the "raw" page accessors to send the proper NAND commands.
Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

If your controller already sends the required NAND commands when
reading or writing a page, then the framework is not supposed to
send READ0 and SEQIN/PAGEPROG respectively.
Signed-off-by: NMarc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Such debug lines might be useful when debugging the driver first,
but should be deleted from the upstream code.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Remove parentheses surrounding the whole right side of an assignment.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The nand_scan_ident/tail() returns an appropriate error value when
it fails.  Use it instead of the fixed -ENXIO.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The devm_request_irq() returns an appropriate error value when it
fails.  Use it instead of the fixed -ENODEV.

While we are here, reword the comment to make it fit in a single
line, fixing the misspelling of "initialization".
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

Use the managed variant instead of request_irq() and free_irq().
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The denali->blksperchip is set, but not referenced any more.  The
denali->totalblks is used only for calculating denali->blksperchip.
Both of them are unneeded.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

As far as I understood from the Kconfig menu deleted by commit
be7f39c5 ("Staging: delete spectra driver"), the "Spectra" is
specific to Intel Moorestown Platform.

The Denali NAND controller IP is used for various SoCs such as
Altera SOCFPGA, Socionext UniPhier, etc.  The platform specific
strings are not preferred in this driver.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>

The denali->fwblks is set by detect_partition_feature(), but it is
not referenced from anywhere.  That means the struct member fwblks
and the whole of detect_partition_feature() are unneeded.

The comment block implies this function is only for Intel platforms.
I found drivers/staging/spectra used to exist, but it was deleted by
commit be7f39c5 ("Staging: delete spectra driver") 5 years ago.

So, I guess nobody would need this function any more.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: NMarek Vasut <marek.vasut@gmail.com>
Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com>