1. 14 3月, 2017 5 次提交
  2. 13 3月, 2017 3 次提交
  3. 09 3月, 2017 11 次提交
  4. 08 3月, 2017 1 次提交
  5. 06 3月, 2017 2 次提交
    • C
      drm/i915/gvt: protect RO and Rsvd bits of virtual vgpu configuration space · c2e04fda
      Changbin Du 提交于
      Per PCI specification, Configuration Register has different types (RO,
      RW, RW1C, Rsvd). For RO Register bits are read-only and cannot be
      altered by software. For RW1C Register bits indicate status when read.
      A Set bit indicates a status event which is Cleared by writing a 1b.
      Writing a 0b to RW1C bits has no effect. Reserved Register is for future
      implementations, and they are read-only and must return zero when read.
      
      Current vGPU configuration write emulation just copy the value as it is.
      So we haven't emulated RO, RW1C and Rsvd Registers correctly. This patch
      is following the Spec to correct emulation logic. We add a function
      vgpu_cfg_mem_write to wrap the access to vGPU configuration memory.
      The write function uses a RW Register bitmap to avoid RO bits be
      overwritten, and emulate RW1C behavior for the particular status Register.
      
      v2:
        new = src[i] --> new = src[i] & mask (zhenyu)
      Signed-off-by: NChangbin Du <changbin.du@intel.com>
      Cc: Xiaoguang Chen <xiaoguang.chen@intel.com>
      Cc: Zhiyuan Lv <zhiyuan.lv@intel.com>
      Cc: Min He <min.he@intel.com>
      Reviewed-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      c2e04fda
    • C
      drm/i915/gvt: handle workload lifecycle properly · 8f1117ab
      Chuanxiao Dong 提交于
      Currently i915 has a request replay mechanism which can make sure
      the request can be replayed after a GPU reset. With this mechanism,
      gvt should wait until the GVT request seqno passed before complete
      the current workload. So that there should be a context switch interrupt
      come before gvt free the workload. In this way, workload lifecylce
      matches with the i915 request lifecycle. The workload can only be freed
      after the request is completed.
      
      v2: use gvt_dbg_sched instead of gvt_err to print when wait again
      Signed-off-by: NChuanxiao Dong <chuanxiao.dong@intel.com>
      Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
      8f1117ab
  6. 02 3月, 2017 5 次提交
  7. 01 3月, 2017 5 次提交
  8. 28 2月, 2017 3 次提交
  9. 25 2月, 2017 1 次提交
  10. 24 2月, 2017 4 次提交