1. 23 6月, 2017 1 次提交
  2. 06 6月, 2017 4 次提交
  3. 02 6月, 2017 1 次提交
  4. 26 4月, 2017 1 次提交
  5. 20 4月, 2017 2 次提交
  6. 11 4月, 2017 3 次提交
  7. 07 2月, 2017 1 次提交
  8. 23 9月, 2016 1 次提交
  9. 16 9月, 2016 2 次提交
  10. 30 8月, 2016 4 次提交
  11. 06 7月, 2016 3 次提交
  12. 01 7月, 2016 1 次提交
    • S
      iwlwifi: pcie: workaround HW shadow registers bug · 1316d595
      Sara Sharon 提交于
      Integrated 9000 devices have a bug with shadow registers
      value retention.
      If driver writes RBD registers while MAC is asleep the
      values are stored in shadow registers to be copied whenever
      MAC wakes up.
      However, in 9000 devices a MAC wakeup is not triggered
      and when the bus powers down due to inactivity the shadow
      values and dirty bits are lost.
      Turn on the chicken-bits that cause MAC wakeup for RX-related
      values as well when the device is in D0.
      When the device is in low power mode turn the RX wakeup chicken
      bits off since driver is idle and this W/A is not needed.
      Remove previous W/A which was ineffective.
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NLuca Coelho <luciano.coelho@intel.com>
      1316d595
  13. 11 5月, 2016 3 次提交
  14. 10 5月, 2016 1 次提交
  15. 12 4月, 2016 1 次提交
  16. 30 3月, 2016 3 次提交
  17. 10 3月, 2016 1 次提交
  18. 28 2月, 2016 1 次提交
  19. 31 1月, 2016 1 次提交
    • S
      iwlwifi: pcie: add 9000 series multi queue rx DMA support · 96a6497b
      Sara Sharon 提交于
      The 9000 series introduces several changes in the device
      DMA operation.
      As the device now supports multi-queue rx, several DMA channels
      should be configured.
      The flows of providing the device with the allocated RBDs now
      changes as well - the device maintains a separate table of used
      and free table.
      
      The hardware may use the free table to feed RBDs to any queue.
      This requires maintaing a shared table to map returned RBDs to
      the original RXB - for that purpose the VID is introduced - an
      internal identifier of the RB placed in the lower 12 bits and
      returned by HW in the used data.
      
      Another change is the support of 64 bit DMA address.
      Signed-off-by: NSara Sharon <sara.sharon@intel.com>
      Signed-off-by: NEmmanuel Grumbach <emmanuel.grumbach@intel.com>
      96a6497b
  20. 20 12月, 2015 1 次提交
  21. 02 12月, 2015 3 次提交
  22. 26 11月, 2015 1 次提交