We already have a read-modify-write helper, but there's more that can
be done with a read-modify-write helper if it returned the new value.
Modify the existing helper to return the new value, and arrange for
it to take one less argument by having the caller compute the register
address.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

bank->level_mask is merely the bitwise or of the level detection
context which we have already read in this function.  Rather than
repeating additional reads, compute it from the values already
read.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

One of the reasons for set_multiple() to exist is to allow multiple
GPIOs on the same chip to be changed simultaneously - see commit
5f424243 ("gpiolib: allow simultaneous setting of multiple GPIO
outputs"):

 - Simultaneous glitch-free setting of multiple pins on any kind of
   parallel bus attached to GPIOs provided they all reside on the
   same chip and bank.

In order for this to work, we should not use the atomic set/clear
registers, but instead read-modify-write the dataout register.  We
already take the spinlock to ensure that happens atomically, so
move the code into the set_multiple() function and kill the two
helper functions.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There is no reason to have helper functions to read the datain and
dataout registers when they are only used in one location.  Simplify
this code to make it more readable.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

omap_gpio_get() calls omap_get_gpio_datain() or omap_get_gpio_dataout()
to read the GPIO state. These two functions are only called from this
method, so they don't add much value.  Move their contents into
omap_gpio_get() method and simplify.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Architectures are single-copy atomic, which means that simply reading
a register is an inherently atomic operation.  There is no need to
take a spinlock here.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Move these two functions to live beside the rest of the gpio chip
implementation, rather than in the middle of the irq chip
implementation.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The irq_ack method does not fit our hardware requirements. Edge
interrupts must be cleared before we handle them, and level interrupts
must be cleared after handling them.

We handle the interrupt clearance in our interrupt handler for edge IRQs
and in the unmask method for level IRQs.

Replace the irq_ack method with the no-op method from the dummy irq
chip.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The edge interrupt handling was effectively:

	isr = ISR_reg & enabled;
	if (bank->level_mask)
		level_mask = bank->level_mask & enabled;
	else
		level_mask = 0;

	edge = isr & ~level_mask;

When bank->level_mask is zero, level_mask will be computed as zero
anyway, so the if() statement is redundant.  We are then left with:

	isr = ISR_reg & enabled;
	level_mask = bank->level_mask & enabled;
	edge = isr & ~level_mask;

This can be simplified further to:

	isr = ISR_reg & enabled;
	edge = isr & ~bank->level_mask;

since the second mask with 'enabled' is redundant.

Improve the associated comment as well.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Commit c4791bc6 ("gpio: omap: drop omap_gpio_list") removed the
list head and addition to the list head of each gpio bank, but failed
to remove the list_del() call and the node inside struct gpio_bank.
Remove these too.

Fixes: c4791bc6 ("gpio: omap: drop omap_gpio_list")
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Commit 384ebe1c ("gpio/omap: Add DT support to GPIO driver") added
the register definition tables to the gpio-omap driver. Subsequently to
that commit, commit 4e962e89 ("gpio/omap: remove cpu_is_omapxxxx()
checks from *_runtime_resume()") added definitions for irqstatus_raw*
registers to the legacy OMAP4 definitions, but missed the DT
definitions.

This causes an unintentional change of behaviour for the 1.101 errata
workaround on OMAP4 platforms. Fix this oversight.

Fixes: 4e962e89 ("gpio/omap: remove cpu_is_omapxxxx() checks from *_runtime_resume()")
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Documentation states:

  NOTE: There must be a correlation between the wake-up enable and
  interrupt-enable registers. If a GPIO pin has a wake-up configured
  on it, it must also have the corresponding interrupt enabled (on
  one of the two interrupt lines).

Ensure that this condition is always satisfied by enabling the detection
events after enabling the interrupt, and disabling the detection before
disabling the interrupt.  This ensures interrupt/wakeup events can not
happen until both the wakeup and interrupt enables correlate.

If we do any clearing, clear between the interrupt enable/disable and
trigger setting.
Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NGrygorii Strashko <grygorii.strashko@ti.com>
Tested-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The stmmac driver currently ignores the GPIO flags which are passed via
devicetree because it operates with legacy GPIO numbers instead of GPIO
descriptors. stmmac assumes that the GPIO is "active HIGH" by default.
This can be overwritten by setting "snps,reset-active-low" to make the
reset line "active LOW".

Recent Amlogic SoCs (G12A which includes S905X2 and S905D2 as well as
G12B which includes S922X) use GPIOZ_14 or GPIOZ_15 for the PHY reset
line. These GPIOs are special because they are marked as "3.3V input
tolerant open drain" pins which means they can only drive the pin output
LOW (to reset the PHY) or to switch to input mode (to take the PHY out
of reset).
The GPIO subsystem already supports this with the GPIO_OPEN_DRAIN and
GPIO_OPEN_SOURCE flags in the devicetree bindings.

Add the stmmac PHY reset line specific active low parsing to gpiolib-of
so stmmac can be ported to GPIO descriptors while being backwards
compatible with device trees which use the "old" way of specifying the
polarity.
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Keeping the irq_chip definition static shares it with multiple instances
of the altera gpiochip in the system. This is bad and now we get this
warning from gpiolib core:

"detected irqchip that is shared with multiple gpiochips: please fix the
driver."

Hence, move the irq_chip definition from being driver static into the
struct altera_gpio_chips. So a unique irq_chip is used for each gpiochip
instance.
Signed-off-by: NPhil Reid <preid@electromag.com.au>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver was using the OF GPIO helper API, but barely used any of its
features and it cost more code than it saved. Also, the OF GPIO code is
now deprecated. Convert it to use a more standard setup and use devm
APIs for initialization to avoid the need for a remove function.

Our rationale for this change is that we are using the Xilinx GPIO with
resources injected using the MFD core rather than on the device tree
itself. Using platform rather than OF-specific resources allows this to
work for free.
Signed-off-by: NRobert Hancock <hancock@sedsystems.ca>
Acked-by: NMichal Simek <michal.simek@xilinx.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

FMC has its own GPIO handling, the inclusion of <linux/gpio.h>
is only to reuse some flags that we can just as well provide
using local defines.

Cc: Federico Vaga <federico.vaga@cern.ch>
Cc: Pat Riehecky <riehecky@fnal.gov>
Acked-by: NAlessandro Rubini <rubini@gnudd.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add new compatible for K3 AM654 SoCs.
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add K3 dependencies to enable the driver on K3 platforms.
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fix the compiler warning with ARM64 config enabled
as the current mask assumes 32 bit by default.
Signed-off-by: NKeerthy <j-keerthy@ti.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

When a gpio_chip wants to request a descriptor from itself
using gpiochip_request_own_desc() it needs to be able to specify
fully how to use the descriptor, notably line inversion
semantics. The workaround in the gpiolib.c can be removed
and cases (such as SPI CS) where we need at times to request
a GPIO with line inversion semantics directly on a chip for
workarounds, can be fully supported with this call.

Fix up some users of the API that weren't really using the
last flag to set up the line as input or output properly
but instead just calling direction setting explicitly
after requesting the line.

Cc: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The TI TCA9539 is a variant of the PCA953x GPIO expander,
with 16 GPIOs and interrupt functionality.
Signed-off-by: NPeter Robinson <pbrobinson@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The Freescale SPI chipselects are special: while everyone else
is using "cs-gpios" the Freescale platforms just use "gpios".
Fix this by responding with "gpios" when asking for "cs-gpios"
in a freescale device node, so we hide this pecularity from
the SPI core.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use standard functions. Eventually we will be able to drop all
checks and just assign irq_domain_translate_twocell() to this
callback.

Cc: Brian Masney <masneyb@onstation.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This feature is deprecated, it is helpful to inform users about
this. I'm resisting the temptation to add "depends on BROKEN"
to this, but saving that for later.
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Simplify error checking code by replacing multiple ERR macros with a
call to PTR_ERR_OR_ZERO. No functional change intended.
Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: linux-gpio@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fixes: eb9d1bf0: "random: only read from /dev/random after its pool has received 128 bits"
Reported-by: Nkernel test robot <lkp@intel.com>
Signed-off-by: NTheodore Ts'o <tytso@mit.edu>

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  should have received a copy of the gnu general public license along
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Reviewed-by: NRichard Fontana <rfontana@redhat.com>
Reviewed-by: NAllison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190520075212.338332327@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Based on 1 normalized pattern(s):

  is free software you can redistribute it and or modify it under the
  terms of the gnu general public license as published by the free
  software foundation either version 2 or at your option any later
  version [drbd] is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details you should have received a
  copy of the gnu general public license along with [drbd] see the
  file copying if not write to the free software foundation 675 mass
  ave cambridge ma 02139 usa

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 16 file(s).
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Reviewed-by: NAllison Randal <allison@lohutok.net>
Reviewed-by: NRichard Fontana <rfontana@redhat.com>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190520075212.050796421@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version this program is distributed in the
  hope that it will be useful but without any warranty without even
  the implied warranty of merchantability or fitness for a particular
  purpose see the gnu general public license for more details you
  should have received a copy of the gnu general public license along
  with this program if not write to the free software foundation inc
  59 temple place suite 330 boston ma 02111 1307 usa the full gnu
  general public license is included in this distribution in the file
  called license

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 4 file(s).
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Reviewed-by: NRichard Fontana <rfontana@redhat.com>
Reviewed-by: NAllison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190520075211.959886972@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>