- 08 9月, 2020 4 次提交
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由 Maxime Ripard 提交于
In vc5, the HVS has 6 outputs and 3 FIFOs (or channels), with pixelvalves each being assigned to a given output, but each output can then be muxed to feed from multiple FIFOs. Since vc4 had that entirely static, both were probably equivalent, but since that changes, let's rename hvs_channel to hvs_output in the vc4_crtc_data, since a pixelvalve is really connected to an output, and not to a FIFO. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Tested-by: NHoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: NStefan Wahren <stefan.wahren@i2se.com> Reviewed-by: NDave Stevenson <dave.stevenson@raspberrypi.com> Link: https://patchwork.freedesktop.org/patch/msgid/b7618bb17b1c435c5d6ce50bcde2fe9243281d02.1599120059.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The COB allocation depends on the HVS channel used for a given pixelvalve. While the channel allocation was entirely static in vc4, vc5 changes that and at bind time, a pixelvalve can be assigned to multiple HVS channels. Let's prepare that rework by allocating the COB when it's actually needed. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Tested-by: NHoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: NStefan Wahren <stefan.wahren@i2se.com> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/484cbd4b00cfeee425295df438222258cc39a3dd.1599120059.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
Some pixelvalves in vc5 use the same interrupt line so let's register our interrupt handler as a shared one. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Tested-by: NHoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: NStefan Wahren <stefan.wahren@i2se.com> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/5a915d374357f41083ac71779fa9b2c35a339c2f.1599120059.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
Some of the HDMI pixelvalves in vc5 output two pixels per clock cycle. Let's put the number of pixel output per clock cycle in the CRTC data and update the various calculations to reflect that. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Tested-by: NHoegeun Kwon <hoegeun.kwon@samsung.com> Tested-by: NStefan Wahren <stefan.wahren@i2se.com> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/18a3bb079981ba820132b37e736a4bb371234d2e.1599120059.git-series.maxime@cerno.tech
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- 07 7月, 2020 8 次提交
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由 Maxime Ripard 提交于
Now that the code in vc4_crtc accessing registers is only meant for the pixelvalve, it doesn't make sense anymore to test whether we're accessing the TXP or not and we can safely remove those checks. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/c044daba470fcb1cb57e3d34d88f75325b2ebbab.1591882579.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The TXP so far has been leveraging the PixelValve infrastructure in the driver, that was really two things: the interaction with DRM's CRTC concept, the setup of the underlying pixelvalve and the setup of the shared HVS, the pixelvalve part being irrelevant to the TXP since it accesses the HVS directly. Now that we have a clear separation between the three parts, we can represent the TXP as a CRTC of its own, leveraging the common CRTC and HVS code, but leaving aside the pixelvalve setup. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20f387f881b57f3474fa42d94cfd8bc1b7b80595.1591882579.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The TXP driver is the only place where we need to set the txp_armed flag, so let's move the function in the TXP driver. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/12b383e7b8462e281b00c0a21b2b50f13691bead.1591882579.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The upcoming patches to turn the TXP into a full-blown CRTC will have the same CRTC initialisation code, so let's move it into a separate, public, function so that we can reuse it later on. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/3a3026c0e7408895d154d8dea454cf6d1c459715.1591882579.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The CRTC hooks are called both for the TXP and the pixelvalve, yet some will read / write the registers as if the device was a pixelvalve, which won't really work. Let's make sure we only access those registers if we are running on a PixelValve. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/b55e31869304c748920c261eba87b3275dbeb297.1591882579.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The vc4_crtc_data structure is currently storing data related to both the general CRTC information needed by the rest of the vc4 driver (like HVS output and available FIFOs) and some related to the pixelvalve attached to that CRTC. Let's split this into two structures so that we can reuse the CRTC part into the TXP later on. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/8eb317c91ac208d7f926d76ad421002fa0364c47.1591882579.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
We'll need the CRTC state related functions to be exported so that we can reuse them for the TXP. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/658f40aa01d7a45cbf6feebfc3dc6549f100d110.1591882579.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The CRTC in vc4 is backed by two devices, the HVS that does the composition and the PixelValve that does the timing generation. The writeback is kind of a special case since it doesn't have an associated pixelvalve but goes straight from the HVS to the TXP. Therefore, it makes sense to move out the HVS setup code into helpers so that we can also reuse them from the TXP driver. Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/96443394e81429ee38f070cfe231701b07e56d69.1591882579.git-series.maxime@cerno.tech
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- 03 7月, 2020 1 次提交
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由 Daniel Vetter 提交于
Now also comes with the added benefit of doing a drm_crtc_vblank_off(), which means vblank state isn't ill-defined and fail-y at driver load before the first modeset on each crtc. Reviewed-by: NMaxime Ripard <mripard@kernel.org> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Cc: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200612160056.2082681-5-daniel.vetter@ffwll.ch
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- 10 6月, 2020 7 次提交
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由 Maxime Ripard 提交于
The HACT_ACT field only needs to be written to when using a DSI display. Let's move that setup to our DSI branch to clear a bit the common path. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/7a93436f97666a2aa025686ef3ff3606de4bec67.1590594512.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The hvs_latency_pix variable doesn't need to be a variable and can just be defined. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/8535c679f79af8abaa1b7796261bfeda11f874fd.1590594512.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
We'll need to access the crtc_state from outside of vc4_crtc.c, so let's move it to vc4_drv.h Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/1e6e563f9c75961e2885c9d648a3130d3b46b6d1.1590594512.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
of_device_get_match_data allow to simplify a bit the retrieval of the data associated to the pixelvalve compatible. Let's use it. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/1ff06413a1350d28bc3e88b034ed7ad23834e5bd.1590594512.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
Since we're going to introduce pixelvalve data structures for other SoCs than the BCM2835, let's rename the structures defined in the code to make it obvious which SoC we're targeting. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/39aed7dd512ce2a4560902974ec26b16b88ec68b.1590594512.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
So far the plane creation was done when each CRTC was bound, and those planes were only tied to the CRTC that was registering them. This causes two main issues: - The planes in the vc4 hardware are actually not tied to any CRTC, but can be used with every combination - More importantly, so far, we allocate 10 planes per CRTC, with 3 CRTCs. However, the next generation of hardware will have 5 CRTCs, putting us well above the maximum of 32 planes currently allowed by DRM. This patch is the first one in a series of patches that will take down both of these issues so that we can support the next generation of hardware while keeping a good amount of planes. We start by changing the way the planes are registered to first registering the primary planes for each CRTC in the CRTC bind function as we used to, but moving the overlay and cursor creation to the main driver bind function, after all the CRTCs have been bound, and make the planes associated to all CRTCs. This will slightly change the ID order of the planes, since the primary planes of all CRTCs will be first, and then a pattern of 8 overlays, 1 cursor plane for each CRTC. This shouldn't cause any trouble since the ordering between the planes is preserved though. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/0b85a3fdb20bb4ff85fb62cabd082d5a65e2730b.1590594512.git-series.maxime@cerno.tech
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由 Maxime Ripard 提交于
The planes so far were created as part of the CRTC binding code with each planes created associated only to one CRTC. However, the hardware in the vc4 doesn't really have such constraint and can be used with any CRTC. In order to rework this, let's first move the overlay and cursor planes creation to a function of its own. Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/a378ea56214179f1f25fcd36ecc69511edd1e790.1590594512.git-series.maxime@cerno.tech
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- 13 2月, 2020 2 次提交
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由 Thomas Zimmermann 提交于
VBLANK callbacks in struct drm_driver are deprecated in favor of their equivalents in struct drm_crtc_funcs. Convert vc4 over. Signed-off-by: NThomas Zimmermann <tzimmermann@suse.de> Acked-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200123135943.24140-19-tzimmermann@suse.de
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由 Thomas Zimmermann 提交于
The callback struct drm_driver.get_scanout_position() is deprecated in favor of struct drm_crtc_helper_funcs.get_scanout_position(). Convert vc4 over. Signed-off-by: NThomas Zimmermann <tzimmermann@suse.de> Acked-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20200123135943.24140-18-tzimmermann@suse.de
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- 04 10月, 2019 1 次提交
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由 Chris Wilson 提交于
In preparation for rearranging the booleans into a flags field, ensure all the current users are using the inline helpers and not directly accessing the members. Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Reviewed-by: NTvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191003210100.22250-3-chris@chris-wilson.co.uk
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- 17 7月, 2019 1 次提交
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由 Sam Ravnborg 提交于
Drop use of the deprecated header drmP.h. Fix so vc4_drv.h is now self-contained, and fixed fall-out in remaining files. Divided include files in blocks. Sorted include files within their blocks. Signed-off-by: NSam Ravnborg <sam@ravnborg.org> Acked-by: NEmil Velikov <emil.velikov@collabora.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190716064220.18157-7-sam@ravnborg.org
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- 19 6月, 2019 1 次提交
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由 Thomas Gleixner 提交于
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Reviewed-by: NEnrico Weigelt <info@metux.net> Reviewed-by: NKate Stewart <kstewart@linuxfoundation.org> Reviewed-by: NAllison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.deSigned-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 24 4月, 2019 2 次提交
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由 Maarten Lankhorst 提交于
A pointer to crtc was missing, resulting in the following build error: drivers/gpu/drm/vc4/vc4_crtc.c:1045:44: sparse: sparse: incorrect type in argument 1 (different base types) drivers/gpu/drm/vc4/vc4_crtc.c:1045:44: sparse: expected struct drm_crtc *crtc drivers/gpu/drm/vc4/vc4_crtc.c:1045:44: sparse: got struct drm_crtc_state *state drivers/gpu/drm/vc4/vc4_crtc.c:1045:39: sparse: sparse: not enough arguments for function vc4_crtc_destroy_state Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Reported-by: Nkbuild test robot <lkp@intel.com> Cc: Eric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/2b6ed5e6-81b0-4276-8860-870b54ca3262@linux.intel.com Fixes: d0810679 ("drm/vc4: Fix memory leak during gpu reset.") Cc: <stable@vger.kernel.org> # v4.6+ Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Maarten Lankhorst 提交于
__drm_atomic_helper_crtc_destroy_state does not free memory, it only cleans it up. Fix this by calling the functions own destroy function. Fixes: 6d6e5003 ("drm/vc4: Allocate the right amount of space for boot-time CRTC state.") Cc: Eric Anholt <eric@anholt.net> Cc: <stable@vger.kernel.org> # v4.6+ Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190301125627.7285-2-maarten.lankhorst@linux.intel.com
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- 04 4月, 2019 1 次提交
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由 Eric Anholt 提交于
The global list of all debugfs entries for the driver was painful: the list couldn't see into the components' structs, so each component had its own debugs show function to find the component, then find the regset and dump it. The components also had to be careful to check that they were actually registered in vc4 before dereferencing themselves, in case they weren't probed on a particular platform. They routinely failed at that. Instead, we can have the components add their debugfs callbacks to a little list in vc4 to be registered at drm_dev_register() time, which gets vc4_debugfs.c out of the business of knowing the whole list of components. Thanks to this change, dsi0 (if it existed) would register its node. v2: Rebase on hvs_underrun addition. v3: whitespace fixup Signed-off-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190401183559.3823-1-eric@anholt.netReviewed-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com>
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- 02 4月, 2019 1 次提交
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由 Eric Anholt 提交于
This removes a bunch of duplicated boilerplate for the debugfs vs runtime printk debug dumping. Signed-off-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20190220210343.28157-2-eric@anholt.netReviewed-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com>
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- 06 3月, 2019 1 次提交
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由 Boris Brezillon 提交于
Add a debugfs entry and helper for reporting HVS underrun errors as well as helpers for masking and unmasking the underrun interrupts. Add an IRQ handler and initial IRQ configuration. Rework related register definitions to take the channel number. Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: NPaul Kocialkowski <paul.kocialkowski@bootlin.com> Reviewed-by: NEric Anholt <eric@anholt.net> Signed-off-by: NMaxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190220155124.25022-2-paul.kocialkowski@bootlin.com
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- 24 1月, 2019 1 次提交
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由 Daniel Vetter 提交于
Having the probe helper stuff (which pretty much everyone needs) in the drm_crtc_helper.h file (which atomic drivers should never need) is confusing. Split them out. To make sure I actually achieved the goal here I went through all drivers. And indeed, all atomic drivers are now free of drm_crtc_helper.h includes. v2: Make it compile. There was so much compile fail on arm drivers that I figured I'll better not include any of the acks on v1. v3: Massive rebase because i915 has lost a lot of drmP.h includes, but not all: Through drm_crtc_helper.h > drm_modeset_helper.h -> drmP.h there was still one, which this patch largely removes. Which means rolling out lots more includes all over. This will also conflict with ongoing drmP.h cleanup by others I expect. v3: Rebase on top of atomic bochs. v4: Review from Laurent for bridge/rcar/omap/shmob/core bits: - (re)move some of the added includes, use the better include files in other places (all suggested from Laurent adopted unchanged). - sort alphabetically v5: Actually try to sort them, and while at it, sort all the ones I touch. v6: Rebase onto i915 changes. v7: Rebase once more. Acked-by: NHarry Wentland <harry.wentland@amd.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: NBenjamin Gaignard <benjamin.gaignard@linaro.org> Acked-by: NJani Nikula <jani.nikula@intel.com> Acked-by: NNeil Armstrong <narmstrong@baylibre.com> Acked-by: NOleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Acked-by: NCK Hu <ck.hu@mediatek.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Acked-by: NSam Ravnborg <sam@ravnborg.org> Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NLiviu Dudau <liviu.dudau@arm.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: virtualization@lists.linux-foundation.org Cc: etnaviv@lists.freedesktop.org Cc: linux-samsung-soc@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Cc: linux-mediatek@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: spice-devel@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-tegra@vger.kernel.org Cc: xen-devel@lists.xen.org Link: https://patchwork.freedesktop.org/patch/msgid/20190117210334.13234-1-daniel.vetter@ffwll.ch
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- 19 12月, 2018 1 次提交
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由 Boris Brezillon 提交于
Applyin margins is just a matter of scaling all planes appropriately and adjusting the CRTC X/Y offset to account for the left/right/top/bottom borders. Create a vc4_plane_margins_adj() function doing that and call it from vc4_plane_setup_clipping_and_scaling() so that we are ready to attach margins properties to the HDMI connector. Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: NEric Anholt <eric@anholt.net> Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20181206142439.10441-5-boris.brezillon@bootlin.com
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- 09 9月, 2018 1 次提交
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由 Daniel Vetter 提交于
This leaves all the commit/check and state handling in drm_atomic.c, while pulling all the uapi glue and the huge ioctl itself into a seprate file. This seems to almost perfectly split the rather big drm_atomic.c file into 2 equal sizes. Also adjust the kerneldoc and type a very terse overview text. v2: Rebase. v3: Fix tiny typo. v4: - Fixup armada, newly converted atomic driver hooray! - Fixup msm/dpu1, newly added too. Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Cc: David Airlie <airlied@linux.ie> Cc: Gustavo Padovan <gustavo@padovan.org> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Sean Paul <seanpaul@chromium.org> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Cc: Rob Clark <robdclark@gmail.com> Cc: Eric Anholt <eric@anholt.net> Cc: intel-gfx@lists.freedesktop.org Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Acked-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180905135711.28370-7-daniel.vetter@ffwll.ch
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- 07 7月, 2018 1 次提交
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由 Boris Brezillon 提交于
The transposer block is providing support for mem-to-mem composition, which is exposed as a drm_writeback connector in DRM. Add a driver to support this feature. Signed-off-by: NBoris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180703075022.15138-9-boris.brezillon@bootlin.com
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- 02 7月, 2018 1 次提交
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由 Ville Syrjälä 提交于
Use drm_crtc_mask() where appropriate. Cc: Eric Anholt <eric@anholt.net> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180626194716.12522-9-ville.syrjala@linux.intel.comReviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: NEric Anholt <eric@anholt.net>
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- 12 6月, 2018 1 次提交
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由 Ville Syrjälä 提交于
We want to get rid of plane->fb/crtc on atomic drivers. Stop setting them. Cc: Eric Anholt <eric@anholt.net> Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com> Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20180525185045.29689-13-ville.syrjala@linux.intel.comReviewed-by: NEric Anholt <eric@anholt.net> Reviewed-by: NSinclair Yeh <syeh@vmware.com>
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- 01 5月, 2018 1 次提交
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由 Boris Brezillon 提交于
Commit b9f19259 ("drm/vc4: Add the DRM_IOCTL_VC4_GEM_MADVISE ioctl") introduced a mechanism to mark some BOs as purgeable to allow the driver to drop them under memory pressure. In order to implement this feature we had to add a mechanism to mark BOs as currently used by a piece of hardware which materialized through the ->usecnt counter. Plane code is supposed to increment usecnt when it attaches a BO to a plane and decrement it when it's done with this BO, which was done in the ->prepare_fb() and ->cleanup_fb() hooks. The problem is, async page flip logic does not go through the regular atomic update path, and ->prepare_fb() and ->cleanup_fb() are not called in this case. Fix that by manually calling vc4_bo_{inc,dec}_usecnt() in the async-page-flip path. Note that all this should go away as soon as we get generic async page flip support in the core, in the meantime, this fix should do the trick. Fixes: b9f19259 ("drm/vc4: Add the DRM_IOCTL_VC4_GEM_MADVISE ioctl") Reported-by: NPeter Robinson <pbrobinson@gmail.com> Cc: <stable@vger.kernel.org> Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/20180430133232.32457-1-boris.brezillon@bootlin.com Link: https://patchwork.freedesktop.org/patch/msgid/20180430133232.32457-1-boris.brezillon@bootlin.com
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- 24 4月, 2018 1 次提交
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由 Stefan Schake 提交于
The hardware has a single block for applying a CTM prior to gamma lut. It can be fed with pixels from one of our CRTC at a time and uses a matrix with S0.9 scalars. Use private atomic state to reject attempts from userland to apply CTM for more than one CRTC at a time and reject matrices with scalars that we can't approximate without integer bits. Signed-off-by: NStefan Schake <stschake@gmail.com> Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/218067/
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- 18 4月, 2018 2 次提交
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由 Stefan Schake 提交于
We need to access the channel for configuring our CTM hardware. Signed-off-by: NStefan Schake <stschake@gmail.com> Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/1523479755-20812-4-git-send-email-stschake@gmail.com
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由 Stefan Schake 提交于
We are an atomic driver so the gamma LUT should also be exposed as a CRTC property through the DRM atomic color management. This will also take care of the legacy path for us. Signed-off-by: NStefan Schake <stschake@gmail.com> Signed-off-by: NEric Anholt <eric@anholt.net> Reviewed-by: NEric Anholt <eric@anholt.net> Link: https://patchwork.freedesktop.org/patch/msgid/1523479755-20812-3-git-send-email-stschake@gmail.com
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