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  1. 27 1月, 2006 4 次提交
    • T
      [PATCH] libata: fix ata_qc_issue() error handling · 8e436af9
      由 Tejun Heo 提交于 
      When ata_qc_issue() fails, the qc might have been dma mapped or not.
So, performing only ata_qc_free() results in dma map leak.  This patch
makes ata_qc_issue() mark dma map flags correctly on failure and calls
ata_qc_complete() after ata_qc_issue() fails.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      8e436af9
    • T
      [PATCH] libata: make the owner of a qc responsible for freeing it · 77853bf2
      由 Tejun Heo 提交于 
      qc used to be freed automatically on command completion.  However, as
a qc can carry information about its completion status, it can be
useful to its owner/issuer after command completion.  This patch makes
freeing qc responsibility of its owner.  This simplifies
ata_exec_internal() and makes command turn-around for atapi request
sensing less hackish.

This change was originally suggested by Jeff Garzik.
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      77853bf2
    • T
      [PATCH] libata: fold __ata_qc_complete() into ata_qc_free() · 4ba946e9
      由 Tejun Heo 提交于 
      All ata_qc_free() does is calling __ata_qc_complete() which isn't used
anywhere else.  Fold __ata_qc_complete() into ata_qc_free().
Signed-off-by: NTejun Heo <htejun@gmail.com>
Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      4ba946e9
    • T
      [PATCH] ata_piix: fix MAP VALUE interpretation for for ICH6/7 · ff0fc146
      由 Tejun Heo 提交于 
      Unlike their older siblings, ICH6 and 7 use different scheme for MAP
VALUE.  This patch makes ata_piix interpret MV properly on ICH6/7.

Pre-ICH6/7

 The value of these bits indicate the address range the SATA port
 responds to, and whether or not the SATA and IDE functions are
 combined.

 000 = Non-combined. P0 is primary master. P1 is secondary master.
 001 = Non-combined. P0 is secondary master. P1 is primary master.
 100 = Combined. P0 is primary master. P1 is primary slave. P-ATA is
       2:0 Map Value secondary.
 101 = Combined. P0 is primary slave. P1 is primary master. P-ATA is
       secondary.
 110 = Combined. P-ATA is primary. P0 is secondary master. P1 is
       secondary slave.
 111 = Combined. P-ATA is primary. P0 is secondary slave. P1 is
       secondary master.

ICH6/7

 Map Value - R/W. Map Value (MV): The value in the bits below indicate
the address range the SATA ports responds to, and whether or not the
PATA and SATA functions are combined. When in combined mode, the AHCI
memory space is not available and AHCI may not be used.

 00 = Non-combined. P0 is primary master, P2 is the primary slave. P1
      is secondary master, P3 is the 1:0 secondary slave (desktop
      only). P0 is primary master, P2 is the primary slave (mobile
      only).
 01 = Combined. IDE is primary. P1 is secondary master, P3 is the
      secondary slave. (desktop only)
 10 = Combined. P0 is primary master. P2 is primary slave. IDE is secondary
 11 = Reserved
Signed-off-by: NTejun Heo <htejun@gmail.com>

--

Jeff, without this patch, ata_piix misdetects my ICH7's combined mode,
ending up not applying bridge limits to PX-710SA and configuring IDE
drive on 40-c cable to UDMA/66.

Thanks.
Signed-off-by: NJeff Garzik <jgarzik@pobox.com>
      ff0fc146
  3. 18 1月, 2006 7 次提交
  5. 17 1月, 2006 5 次提交
  7. 15 1月, 2006 24 次提交