- 03 1月, 2018 1 次提交
-
-
由 Julia Lawall 提交于
This driver creates various const structures that it stores in the data field of an of_device_id array. Adding const to the declaration of the location that receives the const value from the data field ensures that the compiler will continue to check that the value is not modified. Furthermore, the const-discarding cast on the extraction from the data field is no longer needed. Done using Coccinelle. Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 29 6月, 2017 1 次提交
-
-
由 Colin Ian King 提交于
Trivial fix to spelling mistake in dev_info message Signed-off-by: NColin Ian King <colin.king@canonical.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 26 5月, 2015 2 次提交
-
-
由 Qipan Li 提交于
USP-based SPI need a disable and enable, otherwise it doesn't work. this patch adds it as HW initialization. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Qipan Li 提交于
this job has been done by spi core. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 21 5月, 2015 1 次提交
-
-
由 Qipan Li 提交于
USP is a general purpose serial port in SiRFSoC, which can work as SPI. the most data flow of USP and pure SPI is same with main differences in registers layout. this patch moves registers layout to private data, and use flags to differentiate other minor differences between prima2-spi, prima2-usp and atlas7-usp for hardware configuration. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 07 5月, 2015 2 次提交
-
-
由 Qipan Li 提交于
Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Qipan Li 提交于
move spi controller's gpio request work out from probe() to spi device register stage, so after spi device register spi controller can deactive device's gpio chipselect. old code can't do it because gpio request has not be done until device register is finised in spi_bitbang_start. and add cleanup function to free CS gpio. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 28 4月, 2015 1 次提交
-
-
由 Qipan Li 提交于
return error for unsupported bits-per-word format, BUG() is not right for this scenerios as we are not an ASSERT but an error handler. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <baohua.song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 07 1月, 2015 1 次提交
-
-
由 Barry Song 提交于
"sirf,marco-spi" is redundant as all SPI controllers in CSR SiRFSoC are compatible with prima2-spi. at the same time, the whole marco project was dropped and its replacement atlas7 is also compatible with prima2 in SPI. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 22 11月, 2014 1 次提交
-
-
由 Qipan Li 提交于
in SPI boot mode, romcode uses SPI controller to fetch data from NOR flash. Here we need to reset the hardware IP to restore its state. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 18 11月, 2014 2 次提交
-
-
由 Qipan Li 提交于
if spi device has no frequency, spi core will setup the default frequency to max_speed_hz of spi_master according to int spi_setup(struct spi_device *spi) { ... if (!spi->max_speed_hz) spi->max_speed_hz = spi->master->max_speed_hz; ... } this patch moves CSR SiRFSoC SPI frequency set to follow SPI core behaviour. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Qipan Li 提交于
commit 8c328a26 ("spi: sirf: Avoid duplicate code in various bits_per_word cases") is wrong in setting data width register of fifo is not right, it should use sspi->word_width >> 1 to set related bits. According to hardware spec, the mapping between register value and data width: 0 - byte 1 - WORD 2 - DWORD Fixes: 8c328a26 ("spi: sirf: Avoid duplicate code in various bits_per_word cases") is wrong in setting data width register of Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
-
- 20 10月, 2014 1 次提交
-
-
由 Wolfram Sang 提交于
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
-
- 05 9月, 2014 5 次提交
-
-
由 Qipan Li 提交于
let "#define" statement keep same indentation. the old code layout is pretty ugly. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Qipan Li 提交于
for command mode spi transfer, HW spec requires to do fifo reset work to clear FIFO status. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Qipan Li 提交于
unify 'cmd_transfer' like 'pio_transfer' and 'dma_transfer' as void function, and also change left_rx_word according to transfer result. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
由 Qipan Li 提交于
in spi interrupt handler, we need check RX_IO_DMA status to ensure rx fifo have received the specify count data. if not set, the while statement in spi isr function will keep loop, at last, make the kernel hang. [The code is actually there in the interrupt handler but apparently it needs the interrupt unmasking so the handler sees the status -- broonie] Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
-
由 Qipan Li 提交于
the old codes check the cs-gpios, if the gpio number is 0 like: <&gpio, 0, 0>, the driver will use the only hardware chipselect. this is wrong because of_spi_register_master() can read property cs-gpios from device node and set the spi master's cs number and gpio cs automatically based on whether the cs-gpios is valid. this patch fixes the beviour of CSR spi driver and move to a core level supported way. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@kernel.org>
-
- 21 5月, 2014 1 次提交
-
-
由 Qipan Li 提交于
current PIO tranfer method be described as follows: 1. fill as much as bytes but no more than 256 bytes(fifo size) 2. enable oflow/uflow/txfifo_empty interrupt 3. isr process 3 interrupt signal, do complete works. 4. after isr done, if there are left bytes go into 1 else go into 5 5. transfer end by current PIO transfer method: 1. reduce interrupt counts in spi interrupt line. 2. reduce interrupt latency because no do data fill/fetch in isr. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 15 4月, 2014 6 次提交
-
-
由 Qipan Li 提交于
split sirfsoc_spi_transfer function into 3 sub-functions: spi_sirfsoc_cmd_transfer, spi_sirfsoc_pio_transfer and spi_sirfsoc_dma_transfer. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Qipan Li 提交于
sometimes t->tx can be equal with t->rx. for example, spidev will make tx and rx point to spidev->buffer at the same time. currently, for this case, we map the buffer BIDIRECTION to fix the cache consistency. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Qipan Li 提交于
fix a lot of "line over 80 characters" checkpatch issues, on which the users of the driver, key customers care about this very much. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Qipan Li 提交于
orignal GPIO chipslect is not standard because it don't take care to the chipselect signal: BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Qipan Li 提交于
SPI bitbang supply "chipselect" interface for change chip-select line , in the SiRFSoC SPI controller, we need to enable "SPI_CS_IO_MODE", otherwise, spi_sirfsoc_chipselect() has no effect. now the driver is working is because SPI controller will control CS automatically without SPI_CS_IO_MODE. this patch makes the CS controller really controlled by software. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Qipan Li 提交于
the old code uses wrong marco - SIRFSOC_SPI_FIFO_FULL is not for FIFO interrupt status, it is for FIFO status. here in the ISR, SIRFSOC_SPI_TXFIFO_EMPTY is the right bit for SPI TXFIFO interrupt status. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 13 3月, 2014 1 次提交
-
-
由 Axel Lin 提交于
This is required since commit 2025172e "spi/bitbang: Use core message pump". spi-bitbang now uses core message pump, so it needs to call spi_master_suspend/ spi_master_resume to stop/start the queue while suspend/resume. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 03 3月, 2014 1 次提交
-
-
由 Qipan Li 提交于
there are many SPI clients which use the following protocal: step 1: send command bytes to clients(rx buffer is empty) step 2: send data bytes to clients or receive data bytes from clients. SiRFprimaII provides a shortcut for this kind of SPI transfer. when tx buf is less or equal than 4 bytes and rx buf is null in a transfer, we think it as 'command' data and use hardware command register for the transfer. here we can save some CPU loading than doing both tx and rx for a normal transfer. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 27 2月, 2014 1 次提交
-
-
由 Jingoo Han 提交于
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: NJingoo Han <jg1.han@samsung.com> Acked-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 24 2月, 2014 2 次提交
-
-
由 Qipan Li 提交于
use SET_SYSTEM_SLEEP_PM_OPS to initialize PM entries, this makes the codes clean and also enable the ability of hibernation support for sirf SPI. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
由 Barry Song 提交于
sirf-dma driver enabled generic dt binding for dma channels. see here we remove self-defined dma channel prop and move to use generic dma_request_slave_channel. related changes in dts is something like: dmas = <&dmac1 9>, <&dmac1 4>; dma-names = "rx", "tx"; Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 03 2月, 2014 1 次提交
-
-
由 Axel Lin 提交于
Trivial cleanup to avoid duplicate code in various bits_per_word cases. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 17 1月, 2014 1 次提交
-
-
由 Axel Lin 提交于
The implementation in spi_setup() already set spi->bits_per_word = 8 when spi->bits_per_word is 0 before calling spi->master->setup. So we don't need to do it again in setup() callback. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NMarek Vasut <marex@denx.de> Acked-by: NBarry Song <Baohua.Song@csr.com> Acked-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 15 11月, 2013 1 次提交
-
-
由 Wolfram Sang 提交于
Use this new function to make code more comprehensible, since we are reinitialzing the completion, not initializing. [akpm@linux-foundation.org: linux-next resyncs] Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> (personally at LCE13) Cc: Ingo Molnar <mingo@kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 07 10月, 2013 1 次提交
-
-
由 Axel Lin 提交于
Many drivers that use bitbang library have a leak on probe error paths. This is because once a spi_master_get() call succeeds, we need an additional spi_master_put() call to free the memory. Fix this issue by moving the code taking a reference to master to spi_bitbang_start(), so spi_bitbang_start() will take a reference to master on success. With this change, the caller is responsible for calling spi_bitbang_stop() to decrement the reference and spi_master_put() as counterpart of spi_alloc_master() to prevent a memory leak. So now we have below patten for drivers using bitbang library: probe: spi_alloc_master -> Init reference count to 1 spi_bitbang_start -> Increment reference count remove: spi_bitbang_stop -> Decrement reference count spi_master_put -> Decrement reference count (reference count reaches 0) Fixup all users accordingly. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Suggested-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> Acked-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 17 9月, 2013 1 次提交
-
-
由 Axel Lin 提交于
Many drivers that use bitbang library have a leak on probe error paths. This is because once a spi_master_get() call succeeds, we need an additional spi_master_put() call to free the memory. Fix this issue by moving the code taking a reference to master to spi_bitbang_start(), so spi_bitbang_start() will take a reference to master on success. With this change, the caller is responsible for calling spi_bitbang_stop() to decrement the reference and spi_master_put() as counterpart of spi_alloc_master() to prevent a memory leak. So now we have below patten for drivers using bitbang library: probe: spi_alloc_master -> Init reference count to 1 spi_bitbang_start -> Increment reference count remove: spi_bitbang_stop -> Decrement reference count spi_master_put -> Decrement reference count (reference count reaches 0) Fixup all users accordingly. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Suggested-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> Acked-by: NUwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 29 8月, 2013 1 次提交
-
-
由 Axel Lin 提交于
Use dev_get_drvdata() instead of platform_get_drvdata(to_platform_device(dev)). Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 26 8月, 2013 1 次提交
-
-
由 Qipan Li 提交于
the unit of len of spi_transfer is in bytes, not in spi words. the old codes misunderstood that and thought the len is the amount of spi words. but it is actually how many bytes existing in the spi buffer. this patch fixes that and also rename left_tx_cnt and left_rx_cnt to left_tx_word and left_rx_word to highlight they are in words. Signed-off-by: NQipan Li <Qipan.Li@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 23 8月, 2013 1 次提交
-
-
由 Wei Yongjun 提交于
Fix to return a negative error code from the error handling case instead of 0, as done elsewhere in this function. Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 15 8月, 2013 1 次提交
-
-
由 Julia Lawall 提交于
Remove unneeded error handling on the result of a call to platform_get_resource when the value is passed to devm_ioremap_resource. Move the call to platform_get_resource adjacent to the call to devm_ioremap_resource to make the connection between them more clear. A simplified version of the semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression pdev,res,n,e,e1; expression ret != 0; identifier l; @@ - res = platform_get_resource(pdev, IORESOURCE_MEM, n); ... when != res - if (res == NULL) { ... \(goto l;\|return ret;\) } ... when != res + res = platform_get_resource(pdev, IORESOURCE_MEM, n); e = devm_ioremap_resource(e1, res); // </smpl> Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr> Acked-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-
- 06 8月, 2013 1 次提交
-
-
由 Barry Song 提交于
this patch enables DMA support for SiRFSoC SPI driver, if both buffers and length are aligned with DMA controller's hardware limitation, use generic SiRF generic dmaengine driver. for PIO, SiRF SPI controller actually is using rx to trigger rx, that means if we write any word to tx fifo, we will get a word from rx fifo. for DMA, we use two different channel for tx and rx, and issue them both for every transfer. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NMark Brown <broonie@linaro.org>
-