Everything required to populate NVIDIA Tegra devices from the device
tree.  This patch adds a new DT_MACHINE_DESC() which matches against
a tegra20 device tree.  So far it only registers the on-chip devices,
but it will be refined in follow on patches to configure clocks and
pin IO from the device tree also.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

For testing the dt work, define a dt-enabled versatile platform.

This patch adds a new versatile platform for when using the device
tree.  Add platform and amba devices are discovered and registered by
parsing the device tree.  Clocks and initial io mappings are still
configured statically.

This patch still depends on some static platform_data for a few devices
which is passed via the auxdata structure to of_platform_populate(),
but it is a viable starting point until the drivers can get all
configuration data out of the device tree.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This patch adds irq_domain infrastructure for translating from
hardware irq numbers to linux irqs.  This is particularly important
for architectures adding device tree support because the current
implementation (excluding PowerPC and SPARC) cannot handle
translation for more than a single interrupt controller.  irq_domain
supports device tree translation for any number of interrupt
controllers.

This patch converts x86, Microblaze, ARM and MIPS to use irq_domain
for device tree irq translation.  x86 is untested beyond compiling it,
irq_domain is enabled for MIPS and Microblaze, but the old behaviour is
preserved until the core code is modified to actually register an
irq_domain yet.  On ARM it works and is required for much of the new
ARM device tree board support.

PowerPC has /not/ been converted to use this new infrastructure.  It
is still missing some features before it can replace the virq
infrastructure already in powerpc (see documentation on
irq_domain_map/unmap for details).  Followup patches will add the
missing pieces and migrate PowerPC to use irq_domain.

SPARC has its own method of managing interrupts from the device tree
and is unaffected by this change.
Acked-by: NRalf Baechle <ralf@linux-mips.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Add a make rule to compile dt blobs for ARM.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NShawn Guo <shawn.guo@freescale.com>
Tested-by: NJason Liu <jason.hui@linaro.org>
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

Contains the bare minimum template required to boot with the device tree.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This patch adds a DT_MACHINE_START macro to use instead of
MACHINE_START when creating a machine_desc that supports using the
device tree.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

This patch removes all the module loader hook implementations in the
architecture specific code where the functionality is the same as that
now provided by the recently added default hooks.
Signed-off-by: NJonas Bonn <jonas@southpole.se>
Acked-by: NMike Frysinger <vapier@gentoo.org>
Acked-by: NGeert Uytterhoeven <geert@linux-m68k.org>
Tested-by: NMichal Simek <monstr@monstr.eu>
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>

Building kernel 3.0 for an n2100 (plat-iop) results in:

In file included from arch/arm/plat-iop/cp6.c:20:
/tmp/linux-3.0/arch/arm/include/asm/traps.h:12: warning: 'struct pt_regs' declared inside parameter list
/tmp/linux-3.0/arch/arm/include/asm/traps.h:12: warning: its scope is only this definition or declaration, which is probably not what you want
/tmp/linux-3.0/arch/arm/include/asm/traps.h:48: warning: 'struct pt_regs' declared inside parameter list
/tmp/linux-3.0/arch/arm/include/asm/traps.h:48: warning: 'struct task_struct' declared inside parameter list
arch/arm/plat-iop/cp6.c:45: warning: initialization from incompatible pointer type

Nothing here depends on the layout of pt_regs or task_struct, so this
can be fixed by adding forward struct declarations to asm/traps.h.
Signed-off-by: NMikael Pettersson <mikpe@it.uu.se>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Improve scalability by avoiding costly and unnecessary L2 cache sync
in handling bitops.
Signed-off-by: NHeechul Yun <hyun@nvidia.com>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

I've got hands on one ts-7300 board, which is equiped with 128MB RAM in two
64MB memory chips, so it's 16 banks/8MB each. Without this patch, the bootmem
init code complains about small NR_BANKS number and only lower 64MB is
accessible.

Cc: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: NPetr Štetiar <ynezz@true.cz>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Commit 66a625a8 (ARM: mm: proc-macros: Add generic proc/cache/tlb struct
definition macros) introduced build errors when PM_SLEEP is not enabled.
The per-CPU do_suspend/do_resume functions are defined via the
preprocessor to constant 0.  However, the macros which use these were
converted to assembly, resulting in undefined references to these
functions.  Fix that by moving the ! ifdef section into proc-macros.S
and deleting it from all effected proc-*.S files.
Acked-by: NDave Martin <dave.martin@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Our selection of interrupts to consider for IRQ migration is sub-
standard.  We were potentially including per-CPU interrupts in our
migration strategy, but omitting chained interrupts.  This caused
some interrupts to remain on a downed CPU.

We were also trying to migrate interrupts which were not migratable,
resulting in an OOPS.

Instead, iterate over all interrupts, skipping per-CPU interrupts
or interrupts whose affinity does not include the downed CPU, and
attempt to set the affinity for every one else if their chip
implements irq_set_affinity().
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Now that the GIC takes care of selecting a target interrupt from the
affinity mask, we don't need all this complexity in the core code
anymore.  Just detect when we need to break affinity.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

The irq_set_affinity() method can be called with masks which include
offline CPUs.  This allows offline CPUs to have interrupts routed to
them by writing to /proc/irq/*/smp_affinity after hotplug has taken
a CPU offline.  Fix this by ensuring that we select a target CPU
present in both the required affinity and the online CPU mask.

Ensure that we return IRQ_SET_MASK_OK (which happens to be 0) on
success to ensure generic code copies the new mask into the irq_data
structure.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

irqdesc's node member is supposed to mark the numa node number for the
interrupt.  Our use of it is non-standard.  Remove this, replacing the
functionality with a test of the affinity mask.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

its first argument is const char * and it's really not modified...
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

1. support brownstone
2. support mmc
3. support basic filesystem and language
4. remove dynamic_debug, since too many log during access sd
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: NPhilip Rakity <prakity@marvell.com>
Acked-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

As suggested by Arnd, move platform data to include/linux/platform_data
in order to improve build coverage for the driver.
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NChris Ball <cjb@laptop.org>

Update MMP2 platform code to "sdhci-pxav3", following the driver rename.
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: NPhilip Rakity <prakity@marvell.com>
Acked-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

sdhci-pltfm driver for PXAV3 SoCs, such as MMP2.
Signed-off-by: NZhangfei Gao <zhangfei.gao@marvell.com>
Signed-off-by: NPhilip Rakity <prakity@marvell.com>
Acked-by: NPhilip Rakity <prakity@marvell.com>
Acked-by: NMark F. Brown <mark.brown314@gmail.com>
Signed-off-by: NChris Ball <cjb@laptop.org>

Currently using just long but this is not enough for the LPAE format
(64-bit entries).
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Currently, the documented kernel entry requirements are not
explicit about whether the kernel should be entered in ARM or
Thumb, leading to an ambiguitity about how to enter Thumb-2
kernels.  As a result, the kernel is reliant on the zImage
decompressor to enter the kernel proper in the correct instruction
set state.

This patch changes the boot entry protocol for head.S and Image to
be the same as for zImage: in all cases, the kernel is now entered
in ARM.

Documentation/arm/Booting is updated to reflect this new policy.

A different rule will be needed for Cortex-M class CPUs as and when
support for those lands in mainline, since these CPUs don't support
the ARM instruction set at all: a note is added to the effect that
the kernel must be entered in Thumb on such systems.
Signed-off-by: NDave Martin <dave.martin@linaro.org>
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Kernel space needs very little in the way of BTC maintanence as most
mappings which are created and destroyed are non-executable, and so
could never enter the instruction stream.

The case which does warrant BTC maintanence is when a module is loaded.
This creates a new executable mapping, but at that point the pages have
not been initialized with code and data, so at that point they contain
unpredictable information.  Invalidating the BTC at this stage serves
little useful purpose.

Before we execute module code, we call flush_icache_range(), which deals
with the BTC maintanence requirements.  This ensures that we have a BTC
maintanence operation before we execute code via the newly created
mapping.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Video input mux settings for tvp7002 and imager inputs were swapped.
Comment was correct.

Tested on EVM with tvp7002 input.
Signed-off-by: NJon Povey <jon.povey@racelogic.co.uk>
Acked-by: NManjunath Hadli <manjunath.hadli@ti.com>
Cc: stable@kernel.org
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

Avoid NULL dereference of irq_alloc_generic_chip return in low
memory conditions.
Signed-off-by: NTodd Poynor <toddpoynor@google.com>
Signed-off-by: NSekhar Nori <nsekhar@ti.com>

One less dependency on mach/memory.h.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Having this value defined at compile time prevents multiple machines with
conflicting definitions to coexist.  Move it to a variable in preparation
for having a per machine value selected at run time.  This is relevant
only when CONFIG_ZONE_DMA is selected.
Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org>

Function declaration differs between file: dma.c and file:dma.h
and SPARSE (Documentation/sparse.txt) gives error messages

All dma channels are members of 'enum dma_ch' and not 'unsigned int'
Please have a look at channel definitions in:
arch/arm/mach-s3c64xx/include/mach/dma.h
arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
arch/arm/mach-s3c2410/include/mach/dma.h
So all arguments should be of type 'enum dma_ch'
Signed-off-by: NSangwook Lee <sangwook.lee@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Signed-off-by: NTodd Poynor <toddpoynor@google.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Commit 234b6ced

   clocksource: convert ARM 32-bit up counting clocksources

broke the build for ixp4xx and made big endian operation impossible.
This commit restores the original behaviour.
Signed-off-by: NRichard Cochran <richard.cochran@omicron.at>
Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>
[ Thomas says that we might want to have generic BE accessor functions
  to the MMIO clock source, but that hasn't happened yet, so in the
  meantime this seems to be the short-term fix for the particular
  problem - Linus ]
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>