- 30 8月, 2022 40 次提交
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由 Yang Wang 提交于
add smu_v13_0_10 driver if version Signed-off-by: NYang Wang <KevinYang.Wang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Yang Wang 提交于
add smu_v13_0_10 support. Signed-off-by: NYang Wang <KevinYang.Wang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Frank Min 提交于
Add ip block support for psp v13_0_10. Signed-off-by: NFrank Min <Frank.Min@amd.com> Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 John Clements 提交于
added missing firmware module Signed-off-by: NJohn Clements <john.clements@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Frank Min 提交于
Add psp v13_0_10 ip block, initialize firmware and psp functions Signed-off-by: NFrank Min <Frank.Min@amd.com> Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
Add ip block support for soc21_common. Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NFrank Min <Frank.Min@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Sonny Jiang 提交于
This enable VCN PG, CG, DPG and JPEG PG, CG Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Reviewed-by: NJohn Clements <john.clements@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
init cp/pg_flags and extenal_rev_id Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NFrank Min <Frank.Min@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Hawking Zhang 提交于
driver doesn't need to program any gc 11_0_0 golden Signed-off-by: NHawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: NLikun Gao <Likun.Gao@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jinpeng Cui 提交于
Return value from kfd_wait_on_events() and io_remap_pfn_range() directly instead of taking this in another redundant variable. Reported-by: NZeal Robot <zealci@zte.com.cn> Signed-off-by: NJinpeng Cui <cui.jinpeng2@zte.com.cn> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jinpeng Cui 提交于
Return value from expression directly instead of taking this in another redundant variable. Reported-by: NZeal Robot <zealci@zte.com.cn> Signed-off-by: NJinpeng Cui <cui.jinpeng2@zte.com.cn> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Martin Tsai 提交于
[Why] Incorrect cursor position will induce system hang on pipe split. [How] 1.Handle horizontal mirror on rotation, 2.Correct cursor set on piep split. Reviewed-by: NAriel Bernstein <Eric.Bernstein@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NMartin Tsai <martin.tsai@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Vladimir Stempen 提交于
[Why] On secondary display hotplug we switch primary stream from ODM2to1 to ODMBypass mode. Current logic will trigger disabling front end for this stream. [How] We need to check if prev_odm_pipe is equal to NULL in order to disable dangling planes in this scenario. Reviewed-by: NAriel Bernstein <Eric.Bernstein@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NVladimir Stempen <vladimir.stempen@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ethan Wellenreiter 提交于
[WHY] Function wasn't returning false when it had a no stream [HOW] Made it return false when it had no stream. Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NEthan Wellenreiter <Ethan.Wellenreiter@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ethan Wellenreiter 提交于
[Why] Pipes get merged in preparation for SubVP but if they don't get used, and are in ODM or some other multi pipe config, it would calculate the voltage level with a viewport of just one pipe from when they were split resulting in too low of a voltage level. [How] Made it so that the viewport and other timing settings get rebuilt and re- initialized after the pipe merge, before calculating the voltage level so it would calculate it correctly. Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Reviewed-by: NJun Lei <Jun.Lei@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NEthan Wellenreiter <Ethan.Wellenreiter@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aurabindo Pillai 提交于
[Why&How] plane and stream variables used for cursor size allocation calculation were stale from previous iteration. Redo the iteration to find the correct cursor plane for the calculation. Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Sierra 提交于
[Why] Devices with CPU XGMI iolink do not support PCIe peer access. Signed-off-by: NAlex Sierra <alex.sierra@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NFelix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aric Cyr 提交于
Reviewed-by: NAric Cyr <aric.cyr@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAric Cyr <aric.cyr@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
To suppress the warning about version mismatch with the latest 78.54.0 PMFW. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
For those SMU13.0.7 unsecure SKUs, the vbios carried pptable is ready to go. Use that one instead of hardcoded softpptable. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Evan Quan 提交于
For some SMU13.0.0 SKUs, the vbios carried pptable is ready to go. Use that one instead of hardcoded softpptable. Signed-off-by: NEvan Quan <evan.quan@amd.com> Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Leo (Hanghong) Ma 提交于
[Why && How] We would like to have visual confirm color support for SubVP. 1. Set visual confirm color to red: SubVP is enable on this display; 2. Set visual confirm color to green: SubVP is enable on other display and DRR is on this display; 3. Set visual confirm color to blue: SubVP is enable on other display and DRR is off on this display; Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NLeo (Hanghong) Ma <hanghong.ma@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Anthony Koo 提交于
- Fix comment to indicate correct visual confirm option Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAnthony Koo <Anthony.Koo@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ian Chen 提交于
Reviewed-by: NDennis Chan <dennis.chan@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NIan Chen <ian.chen@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aurabindo Pillai 提交于
[Why & How] This reverts commit e6cf22ef since it causes a SubVP related regression: "Switching between windowed video and fullscreen can intermittently cause black screen" Fixes: e6cf22ef ("drm/amd/display: program k1/k2 divider for virtual signal for DCN32") Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Iswara Nagulendran 提交于
[HOW&WHY] EDP link detection must be updated to support a primary EDP with a link index of greater than 0. * SWDEV-342936 - dc: DSC bringup for SAG 1.5 [WHY] SmartAccess Graphics 1.5 (a.k.a SmartMux 1.5) requires seamless switching between GPUs with DSC enabled. [HOW] Moved DSC programming to apply_single_control_ctx_to_hw before the stream enablement logic to ensure the CRC checker provides valid values for non-black frames allowing the system to come out of forced PSR on d2i. Added additional logic to both generate a black frame through setVisibility calls and keep track of the CRCs values for this black frame when coming out of forced PSR. Updating logic for DalRegKey_DisableDSC to disable DSC on EDP and all ports for systems. [CLEANED] dc: Moved DSC programming to before stream enablement [HOW&WHY] Moved DSC programming to apply_single_control_ctx_to_hw before the stream enablement logic. Co-authored-by: Nsregolui <sregolui@amd.com> Reviewed-by: NJayendran Ramani <Jayendran.Ramani@amd.com> Reviewed-by: NHarry Vanzylldejong <Harry.Vanzylldejong@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: Nsregolui <sregolui@amd.com> Signed-off-by: NIswara Nagulendran <Iswara.Nagulendran@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Charlene Liu 提交于
[why] fw version check was for release branch. for staging, it has a chance to enter wrong code path. Reviewed-by: NHansen Dsouza <hansen.dsouza@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NCharlene Liu <Charlene.Liu@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aurabindo Pillai 提交于
[Why&How] When calculating allocation for cursor size, get the real cursor through the HUBP instead of using the maximum cursor size for more optimal allocation Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aurabindo Pillai 提交于
[Why&How] When using a 4k monitor when cursor caching is not supported due to framebuffer being on an uncacheable address, enabling display refresh from MALL would trigger corruption if SS is enabled. Prevent entering SS if we are on the edge case and cursor caching is not possible. Do this only if cursor size larger than a 64x64@4bpp. Pull the cursor size calculation out of if condition since cursor address may not be set on all platforms Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Aurabindo Pillai 提交于
For calculating cursor size allocation, surface size was used, resulting in over allocation Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Leo Chen 提交于
[Why & How] Number of encoder is set to 4 but only 3 instances are created. Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NLeo Chen <sancchen@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ian Chen 提交于
Refactor edp dsc codes. We split out edp dsc config from "global" to "per-panel" config settings. Reviewed-by: NMike Hsieh <mike.hsieh@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NIan Chen <ian.chen@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alvin Lee 提交于
[Description] For SubVP scaling case we have to combine the plane scaling and stream scaling. Use UCLK dummy p-state WM for FCLK WM set C [Description] For DCN32/321 program dummy UCLK P-state watermark into FCLK watermark set C register. Reviewed-by: NJun Lei <Jun.Lei@amd.com> Reviewed-by: NNevenko Stupar <Nevenko.Stupar@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Leo (Hanghong) Ma 提交于
[Why] We want to get the visual confirm color of the bottom-most pipe for test automation. [How] Save the visual confirm color to plane_state before program to MPC; Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Reviewed-by: NAric Cyr <Aric.Cyr@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NLeo (Hanghong) Ma <hanghong.ma@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Taimur Hassan 提交于
[Why & How] In some cases, there are calls to transition from TX_ON to TX_ON, such as when using MST or during resolution change. This is expected, so allow HW programming to continue. Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NTaimur Hassan <Syed.Hassan@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Gabe Teeger 提交于
[Why] enable_sw_cntl_psr flag is not needed. For PSR1 and PSR2, we should be passing dirty rectangle and cursor updates to FW regardless of enable_sw_cntl_psr flag. [How] Remove enable_sw_cntl_psr flag from driver. Send cursor info and dirty rectagle status to dmub only in the case of dcn31 and above. Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com> Reviewed-by: NRobin Chen <robin.chen@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NGabe Teeger <gabe.teeger@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Gabe Teeger 提交于
[Why] On edp with psr1, we do not provide updates of the cursor position regularly to firmware like with PSR2. To send updates regularly, the flag enable_sw_cntl_psr has to equal 1, but cursor update should be provided regularly to FW regardless of that flag. [How] Ensure that we always send cursor updates to firmware when PSR version equals 1. Reviewed-by: NRobin Chen <robin.chen@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NGabe Teeger <gabe.teeger@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Michael Strauss 提交于
[WHY] Useful for external teams debugging LTTPR issues Reviewed-by: NGeorge Shen <George.Shen@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NMichael Strauss <michael.strauss@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Leo Chen 提交于
[Why & How] Add a override flag as wa for some specific dongle Co-authored-by: NLeo Chen <sancchen@amd.com> Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NLeo Chen <SanChuan.Chen@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alvin Lee 提交于
[Description] We only want to commit the SubVP config to DMCUB after the main and phantom pipe programming has completed. Commiting the state early can cause issues such as P-State being allowed by the HW early which causes the SubVP state machine to go into a bad state Reviewed-by: NJun Lei <Jun.Lei@amd.com> Acked-by: NBrian Chang <Brian.Chang@amd.com> Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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