- 03 5月, 2011 1 次提交
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由 B.J. Buchalter 提交于
Current implementation of ohci_set_config_rom() uses a deferred bus reset via fw_schedule_bus_reset(). If clients add multiple unit descriptors to the config_rom in quick succession, the deferred bus reset may not have fired before succeeding update requests have come in. This can lead to an incorrect partial update of the config_rom for both addition and removal of config_rom descriptors, as the ohci_set_config_rom() routine will return -EBUSY if a previous pending update has not been completed yet; the requested update just gets dropped on the floor. This patch recognizes that the "in-flight" update can be modified until it has been processed by the bus-reset, and the locking in the bus_reset_tasklet ensures that the update is done atomically with respect to modifications made by ohci_set_config_rom(). The -EBUSY error case is simply removed. [Stefan R: The bug always existed at least theoretically. But it became easy to trigger since 2.6.36 commit 02d37bed "firewire: core: integrate software-forced bus resets with bus management" which introduced long mandatory delays between janitorial bus resets.] Signed-off-by: NBenjamin Buchalter <bj@mhlabs.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> (trivial style changes) Cc: <stable@kernel.org> # 2.6.36.y and newer
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- 15 3月, 2011 2 次提交
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由 Oleg Drokin 提交于
It seems drivers/firewire/ohci.c is making some optimistic assumptions about struct fw_ohci and that member "card" will always remain the first member of the struct. Plus it's probably going to confuse a lot of static code analyzers too. So I wonder if there is a good reason not to free the ohci struct just like it was allocated instead of the tricky &ohci->card way? Signed-off-by: NOleg Drokin <green@linuxhacker.ru> It is perhaps just a rudiment from before mainline submission of the driver. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Stefan Richter 提交于
Since commit 82b662dc "flush AT contexts after bus reset for OHCI 1.2", the driver takes care of any AT packets that were enqueued during a bus reset phase. The check from commit 76f73ca1 is therefore no longer necessary and the MMIO read can be avoided. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 26 2月, 2011 2 次提交
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由 Clemens Ladisch 提交于
If a misguided program tried to start an isochronous context before it has queued any packets, the call would appear to succeed, but the context would not actually go into the running state, and the OHCI controller would then raise an unrecoverableError interrupt because the first Z value is zero and thus invalid. The driver logs such errors, but there is no mechanism to report this back to the program. Add an explicit check so that this error can be returned synchronously. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
To prevent the iso packet callback from being called after fw_iso_context_stop() has returned, make sure that the context's tasklet has finished executing before that. This fixes access-after-free bugs that have so far been observed only in the upcoming snd-firewire-speakers driver, but can theoretically also happen in the firedtv driver. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 23 1月, 2011 1 次提交
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由 Clemens Ladisch 提交于
When a DMA context goes into the dead state (and the controller thus stops working correctly), logging this error and the controller's error code might be helpful for debugging. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 13 1月, 2011 1 次提交
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由 Clemens Ladisch 提交于
PAGE_KERNEL_RO is not available on all architectures, so its use in the new AR code broke compilation on sparc64. Because the read-only mapping was just a debugging aid, just use PAGE_KERNEL instead. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> James Bottomley wrote: > On Thu, 2011-01-13 at 08:27 +0100, Clemens Ladisch wrote: >> firewire: ohci: fix compilation on arches without PAGE_KERNEL_RO, e.g. sparc >> >> PAGE_KERNEL_RO is not available on all architectures, so its use in the >> new AR code broke compilation on sparc64. >> >> Because the R/O mapping is only used to catch drivers that try to write >> to the reception buffer and not actually required for correct operation, >> we can just use a normal PAGE_KERNEL mapping where _RO is not available. [...] >> +/* >> + * For archs where PAGE_KERNEL_RO is not supported; >> + * mapping the AR buffers readonly for the CPU is just a debugging aid. >> + */ >> +#ifndef PAGE_KERNEL_RO >> +#define PAGE_KERNEL_RO PAGE_KERNEL >> +#endif > > This might cause interesting issues on sparc64 if it ever acquired a > PAGE_KERNEL_RO. Sparc64 has extern pgprot_t for it's PAGE_KERNEL types > rather than #defines, so the #ifdef check wouldn't see this. > > I think either PAGE_PROT_RO becomes part of our arch API (so all > architectures are forced to add it), or, if it's not part of the API, > ohci isn't entitled to use it. The latter seems simplest since you have > no real use for write protection anyway. Reported-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 04 1月, 2011 4 次提交
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由 Stefan Richter 提交于
"firewire: ohci: restart iso DMA contexts on resume from low power mode" added the flag struct context.active and "firewire: ohci: cache the context run bit" added struct context.running. These flags contain the same information; combine them. Also, normalize whitespace in pci_resume(). Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
The DMA context run control bit is entirely controlled by software, so it is safe to cache it. This allows the driver to avoid doing an additional MMIO read when queueing an AT packet. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Stefan Richter 提交于
Add comments - on why bus_reset_tasklet flushes AT queues, - that commit 76f73ca1 can possibly be reverted now. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de> Acked-by: NJarod Wilson <jarod@redhat.com>
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由 Clemens Ladisch 提交于
The OHCI 1.2 (draft) specification, clause 7.2.3.3, allows and recommends that, after a bus reset, the controller does not flush all the packets in the AT queues. Therefore, the driver has to do this itself. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 14 12月, 2010 9 次提交
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由 Maxim Levitsky 提交于
Restore iso channels DMA so that iso channels could continue to work after resume from RAM/disk. Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Maxim Levitsky 提交于
Some lousy BIOSes, e.g. my Aspire 5720 BIOS forget to restore the GUID register on resume from RAM. Fix that by setting it to the last value that was read from it. Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
The buffers used for the selfIDs packets and the AR request and response descriptors end up using three pages because dma_alloc_coherent() allocates at least one page per call. However, these data structures would all fit into 4 KB, so we can save space by using a common buffer for them. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
When the isochRx/isochTx bit is clear, we do not need to read the corresponding iso interrupt event register. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
Change the header of PHY packets to be sent to include a pseudo transaction code. This makes the header consistent with that of received PHY packets, and allows at_context_queue_packet() and log_ar_at_event() to see the packet type directly instead of having to deduce it from the header length or even from the header contents. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
To remove the error information from the controller's queue and to allow more posted writes, the driver has to read the failed posted write address before clearing the postedWriteErr interrupt bit. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> (Stefan R:) The spec is somewhat fuzzy about the actual requirements. To err on the safe side, let's do these two read accesses. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
Make sure that interrupt event clear bit writes are executed before the interrupt handler returns. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
Add proper error handling for the context_init() calls. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
Move the AR DMA descriptors out of the buffer pages, and map the buffer pages linearly into the kernel's address space. This allows the driver to ignore any page boundaries in the DMA data and thus to avoid any copying around of packet payloads. This fixes the bug where S800 packets that are so big (> 4080 bytes) that they can be split over three pages were not handled correctly. Due to the changed algorithm, we can now use arbitrarily many buffer pages, which improves performance because the controller can more easily unload its DMA FIFO. Furthermore, using streaming DMA mappings should improve perfomance on architectures where coherent DMA mappings are not cacheable. Even on other architectures, the caching behaviour should be improved slightly because the CPU no longer writes to the buffer pages. v2: Detect the last filled buffer page by searching the descriptor's residual count value fields in order (like in the old code), instead of going backwards through the transfer status fields; it looks as if some controllers do not set the latter correctly. v3: Fix an old resume bug that would now make the handler run into a BUG_ON, and replace that check with more useful error handling. Increase the buffer size for better performance with non-TI chips. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Maxim Levitsky writes: Works almost perfectly. I can still see RCODE_BUSY errors sometimes, not very often though. 64K here eliminates these errors completely. This is most likely due to nouveau drivers and lowest perf level I use to lower card temperature. That increases latencies too much I think. Besides that the IO is just perfect. Tested-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 12 12月, 2010 2 次提交
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由 Stefan Richter 提交于
Agere FW643 rev 06, listed as "11c1:5901 (rev 06) (prog-if 10 [OHCI])", produced SBP-2 I/O errors since kernel 2.6.36. Disabling MSI fixes it. Since MSI work on Agere FW643-E (same vendor and device ID, but rev 07), introduce a device revision field into firewire-ohci's quirks list so that different quirks can be defined for older and newer revisions. Reported-by: NJonathan Isom <jeisom@gmail.com> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de> Cc: <stable@kernel.org> # 2.6.36.y
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由 Stefan Richter 提交于
"VIA Technologies, Inc. VT6315 Series Firewire Controller [1106:3403]" does not generate any interrupts if Message Signaled Interrupts were enabled. This is a regression since kernel 2.6.36 in which MSI support was added to firewire-ohci. Hence blacklist MSI on all VIA controllers. Reported-by: NRobin Cook <rcook@wyrms.net> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de> Cc: <stable@kernel.org> # 2.6.36.y
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- 31 10月, 2010 4 次提交
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由 Clemens Ladisch 提交于
If the controller is storing a split packet and therefore changing d->res_count to zero between the two reads by the driver, we end up with an end pointer that is not at a packet boundary, and therefore overflow the buffer when handling the split packet. To fix this, read the field once, atomically. The compiler usually merges the two reads anyway, but for correctness, we have to enforce it. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Tested-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
Freeing an AR buffer page just to allocate a new page immediately afterwards is not only a pointless effort but also dangerous because the allocation can fail, which would result in an oops later. Split ar_context_add_page() into two functions so that we can reuse the old page directly. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Tested-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
When handling an AR buffer that has been completely filled, we assumed that its descriptor will not be read by the controller and can be overwritten. However, when the last received packet happens to end at the end of the buffer, the controller might not yet have moved on to the next buffer and might read the branch address later. If we overwrite and free the page before that, the DMA context will either go dead because of an invalid Z value, or go off into some random memory. To fix this, ensure that the descriptor does not get overwritten by using only the actual buffer instead of the entire page for reassembling the split packet. Furthermore, to avoid freeing the page too early, move on to the next buffer only when some data in it guarantees that the controller has moved on. This should eliminate the remaining firewire-net problems. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Cc: 2.6.22-2.6.36 <stable@kernel.org> Tested-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Clemens Ladisch 提交于
When the controller had to split a received asynchronous packet into two buffers, the driver tries to reassemble it by copying both parts into the first page. However, if size + rest > PAGE_SIZE, i.e., if the yet unhandled packets before the split packet, the split packet itself, and any received packets after the split packet are together larger than one page, then the memory after the first page would get overwritten. To fix this, do not try to copy the data of all unhandled packets at once, but copy the possibly needed data every time when handling a packet. This gets rid of most of the infamous crashes and data corruptions when using firewire-net. Signed-off-by: NClemens Ladisch <clemens@ladisch.de> Cc: 2.6.22-2.6.36 <stable@kernel.org> Tested-by: NMaxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de> (cast PAGE_SIZE to size_t)
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- 17 10月, 2010 1 次提交
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由 Stefan Richter 提交于
Revert commit 54672386 "firewire: ohci: fix up configuration of TI chips". It caused massive slow-down and data corruption with a TSB82AA2 based StarTech EC1394B2 ExpressCard and FireWire 800 harddisks. https://bugs.launchpad.net/ubuntu/+source/linux/+bug/657081 http://thread.gmane.org/gmane.linux.kernel.firewire.user/4013 The fact that some card EEPROMs do not program these enhancements may be related to TSB81BA3 phy chip errata, if not to bugs of TSB82AA2 itself. We could re-add these configuration steps, but only conditional on a whitelist of cards on which these enhancements bring a proven positive effect. Reported-and-tested-by: NEric Shattow <lucent@gmail.com> Cc: Clemens Ladisch <clemens@ladisch.de> Cc: <stable@kernel.org> 2.6.35 Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 09 9月, 2010 1 次提交
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由 Heikki Lindholm 提交于
The Ricoh FireWire controllers appear to have the non-atomic cycle timer register access bug, so, activate the driver workaround by default. The behaviour was observed on: Ricoh Co Ltd R5C552 IEEE 1394 Controller [1180:0552] and Ricoh Co Ltd R5C832 IEEE 1394 Controller [1180:0832] (rev 04). Signed-off-by: NHeikki Lindholm <holin@iki.fi> Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 29 8月, 2010 1 次提交
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由 Stefan Richter 提交于
VIA VT6306, VIA VT6308, and NEC OrangeLink controllers do not write packet event codes for received PHY packets (or perhaps write evt_no_status, hard to tell). Work around it by overwriting the packet's ACK by ack_complete, so that upper layers that listen to PHY packet reception get to see these packets. (Also tested: TI TSB82AA2, TI TSB43AB22/A, TI XIO2213A, Agere FW643, JMicron JMB381 --- these do not exhibit this bug.) Clemens proposed a quirks flag for that, IOW whitelist known misbehaving controllers for this workaround. Though to me it seems harmless enough to enable for all controllers. The log_ar_at_event() debug log will continue to show the original status from the DMA unit. Reported-by: Clemens Ladisch <clemens@ladisch.de> (VT6308) Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 30 7月, 2010 3 次提交
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由 Stefan Richter 提交于
This adds the DMA context programming and userspace ABI for multichannel reception, i.e. for listening on multiple channel numbers by means of a single DMA context. The use case is reception of more streams than there are IR DMA units offered by the link layer. This is already implemented by the older ohci1394 + ieee1394 + raw1394 stack. And as discussed recently on linux1394-devel, this feature is occasionally used in practice. The big drawbacks of this mode are that buffer layout and interrupt generation necessarily differ from single-channel reception: Headers and trailers are not stripped from packets, packets are not aligned with buffer chunks, interrupts are per buffer chunk, not per packet. These drawbacks also cause a rather hefty code footprint to support this rarely used OHCI-1394 feature. (367 lines added, among them 94 lines of added userspace ABI documentation.) This implementation enforces that a multichannel reception context may only listen to channels to which no single-channel context on the same link layer is presently listening to. OHCI-1394 would allow to overlay single-channel contexts by the multi-channel context, but this would be a departure from the present first-come-first-served policy of IR context creation. The implementation is heavily based on an earlier one by Jay Fenlason. Thanks Jay. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Stefan Richter 提交于
firewire-ohci keeps book of which isochronous channels are occupied by IR DMA contexts, so that there cannot be more than one context listening to a certain channel. If IR context creation failed due to an out-of-memory condition, this bookkeeping leaked a channel. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Stefan Richter 提交于
When we append to a DMA program, we need to ensure that the order in which initialization of the new descriptors and update of the branch_address of the old tail descriptor, as seen by the PCI device, happen as intended. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 23 7月, 2010 2 次提交
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由 Stefan Richter 提交于
This extends the FW_CDEV_IOC_SEND_PHY_PACKET ioctl() for /dev/fw* to be useful for ping time measurements. One application for it would be gap count optimization in userspace that is based on ping times rather than hop count. (The latter is implemented in firewire-core itself but is not applicable to beta PHYs that act as repeater.) Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Stefan Richter 提交于
Add an FW_CDEV_IOC_RECEIVE_PHY_PACKETS ioctl() and FW_CDEV_EVENT_PHY_PACKET_RECEIVED poll()/read() event for /dev/fw*. This can be used to get information from remote PHYs by remote access PHY packets. This is also the 2nd half of the functionality (the receive part) to support a userspace implementation of a VersaPHY transaction layer. Safety considerations: - PHY packets are generally broadcasts, hence some kind of elevated privileges should be required of a process to be able to listen in on PHY packets. This implementation assumes that a process that is allowed to open the /dev/fw* of a local node does have this privilege. There was an inconclusive discussion about introducing POSIX capabilities as a means to check for user privileges for these kinds of operations. Other limitations: - PHY packet reception may be switched on by ioctl() but cannot be switched off again. It would be trivial to provide an off switch, but this is not worth the code. The client should simply close() the fd then, or just ignore further events. - For sake of simplicity of API and kernel-side implementation, no filter per packet content is provided. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 13 7月, 2010 1 次提交
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由 Stefan Richter 提交于
Bus resets which are triggered - by the kernel drivers after updates of the local nodes' config ROM, - by userspace software via ioctl shall be deferred until after >=2 seconds after the last bus reset. If multiple modifications of the local nodes' config ROM happen in a row, only a single bus reset should happen after them. When the local node's link goes from inactive to active or vice versa, and at the two occasions of bus resets mentioned above --- and if the current gap count differs from 63 --- the bus reset should be preceded by a PHY configuration packet that reaffirms the gap count. Otherwise a bus manager would have to reset the bus again right after that. This is necessary to promote bus stability, e.g. leave grace periods for allocations and reallocations of isochronous channels and bandwidth, SBP-2 reconnections etc.; see IEEE 1394 clause 8.2.1. This change implements all of the above by moving bus reset initiation into a delayed work (except for bus resets which are triggered by the bus manager workqueue job and are performed there immediately). It comes with a necessary addition to the card driver methods that allows to get the current gap count from PHY registers. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 19 6月, 2010 4 次提交
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由 Stefan Richter 提交于
Rather than "read a Control and Status Registers (CSR) Architecture register" I prefer to say "read a Control and Status Register". Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Stefan Richter 提交于
Push the maintenance of STATE_CLEAR/SET.abdicate down into the card driver. This way, the read/write_csr_reg driver method works uniformly across all CSR offsets. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Stefan Richter 提交于
by feature variables in the fw_card struct. The hook appeared to be an unnecessary abstraction in the card driver interface. Cleaner would be to pass those feature flags as arguments to fw_card_initialize() or fw_card_add(), but the FairnessControl register is in the SCLK domain and may therefore not be accessible while Link Power Status is off, i.e. before the card->driver->enable call from fw_card_add(). Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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由 Stefan Richter 提交于
Add a comment on which of the conflicting NODE_IDS specifications we implement. Reduce a comment on rather irrelevant register bits that can all be looked up in the spec (or from now on in the code history). Directly include the required indirectly included bug.h. Signed-off-by: NStefan Richter <stefanr@s5r6.in-berlin.de>
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- 10 6月, 2010 1 次提交
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由 Clemens Ladisch 提交于
On OHCI 1.1 controllers, let the hardware allocate the broadcast channel automatically. This removes a theoretical race condition directly after a bus reset where it could be possible to read the channel allocation register with channel 31 still being unallocated. Signed-off-by: NClemens Ladisch <clemens@ladisch.de>
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