1. 20 2月, 2017 1 次提交
  2. 17 2月, 2017 1 次提交
  3. 15 2月, 2017 1 次提交
  4. 10 2月, 2017 2 次提交
  5. 09 2月, 2017 6 次提交
  6. 06 2月, 2017 2 次提交
  7. 26 1月, 2017 2 次提交
    • M
      drm/i915: Add support for DP Video pattern compliance tests · 611032bf
      Manasi Navare 提交于
      The intel_dp_autotest_video_pattern() function gets invoked through the
      compliance test handler on a HPD short pulse if the test type is
      set to DP_TEST_VIDEO_PATTERN. This performs the DPCD registers
      reads to read the requested test pattern, video pattern resolution,
      frame rate and bits per color value. The results of this analysis
      are handed off to userspace so that the userspace app can set the
      video pattern mode appropriately for the test result/response.
      When the  test is requested with specific BPC value, we read the BPC
      value from the DPCD register. If this BPC value in intel_dp structure
      has a non-zero value and we're on a display port connector, then we use
      the value to calculate the bpp for the pipe. Also in this case if its
      a 18bpp video pattern request, then we force the dithering on pipe to be
      disabled since it causes CRC mismatches.
      
      The compliance_test_active flag is set at the end of the individual
      test handling functions. This is so that the kernel-side operations
      can be completed without the risk of interruption from the userspace
      app that is polling on that flag.
      
      v5:
      * Remove test_result variable
      * Populate the compliance test data at the end of the function (Jani Nikula)
      v4:
      *Return TEST_NAK on read failures and invalid values (Jani Nikula)
      * Address CRC mismatch errors
      v3:
      * Use the updated properly shifted bit definitions (Jani Nikula)
      * Force dithering to be disabled on 18bpp compliance
      test request (Manasi Navare)
      v2:
      * Updated the DPCD Register reads based on proper defines in header (Jani Nikula)
      * Squahsed the patch that forced the pipe bpp to compliance test bpp (Jani Nikula)
      Signed-off-by: NManasi Navare <manasi.d.navare@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1485274909-17470-1-git-send-email-manasi.d.navare@intel.com
      611032bf
    • M
      drm/i915: Add support for DP link training compliance · da15f7cb
      Manasi Navare 提交于
      This patch adds support to handle automated DP compliance
      link training test requests. This patch has been tested with
      Unigraf DPR-120 DP Compliance device for testing Link
      Training Compliance.
      After we get a short pulse Compliance test request, test
      request values are read and hotplug uevent is sent in order
      to trigger another modeset during which the pipe is configured
      and link is retrained and enabled for link parameters requested
      by the test.
      
      v5:
      * Only modify the compliance structure after all validation
      is done (Jani Nikula)
      * Remove the variable test_result (Jani Nikula)
      v4:
      * Return TEST_NAK for read failures and invalid
      values (Jani Nikula)
      * Conver the test link BW to link rate before storing (Jani Nikula)
      v3:
      * Validate the test link rate and lane count as soon as
      the request comes (Jani Nikula)
      v2:
      * Validate the test lane count before using it in
      intel_dp_compute_config (Jani Nikula)
      Signed-off-by: NManasi Navare <manasi.d.navare@intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
      Signed-off-by: NJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1485274594-17361-1-git-send-email-manasi.d.navare@intel.com
      da15f7cb
  8. 25 1月, 2017 1 次提交
    • C
      drm/i915: Move atomic state free from out of fence release · eb955eee
      Chris Wilson 提交于
      Fences are required to support being released from under an atomic context.
      The drm_atomic_state struct may take a mutex when being released and so
      we cannot drop a reference to the drm_atomic_state from the fence release
      path directly, and so we need to defer that unreference to a worker.
      
      [  326.576697] WARNING: CPU: 2 PID: 366 at kernel/sched/core.c:7737 __might_sleep+0x5d/0x80
      [  326.576816] do not call blocking ops when !TASK_RUNNING; state=1 set at [<ffffffffc0359549>] intel_breadcrumbs_signaler+0x59/0x270 [i915]
      [  326.576818] Modules linked in: rfcomm fuse snd_hda_codec_hdmi bnep snd_hda_codec_realtek snd_hda_codec_generic snd_hda_intel snd_hda_codec snd_hwdep snd_hda_core snd_pcm snd_seq_midi snd_seq_midi_event snd_rawmidi snd_seq snd_seq_device snd_timer input_leds led_class snd punit_atom_debug btusb btrtl btbcm btintel intel_rapl bluetooth i915 drm_kms_helper syscopyarea sysfillrect iwlwifi sysimgblt soundcore fb_sys_fops mei_txe cfg80211 drm pwm_lpss_platform pwm_lpss pinctrl_cherryview fjes acpi_pad parport_pc ppdev parport autofs4
      [  326.576899] CPU: 2 PID: 366 Comm: i915/signal:0 Tainted: G     U          4.10.0-rc3-patser+ #5030
      [  326.576902] Hardware name:                  /NUC5PPYB, BIOS PYBSWCEL.86A.0031.2015.0601.1712 06/01/2015
      [  326.576905] Call Trace:
      [  326.576920]  dump_stack+0x4d/0x6d
      [  326.576926]  __warn+0xc0/0xe0
      [  326.576931]  warn_slowpath_fmt+0x5a/0x80
      [  326.577004]  ? intel_breadcrumbs_signaler+0x59/0x270 [i915]
      [  326.577075]  ? intel_breadcrumbs_signaler+0x59/0x270 [i915]
      [  326.577079]  __might_sleep+0x5d/0x80
      [  326.577087]  mutex_lock+0x1b/0x40
      [  326.577133]  drm_property_free_blob+0x1e/0x80 [drm]
      [  326.577167]  ? drm_property_destroy+0xe0/0xe0 [drm]
      [  326.577200]  drm_mode_object_unreference+0x5c/0x70 [drm]
      [  326.577233]  drm_property_unreference_blob+0xe/0x10 [drm]
      [  326.577260]  __drm_atomic_helper_crtc_destroy_state+0x14/0x40 [drm_kms_helper]
      [  326.577278]  drm_atomic_helper_crtc_destroy_state+0x10/0x20 [drm_kms_helper]
      [  326.577352]  intel_crtc_destroy_state+0x9/0x10 [i915]
      [  326.577388]  drm_atomic_state_default_clear+0xea/0x1d0 [drm]
      [  326.577462]  intel_atomic_state_clear+0xd/0x20 [i915]
      [  326.577497]  drm_atomic_state_clear+0x1a/0x30 [drm]
      [  326.577532]  __drm_atomic_state_free+0x13/0x60 [drm]
      [  326.577607]  intel_atomic_commit_ready+0x6f/0x78 [i915]
      [  326.577670]  i915_sw_fence_release+0x3a/0x50 [i915]
      [  326.577733]  dma_i915_sw_fence_wake+0x39/0x80 [i915]
      [  326.577741]  dma_fence_signal+0xda/0x120
      [  326.577812]  ? intel_breadcrumbs_signaler+0x59/0x270 [i915]
      [  326.577884]  intel_breadcrumbs_signaler+0xb1/0x270 [i915]
      [  326.577889]  kthread+0x127/0x130
      [  326.577961]  ? intel_engine_remove_wait+0x1a0/0x1a0 [i915]
      [  326.577964]  ? kthread_stop+0x120/0x120
      [  326.577970]  ret_from_fork+0x22/0x30
      
      Fixes: c004a90b ("drm/i915: Restore nonblocking awaits for modesetting")
      Reported-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170123212939.30345-1-chris@chris-wilson.co.uk
      Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      eb955eee
  9. 19 1月, 2017 1 次提交
  10. 11 1月, 2017 1 次提交
    • T
      drm/i915: Use new CRC debugfs API · 8c6b709d
      Tomeu Vizoso 提交于
      The core provides now an ABI to userspace for generation of frame CRCs,
      so implement the ->set_crc_source() callback and reuse as much code as
      possible with the previous ABI implementation.
      
      When handling the pageflip interrupt, we skip 1 or 2 frames depending on
      the HW because they contain wrong values. For the legacy ABI for
      generating frame CRCs, this was done in userspace but now that we have a
      generic ABI it's better if it's not exposed by the kernel.
      
      v2:
          - Leave the legacy implementation in place as the ABI implementation
            in the core is incompatible with it.
      v3:
          - Use the "cooked" vblank counter so we have a whole 32 bits.
          - Make sure we don't mess with the state of the legacy CRC capture
            ABI implementation.
      v4:
          - Keep use of get_vblank_counter as in the legacy code, will be
            changed in a followup commit.
      
      v5:
          - Skip first frame or two as it's known that they contain wrong
            data.
          - A few fixes suggested by Emil Velikov.
      
      v6:
          - Rework programming of the HW registers to preserve previous
            behavior.
      
      v7:
          - Address whitespace issue.
          - Added a comment on why in the implementation of the new ABI we
            skip the 1st or 2nd frames.
      
      v9:
          - Add stub for intel_crtc_set_crc_source.
      
      v12:
          - Rebased.
          - Remove stub for intel_crtc_set_crc_source and instead set the
            callback to NULL (Jani Nikula).
      
      v15:
          - Rebased.
      Signed-off-by: NTomeu Vizoso <tomeu.vizoso@collabora.com>
      Reviewed-by: NEmil Velikov <emil.velikov@collabora.com>
      Reviewed-by: NRobert Foss <robert.foss@collabora.com>
      
      irq
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170110134305.26326-2-tomeu.vizoso@collabora.com
      8c6b709d
  11. 02 1月, 2017 1 次提交
  12. 30 12月, 2016 1 次提交
  13. 20 12月, 2016 1 次提交
  14. 19 12月, 2016 1 次提交
  15. 18 12月, 2016 1 次提交
  16. 13 12月, 2016 6 次提交
  17. 08 12月, 2016 1 次提交
  18. 05 12月, 2016 1 次提交
  19. 02 12月, 2016 1 次提交
  20. 29 11月, 2016 2 次提交
  21. 25 11月, 2016 1 次提交
  22. 24 11月, 2016 3 次提交
  23. 23 11月, 2016 2 次提交