1. 27 7月, 2010 3 次提交
  2. 16 7月, 2010 5 次提交
  3. 09 7月, 2010 1 次提交
  4. 02 7月, 2010 1 次提交
  5. 01 7月, 2010 3 次提交
  6. 09 6月, 2010 3 次提交
  7. 27 5月, 2010 1 次提交
  8. 21 5月, 2010 1 次提交
  9. 17 5月, 2010 1 次提交
  10. 15 5月, 2010 5 次提交
  11. 12 5月, 2010 1 次提交
  12. 11 5月, 2010 1 次提交
  13. 08 5月, 2010 4 次提交
  14. 05 5月, 2010 1 次提交
  15. 04 5月, 2010 1 次提交
  16. 02 5月, 2010 1 次提交
  17. 27 4月, 2010 1 次提交
  18. 21 4月, 2010 1 次提交
    • R
      ARM: fix build error in arch/arm/kernel/process.c · 4260415f
      Russell King 提交于
      /tmp/ccJ3ssZW.s: Assembler messages:
      /tmp/ccJ3ssZW.s:1952: Error: can't resolve `.text' {.text section} - `.LFB1077'
      
      This is caused because:
      
      	.section .data
      	.section .text
      	.section .text
      	.previous
      
      does not return us to the .text section, but the .data section; this
      makes use of .previous dangerous if the ordering of previous sections
      is not known.
      
      Fix up the other users of .previous; .pushsection and .popsection are
      a safer pairing to use than .section and .previous.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      4260415f
  19. 14 4月, 2010 4 次提交
    • S
      ARM: 6027/1: ux500: enable l2x0 support · 8e797a7e
      Srinidhi Kasagar 提交于
      This enables the l2x0 support and ensures that the secondary
      CPU can see the page table and secondary data at this point.
      Signed-off-by: Nsrinidhi kasagar <srinidhi.kasagar@stericsson.com>
      Acked-by: NLinus Walleij <linus.walleij@stericsson.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      8e797a7e
    • R
      ARM: remove unnecessary cache flush · f76348a3
      Russell King 提交于
      This cache flush occurs when we first insert a page into the page
      tables, where a page did not exist previously.  There can be no
      cache lines associated with this virtual mapping, so this cache
      flush is redundant.
      Tested-by: NMike Rapoport <mike@compulab.co.il>
      Tested-by: Mikael Pettersson <mikpe at it.uu.se>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      f76348a3
    • M
      ARM: 6052/1: kdump: make kexec work in interrupt context · 3f2d4f56
      Mika Westerberg 提交于
      When crash happens in interrupt context there is no userspace context.
      We always use current->active_mm in those cases.
      Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      3f2d4f56
    • N
      ARM: 6007/1: fix highmem with VIPT cache and DMA · 7e5a69e8
      Nicolas Pitre 提交于
      The VIVT cache of a highmem page is always flushed before the page
      is unmapped.  This cache flush is explicit through flush_cache_kmaps()
      in flush_all_zero_pkmaps(), or through __cpuc_flush_dcache_area() in
      kunmap_atomic().  There is also an implicit flush of those highmem pages
      that were part of a process that just terminated making those pages free
      as the whole VIVT cache has to be flushed on every task switch. Hence
      unmapped highmem pages need no cache maintenance in that case.
      
      However unmapped pages may still be cached with a VIPT cache because the
      cache is tagged with physical addresses.  There is no need for a whole
      cache flush during task switching for that reason, and despite the
      explicit cache flushes in flush_all_zero_pkmaps() and kunmap_atomic(),
      some highmem pages that were mapped in user space end up still cached
      even when they become unmapped.
      
      So, we do have to perform cache maintenance on those unmapped highmem
      pages in the context of DMA when using a VIPT cache.  Unfortunately,
      it is not possible to perform that cache maintenance using physical
      addresses as all the L1 cache maintenance coprocessor functions accept
      virtual addresses only.  Therefore we have no choice but to set up a
      temporary virtual mapping for that purpose.
      
      And of course the explicit cache flushing when unmapping a highmem page
      on a system with a VIPT cache now can go, which should increase
      performance.
      
      While at it, because the code in __flush_dcache_page() has to be modified
      anyway, let's also make sure the mapped highmem pages are pinned with
      kmap_high_get() for the duration of the cache maintenance operation.
      Because kunmap() does unmap highmem pages lazily, it was reported by
      Gary King <GKing@nvidia.com> that those pages ended up being unmapped
      during cache maintenance on SMP causing segmentation faults.
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      7e5a69e8
  20. 09 4月, 2010 1 次提交