- 19 4月, 2012 4 次提交
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由 Huang, Xiong 提交于
l1c & later chips don't support DMA for SMB. CMB is removed from hardware. reg(15C8) is used to trig interrupt by tpd threshold. Signed-off-by: Nxiong <xiong@qca.qualcomm.com> Tested-by: NLiu David <dwliu@qca.qualcomm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Huang, Xiong 提交于
VPD register is only used for L1(devid=PCI_DEVICE_ID_ATTANSIC_L1) to access external NV-memory. l1c & later chip doesn't use it any more. PHY 0/1 registers occupy the last 2 slots of the dump table. Signed-off-by: Nxiong <xiong@qca.qualcomm.com> Tested-by: NLiu David <dwliu@qca.qualcomm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Huang, Xiong 提交于
remove HDS register as it doesn't exist in hardware. Signed-off-by: Nxiong <xiong@qca.qualcomm.com> Tested-by: NLiu David <dwliu@qca.qualcomm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Huang, Xiong 提交于
the multiple-RX-Q in hardware doesn't work, all related register definition & code are removed. Signed-off-by: Nxiong <xiong@qca.qualcomm.com> Tested-by: NLiu David <dwliu@qca.qualcomm.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 8月, 2011 1 次提交
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由 Jeff Kirsher 提交于
Move the Atheros drivers into drivers/net/ethernet/atheros/ and make the necessary Kconfig and Makefile changes. CC: Jay Cliburn <jcliburn@gmail.com> CC: Chris Snook <chris.snook@gmail.com> CC: Jie Yang <jie.yang@atheros.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 21 1月, 2011 1 次提交
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由 françois romieu 提交于
Either unused or duplicates from mii.h. Signed-off-by: NFrancois Romieu <romieu@fr.zoreil.com> Cc: Jay Cliburn <jcliburn@gmail.com> Cc: Chris Snook <chris.snook@gmail.com> Cc: Jie Yang <jie.yang@atheros.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 01 6月, 2010 1 次提交
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由 Jie Yang 提交于
Add AR8151 v2.0 Gigabit 1000 support Change jumbo frame size to 6K Update L0s/L1 rountine when link speed is 100M or 1G, set L1 link timer to 4 for l1d_2 and l2c_b2 set L1 link timer to 7 for l2c_b, set L1 link timer to 0xF for others. Update atl1c_suspend routine just refactory the function, add atl1c_phy_power_saving routine, when Wake On Lan enable, this func will be called to save power, it will reautoneg PHY to 10/100M speed depend on the link partners link capability. Update atl1c_configure_des_ring do not use l2c_b default SRAM configuration. Signed-off-by: NJie Yang <Jie.Yang@atheros.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 2月, 2010 1 次提交
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由 Luis R. Rodriguez 提交于
AR8151 is a Gigabit Ethernet device. AR8152 devices are Fast Ethernet devices, there are two revisions, a 1.0 and a 2.0 revision. This has been tested against these devices: Driver Model-name vendor:device Type atl1c AR8131 1969:1063 Gigabit Ethernet atl1c AR8132 1969:1062 Fast Ethernet atl1c AR8151(v1.0) 1969:1073 Gigabit Ethernet atl1c AR8152(v1.1) 1969:2060 Fast Ethernet This device has no hardware available yet so it goes untested, but it should work: atl1c AR8152(v2.0) 1969:2062 Fast Ethernet Signed-off-by: NLuis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 19 2月, 2009 1 次提交
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由 Jie Yang 提交于
Supporting AR8131, and AR8132. Signed-off-by: NJie Yang <jie.yang@atheros.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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