- 05 3月, 2022 3 次提交
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由 Jingwen Chen 提交于
[Why] after the reset domain introduced, the sched.ready will be init after hw_init, which will overwrite the setup in vcn hw_init, and lead to vcn ib test fail. [How] set disabled vcn to no_scheduler Fixes: 5fd8518d ("drm/amdgpu: Move scheduler init to after XGMI is ready") Signed-off-by: NJingwen Chen <Jingwen.Chen2@amd.com> Acked-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ruijing Dong 提交于
vcn fwlog is for debugging purpose only, by default, it is disabled. Signed-off-by: NRuijing Dong <ruijing.dong@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ruijing Dong 提交于
Add fw log in fw shared data structure. Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NRuijing Dong <ruijing.dong@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 22 10月, 2021 3 次提交
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由 Alex Deucher 提交于
No need to use the id variable, just use the constant plus instance offset directly. Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Roughly the same code was present in all VCN versions. Consolidate it into a single function. v2: use AMDGPU_UCODE_ID_VCN + i, check if num_inst >= 2 Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Reviewed-by: NJames Zhu <James.Zhu@amd.com>
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由 Alex Deucher 提交于
Only enable firmware for the instance that is enabled. v2: use AMDGPU_UCODE_ID_VCN + i Fixes: 1b592d00 ("drm/amdgpu/vcn: remove manual instance setting") Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1743Reviewed-by: NJames Zhu <James.Zhu@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 09 10月, 2021 1 次提交
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由 Guchun Chen 提交于
adev_to_drm is used everywhere, so improve recent changes when accessing drm_device pointer from amdgpu_device. Signed-off-by: NGuchun Chen <guchun.chen@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 05 10月, 2021 4 次提交
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由 Alex Deucher 提交于
Allow us to query instances versions more cleanly. Instancing support is not consistent unfortunately. SDMA is a good example. Sienna cichlid has 4 total SDMA instances, each enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8 total SDMA instances, but they are enumerated as multiple instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC is another example. On most chips there are multiple instances with the same HWID. This allows us to support both forms. v2: rebase v3: clarify instancing support Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Use the table rather than asic specific harvest registers. v2: remove harvesting register checking Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Handled by IP discovery now. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Use IP versions rather than asic_type to differentiate IP version specific features. Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 9月, 2021 1 次提交
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由 Satyajit Sahu 提交于
VCN has multiple rings. Set the proper priority level for each encode ring while initializing. Signed-off-by: NSatyajit Sahu <satyajit.sahu@amd.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 8月, 2021 1 次提交
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由 Peng Ju Zhou 提交于
The previous logic is recording the amount of valid vcn instances to use them on SRIOV, it is a hard task due to the vcn accessment is based on the index of the vcn instance. Check if the vcn instance enabled before do instance init. Signed-off-by: NPeng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 23 7月, 2021 1 次提交
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由 Oak Zeng 提交于
The printing message "PSP loading VCN firmware" is mis-leading because people might think driver is loading VCN firmware. Actually when this message is printed, driver is just preparing some VCN ucode, not loading VCN firmware yet. The actual VCN firmware loading will be in the PSP block hw_init. Fix the printing message Signed-off-by: NOak Zeng <Oak.Zeng@amd.com> Reviewed-by: NChristian Konig <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 19 6月, 2021 2 次提交
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由 Bokun Zhang 提交于
In the past, we use MMSCH to determine whether a VCN is enabled or not. This is not reliable since after a FLR, MMSCH may report junk data. It is better to use IP discovery data. Signed-off-by: NBokun Zhang <Bokun.Zhang@amd.com> Signed-off-by: NPeng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Probably a rebase leftover. This doesn't apply to SR-IOV, and the non-SR-IOV code below it already handles this properly. Reviewed-by: NJames Zhu <James.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 21 5月, 2021 2 次提交
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由 James Zhu 提交于
Add cancel_delayed_work_sync before set power gating state to avoid race condition issue when power gating. Signed-off-by: NJames Zhu <James.Zhu@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 James Zhu 提交于
Add cancel_delayed_work_sync before set power gating state to avoid race condition issue when power gating. Signed-off-by: NJames Zhu <James.Zhu@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 20 5月, 2021 4 次提交
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由 Andrey Grodzovsky 提交于
This should prevent writing to memory or IO ranges possibly already allocated for other uses after our device is removed. v5: Protect more places wher memcopy_to/form_io takes place Protect IB submissions v6: Switch to !drm_dev_enter instead of scoping entire code with brackets. v7: Drop guard of HW ring commands emission protection since they are in GART and not in MMIO. Signed-off-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210512142648.666476-10-andrey.grodzovsky@amd.com
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由 Christian König 提交于
This unfortunately comes up in regular intervals and breaks GPU reset for the engine in question. The sched.ready flag controls if an engine can't get working during hw_init, but should never be set to false during hw_fini. v2: squash in unused variable fix (Alex) Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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Enabled VCN support for Beige Goby chip Signed-off-by: NVeerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
This unfortunately comes up in regular intervals and breaks GPU reset for the engine in question. The sched.ready flag controls if an engine can't get working during hw_init, but should never be set to false during hw_fini. v2: squash in unused variable fix (Alex) Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 5月, 2021 1 次提交
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由 Bas Nieuwenhuizen 提交于
Otherwise tiling modes that require the values form this field (In particular _*_X) would be corrupted upon video decode. Copied from the VCN v2 code. Fixes: 99541f39 ("drm/amdgpu: add mc resume DPG mode for VCN3.0") Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com> Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 06 5月, 2021 1 次提交
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由 Bas Nieuwenhuizen 提交于
Otherwise tiling modes that require the values form this field (In particular _*_X) would be corrupted upon video decode. Copied from the VCN v2 code. Fixes: 99541f39 ("drm/amdgpu: add mc resume DPG mode for VCN3.0") Reviewed-and-Tested by: Leo Liu <leo.liu@amd.com> Signed-off-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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- 10 4月, 2021 3 次提交
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由 Christian König 提交于
Add VCN3 IB parsing to figure out to which instance we can send the stream for decode. v2: remove VCN instance limit as well, fix amdgpu_cs_find_mapping, check supported formats instead of unsupported. v3: fix typo and error handling v4: make sure the message BO is CPU accessible v5: fix addr calculation once more v6: only check message buffers v7: fix constant and use defines v8: fix create msg calculation Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NSonny Jiang <sonny.jiang@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
The VCN3 instances can do both decode as well as encode. Share the scheduler load balancing score and remove fixing encode to only the second instance. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-and-Tested-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Christian König 提交于
Allow separate ring to share the same scheduler score. No functional change. Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-and-Tested-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 2月, 2021 1 次提交
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由 Sonny Jiang 提交于
Because of dpg, the rptr/wptr need to be saved on fw shared memory, and restore them back in RBC_RB_RPTR/WPTR in kernel at power up. Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 09 12月, 2020 1 次提交
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由 Sonny Jiang 提交于
Add firmware write/read point reset sync through shared memory, port from vcn2.5. Signed-off-by: NSonny Jiang <sonny.jiang@amd.com> Reviewed-by: NJames Zhu <James.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 12月, 2020 4 次提交
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由 Boyuan Zhang 提交于
Port from VCN2.5 SCRATCH2 is used to keep decode wptr as a workaround which fix a hardware DPG decode wptr update bug for vcn2.5 beforehand. Signed-off-by: NBoyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: NJames Zhu <James.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.9.x
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由 Boyuan Zhang 提交于
Port from VCN2.5 Add vcn dpg harware synchronization to fix race condition issue between vcn driver and hardware. Signed-off-by: NBoyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: NJames Zhu <James.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org # 5.9.x
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由 Boyuan Zhang 提交于
Port from VCN2.5 SCRATCH2 is used to keep decode wptr as a workaround which fix a hardware DPG decode wptr update bug for vcn2.5 beforehand. Signed-off-by: NBoyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: NJames Zhu <James.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Boyuan Zhang 提交于
Port from VCN2.5 Add vcn dpg harware synchronization to fix race condition issue between vcn driver and hardware. Signed-off-by: NBoyuan Zhang <boyuan.zhang@amd.com> Reviewed-by: NJames Zhu <James.Zhu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 02 12月, 2020 2 次提交
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由 Lee Jones 提交于
Fixes the following W=1 kernel build warning(s): drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c: In function ‘vcn_v3_0_start_sriov’: drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c:1242:3: warning: variable ‘direct_poll’ set but not used [-Wunused-but-set-variable] Cc: Alex Deucher <alexander.deucher@amd.com> Cc: "Christian König" <christian.koenig@amd.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: amd-gfx@lists.freedesktop.org Cc: dri-devel@lists.freedesktop.org Signed-off-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 James Zhu 提交于
Fixed warning: no previous prototype. Signed-off-by: NJames Zhu <James.Zhu@amd.com> Reported-by: Nkernel test robot <lkp@intel.com> Reviewed-by: NNirmoy Das <nirmoy.das@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 25 11月, 2020 2 次提交
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由 James Zhu 提交于
Support software ring share memory with vcn firmware. Signed-off-by: NJames Zhu <James.Zhu@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 James Zhu 提交于
Add dec software ring vm functions to support. Signed-off-by: NJames Zhu <James.Zhu@amd.com> Reviewed-by: NLeo Liu <leo.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 13 11月, 2020 1 次提交
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由 Bokun Zhang 提交于
- Issue: In the original vcn3.0 code, it assumes that the VCN's init_status is always 1, even after the MMSCH updates the header. This is incorrect since by default, it should be set to 0, and MMSCH will update it to 1 if VCN is ready. - Fix: We need to read back the table header after send it to MMSCH. After that, if a VCN instance is not ready (host disabled it), we needs to disable the ring buffer as well. Signed-off-by: NBokun Zhang <Bokun.Zhang@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 11 11月, 2020 1 次提交
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由 Bokun Zhang 提交于
- The original logic uses a counter based index assignment, which is incorrect if we only assign VCN1 to this VF but no VCN0 The doorbell index is absolute, so we can calculate it by using index variable i and j Signed-off-by: NBokun Zhang <Bokun.Zhang@amd.com> Reviewed-by: NMonk Liu <monk.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 03 11月, 2020 1 次提交
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由 Deepak R Varma 提交于
When declaring pointer data, the "*" symbol should be used adjacent to the data name as per the coding style standards. This resolves following issues reported by checkpatch script: ERROR: "foo * bar" should be "foo *bar" ERROR: "foo * bar" should be "foo *bar" ERROR: "foo* bar" should be "foo *bar" ERROR: "(foo*)" should be "(foo *)" Signed-off-by: NDeepak R Varma <mh12gx2825@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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