While the pinmux_ops are ideally just a vtable for pin mux
calls, the "strict" setting belongs so intuitively with the
pin multiplexing that we should move it here anyway. Putting
it in the top pinctrl_desc makes no sense.

Cc: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Disallow simultaneous use of the the GPIO and peripheral mux
functions by setting a flag "strict" in struct pinctrl_desc.

The blackfin pinmux and gpio controller doesn't allow user to
set up a pin for both GPIO and peripheral function. So, add flag
strict in struct pinctrl_desc to check both gpio_owner and
mux_owner before approving the pin request.

v2-changes:
- if strict flag is set, check gpio_owner and mux_onwer in if and
  else clause

v3-changes:
- add kerneldoc for this struct
- augment Documentation/pinctrl.txt
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add i.MX7D pinctrl driver support
Signed-off-by: NFrank Li <Frank.Li@freescale.com>
Signed-off-by: NAnson Huang <b20788@freescale.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Pinctrl driver for the System Control Unit (SCU) found on NXP
LPC18xx/43xx devices.

Driver uses the generic pinctrl DT bindings for multiplexing
and property settings.
Signed-off-by: NJoachim Eastwood <manabian@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This adds the callback for set_multiple.

As this controller has a separate set and clear register, we
can't write directly to PIO_ODSR as this would required a cached
variable and would race with at91_gpio_set.

So build masks for the PIO_SODR and PIO_CODR registers and
write them together.
Signed-off-by: NAlexander Stein <alexanders83@web.de>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There was some mess in the dependencies in the pinctrl
Kconfig for compile tests under allmodconfig. Mea Culpa.
Reported-by: NLinus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Instead of referring to a global static variable for the sgpio
locking, use the state container to contain the lock.
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add compatible string definitions and supported pin functions.
Signed-off-by: NIvan T. Ivanov <ivan.ivanov@linaro.org>
Acked-by: NBjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Currently, the driver uses handle_simple_irq for all IRQ types and hard
codes the acknowledge for different IRQ types into the handler. It is
better to use the IRQ core as intended and let it handle the differences
between the various types of IRQ. For example the current system does
not work for threaded level triggered IRQs as these need to be masked
until the threaded handler has run.
Signed-off-by: NCharles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add EtherAVB pin groups to R8A7790 PFC driver.

Based on original patch by Mitsuhiro Kimura <mitsuhiro.kimura.kc@renesas.com>.
Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This driver supports pinctrl/GPIO hardware found on Intel Sunrisepoint (a
Skylake PCH) providing users a pinctrl and GPIO interfaces (including GPIO
interrupts).

The driver is split into core and platform parts so that the same core
driver can be reused in other drivers for other Intel GPIO hardware that is
based on the same host controller design.
Signed-off-by: NMathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

0 is used in all pinfunction definitions when a config register is not
available, for example imx25-pinfunc.h. If a configuration value is used
for such a pinfunction the driver will always write it to the
configuration register if it is not -1. For a 0 configuration register
the configuration value is written to offset 0x0. This can lead to a
crashing/hanging system without any warning message.

This patch checks for 0 config register and sets the internal value to
-1. If the configuration value is not NO_PADCTL this leads to an error
message that applying the configuration failed.
Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de>
Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tested-by: NStefan Agner <stefan@agner.ch>
Acked-by: NStefan Agner <stefan@agner.ch>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch adds support for the AmLogic Meson8b SoC.
Signed-off-by: NCarlo Caione <carlo@endlessm.com>
Acked-by: NBeniamino Galvani <b.galvani@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Add the compatible string for Meson8b in Meson pinctrl documentation
and add new information for Meson8b in source code comments.
Signed-off-by: NCarlo Caione <carlo@endlessm.com>
Acked-by: NBeniamino Galvani <b.galvani@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch introduces a new PIN macro and few small modifications to
simplify and shorten the Meson pinctrl drivers and cleanup the support
file for the AmLogic Meson8 SoC.
Signed-off-by: NCarlo Caione <carlo@endlessm.com>
Acked-by: NBeniamino Galvani <b.galvani@gmail.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

recognized by static analysis tool smatch. Declare constant
Variables with Sparse's suggestion.
Signed-off-by: NKen Xue <Ken.Xue@amd.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Use endian agnostic _relaxed IO accessors instead of the __raw ones.
Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk>
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

of_device_id is always used as const.
(See driver.of_match_table and open firmware functions)
Signed-off-by: NFabian Frederick <fabf@skynet.be>
Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: NPatrice Chotard <patrice.chotard@st.com>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Acked-by: NHongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: NLee Jones <lee@kernel.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This makes the error message much more useful.
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Make pinconf_generic_dt_node_to_map() also scan the dt pin configuration node
directly referenced by phandle, not only its child nodes.

The "parent scan" feature needs a few other changes:

   * Move the pinconf_generic_dt_node_to_map() error handling code to a common
     place, under the 'exit' label.

   * Move the pins/groups strings count earlier in
     pinconf_generic_dt_subnode_to_map(), to allow us to bail out early when
     these properties are missing or wrong
Signed-off-by: NBaruch Siach <baruch@tkos.co.il>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This commit adds suspend/resume support to the Armada XP pinctrl
driver, by simply saving and restoring the MPP registers.
Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Great for easily determining which mode a pin is operating in.
This patch was particularly helpful when debugging a recent GPIO/
Pinctrl disparity issue.

Before:
    $ cat /sys/kernel/debug/pinctrl/<pin-controller>/pinconf-pins
      pin 33 (PIO4[1]):[OE:0,PU:0,OD:0]
             [retime:0,invclk:0,clknotdat:0,de:0,rt-clk:0,rt-delay:0]

After [GPIO]:
    $ cat /sys/kernel/debug/pinctrl/<pin-controller>/pinconf-pins
      pin 33 (PIO4[1]):[OE:0,PU:0,OD:0] GPIO
             [retime:0,invclk:0,clknotdat:0,de:0,rt-clk:0,rt-delay:0]

After [Alt]:
    $ cat /sys/kernel/debug/pinctrl/<pin-controller>/pinconf-pins
      pin 33 (PIO4[1]):[OE:0,PU:0,OD:0] Alt Fn 2
             [retime:0,invclk:0,clknotdat:0,de:0,rt-clk:0,rt-delay:0]
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Until now ST's pinconf_dbg_show() call-back has displayed the PIO
alternate function direction, which is only relevant if a pin is
operating in an alternate function mode i.e not GPIO mode.  If a
pin is in GPIO mode its direction is both set and status is
obtained by a completely different/unrelated bunch of registers.

This change ensures that the correct pin direction is shown, even
if a pin is operating in GPIO mode.
Reported-by: NOlivier Clergeaud <olivier.clergeaud@st.com>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

ST's hardware differentiates between GPIO mode and Pinctrl alternate
functions.  When a pin is in GPIO mode, there are dedicated registers
to set and obtain direction status.  However, If a pin's alternate
function is in use then the direction is set and status is derived
from a bunch of syscon registers.  The issue is; until now there was
a lack of parity between the two.

For example:

Catting the two following information sources could result in
conflicting information (output has been snipped for simplicity):

 $ cat /sys/kernel/debug/gpio
  GPIOs 32-39, platform/961f080.pin-controller-sbc, PIO4:
   gpio-33  (?                   ) out hi

 $ cat /sys/kernel/debug/pinctrl/<pin-controller>/pinconf-pins
  pin 33 (PIO4[1]):[OE:0,PU:0,OD:0]
         [retime:0,invclk:0,clknotdat:0,de:0,rt-clk:0,rt-delay:0]

In this example GPIO-33 is a GPIO controlled LED, which is set for
output, as you'd expect.  However, when the same information is
drafted from Pinctrl, it clearly states that OE (Output Enable) is
not set i.e. the pin is set for input.  This is because OE normally
only represents alternate functions and has no bearing on how the
pin operates when in Alt-0 (GPIO mode).

This patch changes the current semantics and provides a parity link
between the two subsystems.  The get_direction() call-back firstly
determines which function a pin is operating in, then uses the
appropriate helpers for that mode.
Reported-by: NOlivier Clergeaud <olivier.clergeaud@st.com>
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

st_get_pio_control() will be used by subsequent calls which are
to be located above its original position.  This is required to
prevent the need for an unnecessary forward-declaration/prototype.
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This call fetches the numerical function value a specified pin is
currently operating in.  Function zero is more often than not the
GPIO function.  Greater than zero values represent an alternative
function.  You'd need to either look those up in the Device Tree
sources or the Programmer's Manual.
Acked-by: NMaxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Optional fields are set to -1 by various preprocessor macros. Make
sure the fields can actually store them.
Signed-off-by: NStefan Agner <stefan@agner.ch>
Acked-by: NStephen Warren <swarren@nvidia.com>
Tested-by: NStephen Warren <swarren@nvidia.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Also make the table a bit compact.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NHongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Prefer devm_kcalloc over devm_kzalloc with multiply.
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NHongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fix below build error:
  CC      drivers/pinctrl/mediatek/pinctrl-mt8135.o
In file included from drivers/pinctrl/mediatek/pinctrl-mt8135.c:24:0:
drivers/pinctrl/mediatek/pinctrl-mtk-mt8135.h:19:32: fatal error: pinctrl-mtk-common.h: No such file or directory
compilation terminated.
make[3]: *** [drivers/pinctrl/mediatek/pinctrl-mt8135.o] Error 1
make[2]: *** [drivers/pinctrl/mediatek] Error 2
make[1]: *** [drivers/pinctrl] Error 2
make: *** [drivers] Error 2
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Reviewed-by: NMatthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Acked-by: NHongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

ARM64 maintainer doesn't want to add MACH_* for each SoC.
Adjust mt8173 pinctrl kconfig entry so user can manually select it.

Also make PINCTRL_MT8135 selectable when COMPILE_TEST is enabled.
Signed-off-by: NYingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Remove erroneous kfree for memory allocated by devm_kzalloc
Signed-off-by: NAxel Lin <axel.lin@ingics.com>
Acked-by: NYingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Fix the following build failure:

In file included from drivers/pinctrl/mediatek/pinctrl-mt8135.c:24:0:
drivers/pinctrl/mediatek/pinctrl-mtk-mt8135.h:19:32: fatal error:
	pinctrl-mtk-common.h: No such file or directory

seen when building arm:multi_v7_defconfig.

Fixes: 94097d89c145 ("pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.")
Cc: Hongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
Reviewed-by: NPaul Walmsley <paul@pwsan.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

On sun4i-a10, when GPIOs are configured as external interrupt the value for
them in the data register does not seem to get updated, so set their mux to
input (and restore afterwards) when reading the pin.

Missed edges seem to be buffered, so this does not introduce a race
condition.

I've also tested this on sun5i-a13 and sun7i-a20 and those do not seem to
be affected, the input value representation in the data register does seem
to correctly get updated to the actual pin value while in irq mode there.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The r8a7790 platform is now DT-only, the driver doesn't need to match
platform devices by name anymore. Remove the corresponding
platform_device_id entry.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The emev2 platform is now DT-only, the driver doesn't need to match
platform devices by name anymore. Remove the corresponding
platform_device_id entry.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Currently all PFC registers lie in low 32-bit address space. Hence use
u32 instead of unsigned long to store PFC register addresses in pinctrl
tables.  All calculations of virtual addresses use a phys_addr_t
intermediate, so we know where to add an offset if the 32-bit assumption
ever becomes false.

While this doesn't impact 32-bit builds, it would save ca. 7 KiB on a
64-bit shmobile_defconfig kernel.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

All other loops over sh_pfc_soc_info.data_regs[] use
pinmux_data_reg.regwidth as the sentinel, which is safer as zero is
never a valid regwidth value (reg could be zero if we start using it to
store an offset).
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

As register and field widths and offsets are in the range 1..32, use
unsigned int (mostly replacing unsigned long) to store them in local
variables and for passing them around.

Move to one variable per line, move variables to the beginning of the
block where they are used, and drop superfluous initializations while we
are at it.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Register and field widths are in the range 1..32. Storing them in the
pinctrl data in (arrays of) unsigned long wastes space.

This decreases the size of a (32-bit) shmobile_defconfig kernel
supporting 7 SoCs by 26460 bytes.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>