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  1. 24 10月, 2016 1 次提交
  3. 13 10月, 2016 2 次提交
  5. 12 10月, 2016 1 次提交
    • M
      ACPI / property: Allow holes in reference properties · b60e4ea4
      由 Mika Westerberg 提交于 
      DT allows holes or empty phandles for references. This is used for example
in SPI subsystem where some chip selects are native and others are regular
GPIOs. In ACPI _DSD we currently do not support this but instead the
preceding reference consumes all following integer arguments.

For example we would like to support something like the below ASL fragment
for SPI:

  Package () {
      "cs-gpios",
      Package () {
          ^GPIO, 19, 0, 0, // GPIO CS0
          0,               // Native CS
          ^GPIO, 20, 0, 0, // GPIO CS1
      }
  }

The zero in the middle means "no entry" or NULL reference. To support this
we change acpi_data_get_property_reference() to take firmware node and
num_args as argument and rename it to __acpi_node_get_property_reference().
The function returns -ENOENT if the given index resolves to "no entry"
reference and -ENODATA when there are no more entries in the property.

We then add static inline wrapper acpi_node_get_property_reference() that
passes MAX_ACPI_REFERENCE_ARGS as num_args to support the existing
behaviour which some drivers have been relying on.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      b60e4ea4
  7. 10 10月, 2016 2 次提交
  9. 08 10月, 2016 1 次提交
  11. 01 10月, 2016 2 次提交
  13. 28 9月, 2016 1 次提交
  15. 27 9月, 2016 1 次提交
  17. 26 9月, 2016 1 次提交
  19. 24 9月, 2016 4 次提交
  21. 22 9月, 2016 5 次提交
    • D
      acpi: Validate processor id when mapping the processor · fd74da21
      由 Dou Liyang 提交于 
      When we want to identify whether the proc_id is unreasonable or not, we
can call the "acpi_processor_validate_proc_id" function. It will search
in the duplicate IDs. If we find the proc_id in the IDs, we return true
to the call function. Conversely, the false represents available.

When we establish all possible cpuid <-> nodeid mapping to handle the
cpu hotplugs, we will use the proc_id from ACPI table.

We do validation when we get the proc_id. If the result is true, we
will stop the mapping.

[ tglx: Mark the new function __init ]
Signed-off-by: NDou Liyang <douly.fnst@cn.fujitsu.com>
Acked-by: NIngo Molnar <mingo@kernel.org>
Cc: mika.j.penttila@gmail.com
Cc: len.brown@intel.com
Cc: rafael@kernel.org
Cc: rjw@rjwysocki.net
Cc: yasu.isimatu@gmail.com
Cc: linux-mm@kvack.org
Cc: linux-acpi@vger.kernel.org
Cc: isimatu.yasuaki@jp.fujitsu.com
Cc: gongzhaogang@inspur.com
Cc: tj@kernel.org
Cc: izumi.taku@jp.fujitsu.com
Cc: cl@linux.com
Cc: chen.tang@easystack.cn
Cc: akpm@linux-foundation.org
Cc: kamezawa.hiroyu@jp.fujitsu.com
Cc: lenb@kernel.org
Link: http://lkml.kernel.org/r/1472114120-3281-8-git-send-email-douly.fnst@cn.fujitsu.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      fd74da21
    • D
      acpi: Provide mechanism to validate processors in the ACPI tables · 8e089eaa
      由 Dou Liyang 提交于 
      [Problem]

When we set cpuid <-> nodeid mapping to be persistent, it will use the DSDT
As we know, the ACPI tables are just like user's input in that respect, and
we don't crash if user's input is unreasonable.

Such as, the mapping of the proc_id and pxm in some machine's ACPI table is
like this:

proc_id   |    pxm
--------------------
0       <->     0
1       <->     0
2       <->     1
3       <->     1
89      <->     0
89      <->     0
89      <->     0
89      <->     1
89      <->     1
89      <->     2
89      <->     3
.....

We can't be sure which one is correct to the proc_id 89. We may map a wrong
node to a cpu. When pages are allocated, this may cause a kernal panic.

So, we should provide mechanisms to validate the ACPI tables, just like we
do validation to check user's input in web project.

The mechanism is that the processor objects which have the duplicate IDs
are not valid.

[Solution]

We add a validation function, like this:

foreach Processor in DSDT
	proc_id = get_ACPI_Processor_number(Processor)
	if (proc_id exists )
		mark both of them as being unreasonable;

The function will record the unique or duplicate processor IDs.

The duplicate processor IDs such as 89 are regarded as the unreasonable IDs
which mean that the processor objects in question are not valid.

[ tglx: Add __init[data] annotations ]
Signed-off-by: NDou Liyang <douly.fnst@cn.fujitsu.com>
Acked-by: NIngo Molnar <mingo@kernel.org>
Cc: mika.j.penttila@gmail.com
Cc: len.brown@intel.com
Cc: rafael@kernel.org
Cc: rjw@rjwysocki.net
Cc: yasu.isimatu@gmail.com
Cc: linux-mm@kvack.org
Cc: linux-acpi@vger.kernel.org
Cc: isimatu.yasuaki@jp.fujitsu.com
Cc: gongzhaogang@inspur.com
Cc: tj@kernel.org
Cc: izumi.taku@jp.fujitsu.com
Cc: cl@linux.com
Cc: chen.tang@easystack.cn
Cc: akpm@linux-foundation.org
Cc: kamezawa.hiroyu@jp.fujitsu.com
Cc: lenb@kernel.org
Link: http://lkml.kernel.org/r/1472114120-3281-7-git-send-email-douly.fnst@cn.fujitsu.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      8e089eaa
    • G
      x86/acpi: Set persistent cpuid <-> nodeid mapping when booting · dc6db24d
      由 Gu Zheng 提交于 
      The whole patch-set aims at making cpuid <-> nodeid mapping persistent. So that,
when node online/offline happens, cache based on cpuid <-> nodeid mapping such as
wq_numa_possible_cpumask will not cause any problem.
It contains 4 steps:
1. Enable apic registeration flow to handle both enabled and disabled cpus.
2. Introduce a new array storing all possible cpuid <-> apicid mapping.
3. Enable _MAT and MADT relative apis to return non-present or disabled cpus' apicid.
4. Establish all possible cpuid <-> nodeid mapping.

This patch finishes step 4.

This patch set the persistent cpuid <-> nodeid mapping for all enabled/disabled
processors at boot time via an additional acpi namespace walk for processors.

[ tglx: Remove the unneeded exports ]
Signed-off-by: NGu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: NTang Chen <tangchen@cn.fujitsu.com>
Signed-off-by: NZhu Guihua <zhugh.fnst@cn.fujitsu.com>
Signed-off-by: NDou Liyang <douly.fnst@cn.fujitsu.com>
Acked-by: NIngo Molnar <mingo@kernel.org>
Cc: mika.j.penttila@gmail.com
Cc: len.brown@intel.com
Cc: rafael@kernel.org
Cc: rjw@rjwysocki.net
Cc: yasu.isimatu@gmail.com
Cc: linux-mm@kvack.org
Cc: linux-acpi@vger.kernel.org
Cc: isimatu.yasuaki@jp.fujitsu.com
Cc: gongzhaogang@inspur.com
Cc: tj@kernel.org
Cc: izumi.taku@jp.fujitsu.com
Cc: cl@linux.com
Cc: chen.tang@easystack.cn
Cc: akpm@linux-foundation.org
Cc: kamezawa.hiroyu@jp.fujitsu.com
Cc: lenb@kernel.org
Link: http://lkml.kernel.org/r/1472114120-3281-6-git-send-email-douly.fnst@cn.fujitsu.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      dc6db24d
    • G
      x86/acpi: Enable MADT APIs to return disabled apicids · 8ad893fa
      由 Gu Zheng 提交于 
      The whole patch-set aims at making cpuid <-> nodeid mapping persistent. So that,
when node online/offline happens, cache based on cpuid <-> nodeid mapping such as
wq_numa_possible_cpumask will not cause any problem.
It contains 4 steps:
1. Enable apic registeration flow to handle both enabled and disabled cpus.
2. Introduce a new array storing all possible cpuid <-> apicid mapping.
3. Enable _MAT and MADT relative apis to return non-present or disabled cpus' apicid.
4. Establish all possible cpuid <-> nodeid mapping.

This patch finishes step 3.

There are four mappings in the kernel:
1. nodeid (logical node id)   <->   pxm        (persistent)
2. apicid (physical cpu id)   <->   nodeid     (persistent)
3. cpuid (logical cpu id)     <->   apicid     (not persistent, now persistent by step 2)
4. cpuid (logical cpu id)     <->   nodeid     (not persistent)

So, in order to setup persistent cpuid <-> nodeid mapping for all possible CPUs,
we should:
1. Setup cpuid <-> apicid mapping for all possible CPUs, which has been done in step 1, 2.
2. Setup cpuid <-> nodeid mapping for all possible CPUs. But before that, we should
   obtain all apicids from MADT.

All processors' apicids can be obtained by _MAT method or from MADT in ACPI.
The current code ignores disabled processors and returns -ENODEV.

After this patch, a new parameter will be added to MADT APIs so that caller
is able to control if disabled processors are ignored.
Signed-off-by: NGu Zheng <guz.fnst@cn.fujitsu.com>
Signed-off-by: NTang Chen <tangchen@cn.fujitsu.com>
Signed-off-by: NZhu Guihua <zhugh.fnst@cn.fujitsu.com>
Signed-off-by: NDou Liyang <douly.fnst@cn.fujitsu.com>
Acked-by: NIngo Molnar <mingo@kernel.org>
Cc: mika.j.penttila@gmail.com
Cc: len.brown@intel.com
Cc: rafael@kernel.org
Cc: rjw@rjwysocki.net
Cc: yasu.isimatu@gmail.com
Cc: linux-mm@kvack.org
Cc: linux-acpi@vger.kernel.org
Cc: isimatu.yasuaki@jp.fujitsu.com
Cc: gongzhaogang@inspur.com
Cc: tj@kernel.org
Cc: izumi.taku@jp.fujitsu.com
Cc: cl@linux.com
Cc: chen.tang@easystack.cn
Cc: akpm@linux-foundation.org
Cc: kamezawa.hiroyu@jp.fujitsu.com
Cc: lenb@kernel.org
Link: http://lkml.kernel.org/r/1472114120-3281-5-git-send-email-douly.fnst@cn.fujitsu.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
      8ad893fa
    • D
      nfit: fail DSMs that return non-zero status by default · 11294d63
      由 Dan Williams 提交于 
      For the DSMs where the kernel knows the format of the output buffer and
originates those DSMs from within the kernel, return -EIO for any
non-zero status.  If the BIOS is indicating a status that we do not know
how to handle, fail the DSM.

Cc: <stable@vger.kernel.org>
Signed-off-by: NDan Williams <dan.j.williams@intel.com>
      11294d63
  23. 21 9月, 2016 1 次提交
  25. 20 9月, 2016 1 次提交
  27. 17 9月, 2016 6 次提交
  29. 13 9月, 2016 3 次提交
    • J
      ACPI / APD: constify local structures · a217726a
      由 Julia Lawall 提交于 
      For structure types defined in the same file or local header files, find
top-level static structure declarations that have the following
properties:
1. Never reassigned.
2. Address never taken
3. Not passed to a top-level macro call
4. No pointer or array-typed field passed to a function or stored in a
variable.
Declare structures having all of these properties as const.

Done using Coccinelle.
Based on a suggestion by Joe Perches <joe@perches.com>.
Signed-off-by: NJulia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      a217726a
    • T
      ACPI: Add new IORT functions to support MSI domain handling · 4bf2efd2
      由 Tomasz Nowicki 提交于 
      For ITS, MSI functionality consists on building domain stack and
during that process we need to reference to domain stack components
e.g. before we create new DOMAIN_BUS_PCI_MSI domain we need to specify
its DOMAIN_BUS_NEXUS parent domain. In order to manage that process
properly, maintain list which elements contain domain token
(unique for MSI domain stack) and ITS ID: iort_register_domain_token()
and iort_deregister_domain_token(). Then retrieve domain token
any time later with ITS ID being key off: iort_find_domain_token().
With domain token and domain type we are able to find corresponding
IRQ domain.

Since IORT is prepared to describe MSI domain on a per-device basis,
use existing IORT helpers and implement two calls:
1. iort_msi_map_rid() to map MSI RID for a device
2. iort_get_device_domain() to find domain token for a device
Signed-off-by: NTomasz Nowicki <tn@semihalf.com>
Acked-by: NRafael J. Wysocki <rjw@rjwysocki.net>
Reviewed-by: NHanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      4bf2efd2
    • T
      ACPI: I/O Remapping Table (IORT) initial support · 88ef16d8
      由 Tomasz Nowicki 提交于 
      IORT shows representation of IO topology for ARM based systems.
It describes how various components are connected together on
parent-child basis e.g. PCI RC -> SMMU -> ITS. Also see IORT spec.
http://infocenter.arm.com/help/topic/com.arm.doc.den0049b/DEN0049B_IO_Remapping_Table.pdf

Initial support allows to detect IORT table presence and save its
root pointer obtained through acpi_get_table(). The pointer validity
depends on acpi_gbl_permanent_mmap because if acpi_gbl_permanent_mmap
is not set while using IORT nodes we would dereference unmapped pointers.

For the aforementioned reason call acpi_iort_init() from acpi_init()
which guarantees acpi_gbl_permanent_mmap to be set at that point.

Add generic helpers which are helpful for scanning and retrieving
information from IORT table content. List of the most important helpers:
- iort_find_dev_node() finds IORT node for a given device
- iort_node_map_rid() maps device RID and returns IORT node which provides
  final translation

IORT support is placed under drivers/acpi/arm64/ new directory due to its
ARM64 specific nature. The code there is considered only for ARM64.
The long term plan is to keep all ARM64 specific tables support
in this place e.g. GTDT table.
Signed-off-by: NTomasz Nowicki <tn@semihalf.com>
Acked-by: NRafael J. Wysocki <rjw@rjwysocki.net>
Reviewed-by: NHanjun Guo <hanjun.guo@linaro.org>
Reviewed-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
      88ef16d8
  31. 10 9月, 2016 8 次提交
    • L
      ACPI / PCI: fix GIC irq model default PCI IRQ polarity · 10b68700
      由 Lorenzo Pieralisi 提交于 
      On ACPI ARM based systems the GIC interrupt controller
and corresponding interrupt model permit only the high
polarity for level interrupts.

ACPI firmware describes PCI legacy IRQs through entries
in the _PRT objects. Entries in the _PRT can be of two types:

- Static: not configurable, trigger/polarity default to level-low,
  _PRT entry defines the global GSI interrupt number
- Configurable: _PRT interrupt entry contains a reference to the
  corresponding PCI interrupt link device (that in turn provides the
  interrupt descriptor through its _CRS/_PRS methods)

Configurable IRQ entries are not currently allowed by the ACPI
specification on ARM since they can only be used for interrupt pins that
are routable, as per ACPI specifications (version 6.1, 6.2.13):

"[...] There are two ways that _PRT can be used. Typically, the
interrupt input that a given PCI interrupt is on is configurable. For
example, a given PCI interrupt might be configured for either IRQ 10 or
11 on an 8259 interrupt controller. In this model, each interrupt is
represented in the ACPI namespace as a PCI Interrupt Link Device. [...]"

ARM platforms GIC configurations do not allow dynamic IRQ routing,
since routing is statically laid out at synthesis time; therefore PCI
interrupt links cannot be used for PCI legacy IRQ descriptions in the
_PRT on ARM systems.

On the other hand, current core ACPI code handling PCI legacy IRQs
consider IRQ trigger/polarity for static _PRT entries as level-low.

On ARM systems with a GIC interrupt controller and corresponding
ACPI interrupt model this does not work in that GIC interrupt
controller is only capable of handling level interrupts whose
polarity is high (for PCI legacy IRQs - that are level-low by
specification - this means that the legacy IRQs are inverted before
reaching the interrupt controller pin), resulting in IRQ allocation
failures such as:

genirq: Setting trigger mode 8 for irq 18 failed (gic_set_type+0x0/0x48)

Change the default polarity for PCI legacy IRQs to high on systems
booting wth ACPI on platforms with a GIC interrupt controller model,
fixing the discrepancy between specification and HW behaviour.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: NMarc Zyngier <marc.zyngier@arm.com>
Tested-by: NDuc Dang <dhdang@apm.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      10b68700
    • L
      ACPICA: Tables: Tune table mutex to be a leaf lock · ac0f06eb
      由 Lv Zheng 提交于 
      ACPICA commit f564d57c6501b97a2871f0b4c048e79910f71783

This patch tunes MTX_TABLES into a leaf lock by always ensuring it is
released before holding other locks.

This patch also collects all table loading related functions into
acpi_tb_load_table() (invoked by load_table opcode) and
acpi_tb_install_and_load_table() (invoked by Load opcode and acpi_load_table()) so
that we can have lock tuning code collected at the boundary of these 2
functions. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/f564d57cTested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: NDutch Guy <lucht_piloot@gmx.net>
Signed-off-by: NLv Zheng <lv.zheng@intel.com>
Signed-off-by: NBob Moore <robert.moore@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      ac0f06eb
    • L
      ACPICA: Dispatcher: Fix a mutex issue for method auto serialization · 441ad11d
      由 Lv Zheng 提交于 
      ACPICA commit fd305eda14f1a1e684edef4fac53f194bf00ed3f

This patch fixes an issue with acpi_ds_auto_serialized_method().
The parser will invoke acpi_ex_release_all_mutexes(), which in return
cause mutexes held in ACPI_ERROR_METHOD() failed. Lv Zheng.

Link: https://bugs.acpica.org/show_bug.cgi?id=1324
Link: https://github.com/acpica/acpica/commit/fd305edaTested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: NGreg White <gwhite@kupulau.com>
Tested-by: NDutch Guy <lucht_piloot@gmx.net>
Signed-off-by: NLv Zheng <lv.zheng@intel.com>
Signed-off-by: NBob Moore <robert.moore@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      441ad11d
    • L
      ACPICA: Namespace: Fix dynamic table loading issues · 74f51b80
      由 Lv Zheng 提交于 
      ACPICA commit 767ee53354e0c4b7e8e7c57c6dd7bf569f0d52bb

There are issues related to the namespace/interpreter locks, which causes
several ACPI functionalities not specification compliant. The lock issues
were detectec when we were trying to fix the functionalities (please see
Link # [1] for the details).

What's the lock issues? Let's first look into the namespace/interpreter
lock usages inside of the object evaluation and the table loading which are
the key AML interpretion code paths:
Table loading:
acpi_ns_load_table
	L(Namespace)
	acpi_ns_parse_table
		acpi_ns_one_complete_parse(LOAD_PASS1/LOAD_PASS2)
			acpi_ds_load1_begion_op
			acpi_ds_load1_end_op
			acpi_ds_load2_begion_op
			acpi_ds_load2_end_op
	U(Namespace)
Object evaluation:
acpi_ns_evaluate
	L(Interpreter)
	acpi_ps_execute_method
		acpi_ds_exec_begin_op
		acpi_ds_exec_end_op
			U(Interpreter)
			acpi_ns_load_table
				L(Namespace)
				U(Namespace)
			acpi_ev_initialize_region
				L(Namespace)
				U(Namespace)
			address_space.Setup
			address_space.Handler
			acpi_os_wait_semaphore
			acpi_os_acquire_mutex
			acpi_os_sleep
			L(Interpreter)
	U(Interpreter)
	L(Interpreter)
	acpi_ex_resolve_node_to_value
	U(Interpreter)
	acpi_ns_check_return_value
Where:
  1. L(Interpreter) means acquire(MTX_INTERPRETER);
  2. U(Interpreter) means release(MTX_INTERPRETER);
  3. L(Namespace) means acquire(MTX_NAMESPACE);
  4. U(Namespace) means release(MTX_NAMESPACE);

We can see that acpi_ns_exec_module_code() (which invokes acpi_ns_evaluate) is
implemented in a deferred way just in order to avoid to reacquire the
namespace lock. This is in fact the root cause of many other ACPICA issues:
1. We now know for sure that the module code should be executed right in
   place by the Windows AML interpreter. So in the current design, if
   the region initializations/accesses or the table loadings (where the
   namespace surely should be locked again) happening during the table
   loading period, dead lock could happen because ACPICA never unlocks the
   namespace during the AML interpretion.
2. ACPICA interpreter just ensures that all static namespace nodes (named
   objects created during the acpi_load_tables()) are created
   (acpi_ns_lookup()) with the correct lock held, but doesn't ensure that
   the named objects created by the control method are created with the
   same correct lock held. It requires the control methods to be executed
   in a serial way after "loading a table", that's why ACPICA requires
   method auto serialization.

This patch fixes these software design issues by extending interpreter
enter/exit APIs to hold both interpreter/namespace locks to ensure the lock
order correctness, so that we can get these code paths:
Table loading:
acpi_ns_load_table
	E(Interpreter)
		acpi_ns_parse_table
			acpi_ns_one_complete_parse
			acpi_ns_execute_table
				X(Interpreter)
				acpi_ns_load_table
				acpi_ev_initialize_region
				address_space.Setup
				address_space.Handler
				acpi_os_wait_semaphore
				acpi_os_acquire_mutex
				acpi_os_sleep
				E(Interpreter)
	X(Interpreter)
Object evaluation:
acpi_ns_evaluate
	E(Interpreter)
	acpi_ps_execute_method
		X(Interpreter)
		acpi_ns_load_table
		acpi_ev_initialize_region
		address_space.Setup
		address_space.Handler
		acpi_os_wait_semaphore
		acpi_os_acquire_mutex
		acpi_os_sleep
		E(Interpreter)
	X(Interpreter)
Where:
  1. E(Interpreter) means acquire(MTX_INTERPRETER, MTX_NAMESPACE);
  2. X(Interpreter) means release(MTX_NAMESPACE, MTX_INTERPRETER);

After this change, we can see:
1. All namespace nodes creations are locked by the namespace lock.
2. All namespace nodes referencing are locked with the same lock.
3. But we also can notice a defact that, all namespace nodes deletions
   could be affected by this change. As a consequence,
   acpi_ns_delete_namespace_subtree() may delete a static namespace node that
   is still referenced by the interpreter (for example, the parser scopes).
Currently, we needn't worry about the last defact because in ACPICA, table
unloading is not fully functioning, its design strictly relies on the fact
that when the namespace deletion happens, either the AML table or the OSPMs
should have been notified and thus either the AML table or the OSPMs
shouldn't reference deletion-related namespace nodes during the namespace
deletion. And this change still works with the above restrictions applied.
While making this a-step-forward helps us to correct the wrong grammar to
pull many things back to the correct rail. And pulling things back to the
correct rail in return makes it possible for us to support fully
functioning table unloading after doing many cleanups.

While this patch is generated, all namespace locks are examined to ensure
that they can meet either of the following pattens:
1. L(Namespace)
   U(Namespace)
2. E(Interpreter)
   X(Interpreter)
3. E(Interpreter)
   X(Interpreter)
   L(Namespace)
   U(Namespace)
   E(Interpreter)
   X(Interpreter)
We ensure this by adding X(Interpreter)/E(Interpreter) or removing
U(Namespace)/L(Namespace) for those currently are executed in the following
order:
   E(Interpreter)
   L(Namespace)
   U(Namespace)
   X(Interpreter)
And adding E(Interpreter)/X(Interpreter) for those currently are executed
in the following order:
   X(Interpreter)
   E(Interpreter)

Originally, the interpreter lock is held for the execution AML opcodes, the
namespace lock is held for the named object creation AML opcodes. Since
they are actually same in MS interpreter (can all be executed during the
table loading), we can combine the 2 locks and tune the locking code better
in this way. Lv Zheng.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=153541 # [1]
Link: https://bugzilla.kernel.org/show_bug.cgi?id=121701 # [1]
Link: https://bugs.acpica.org/show_bug.cgi?id=1323
Link: https://github.com/acpica/acpica/commit/767ee533Reported-and-tested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Reported-and-tested-by: NGreg White <gwhite@kupulau.com>
Reported-and-tested-by: NDutch Guy <lucht_piloot@gmx.net>
Signed-off-by: NLv Zheng <lv.zheng@intel.com>
Signed-off-by: NBob Moore <robert.moore@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      74f51b80
    • L
      ACPICA: Namespace: Add acpi_ns_get_node_unlocked() · c2d981aa
      由 Lv Zheng 提交于 
      ACPICA commit 3ef1a1bf5612fe1a629424c09eaaeb6f299d313c

Add acpi_ns_get_node_unlocked() to be used when ACPI_MTX_NAMESPACE is
locked. Lv Zheng.

Link: https://github.com/acpica/acpica/commit/3ef1a1bfTested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Tested-by: NGreg White <gwhite@kupulau.com>
Tested-by: NDutch Guy <lucht_piloot@gmx.net>
Signed-off-by: NLv Zheng <lv.zheng@intel.com>
Signed-off-by: NBob Moore <robert.moore@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      c2d981aa
    • L
      ACPICA: Interpreter: Fix MLC issues by switching to new term_list grammar for table loading · de56ba95
      由 Lv Zheng 提交于 
      ACPICA commit 0e24fb67cde08d7df7671d7d7b183490dc79707e

The MLC (Module Level Code) is an ACPICA terminology describing the AML
code out of any control method, its support is an indication of the
interpreter behavior during the table loading.

The original implementation of MLC in ACPICA had several issues:
1. Out of any control method, besides of the object creating opcodes, only
   the code blocks wrapped by "If/Else/While" opcodes were supported.
2. The supported MLC code blocks were executed after loading the table
   rather than being executed right in place.
   ============================================================
   The demo of this order issue is as follows:
     Name (OBJ1, 1)
     If (CND1 == 1)
     {
       Name (OBJ2, 2)
     }
     Name (OBJ3, 3)
   The original MLC support created OBJ2 after OBJ3's creation.
   ============================================================
Other than these limitations, MLC support in ACPICA looks correct. And
supporting this should be easy/natural for ACPICA, but enabling of this was
blocked by some ACPICA internal and OSPM specific initialization order
issues we've fixed recently. The wrong support started from the following
false bug fixing commit:
  Commit: 7f0c826a
  Subject: ACPICA: Add support for module-level executable AML code
  Commit: 9a884ab6
  Subject: ACPICA: Add additional module-level code support
  ...

We can confirm Windows interpreter behavior via reverse engineering means.
It can be proven that not only If/Else/While wrapped code blocks, all
opcodes can be executed at the module level, including operation region
accesses. And it can be proven that the MLC should be executed right in
place, not in such a deferred way executed after loading the table.

And the above facts indeed reflect the spec words around ACPI definition
block tables (DSDT/SSDT/...), the entire table and the Scope object is
defined by the AML specification in BNF style as:
  AMLCode := def_block_header term_list
  def_scope := scope_op pkg_length name_string term_list
The bodies of the scope opening terms (AMLCode/Scope) are all term_list,
thus the table loading should be no difference than the control method
evaluations as the body of the Method is also defined by the AML
specification as term_list:
  def_method := method_op pkg_length name_string method_flags term_list
The only difference is: after evaluating control method, created named
objects may be freed due to no reference, while named objects created by
the table loading should only be freed after unloading the table.

So this patch follows the spec and the de-facto standard behavior, enables
the new grammar (term_list) for the table loading.

By doing so, beyond the fixes to the above issues, we can see additional
differences comparing to the old grammar based table loading:
1. Originally, beyond the scope opening terms (AMLCode/Scope),
   If/Else/While wrapped code blocks under the scope creating terms
   (Device/power_resource/Processor/thermal_zone) are also supported as
   deferred MLC, which violates the spec defined grammar where object_list
   is enforced. With MLC support improved as non-deferred, the interpreter
   parses such scope creating terms as term_list rather object_list like the
   scope opening terms.
   After probing the Windows behavior and proving that it also parses these
   terms as term_list, we submitted an ECR (Engineering Change Request) to
   the ASWG (ACPI Specification Working Group) to clarify this. The ECR is
   titled as "ASL Grammar Clarification for Executable AML Opcodes" and has
   been accepted by the ASWG. The new grammar will appear in ACPI
   specification 6.2.
2. Originally, Buffer/Package/operation_region/create_XXXField/bank_field
   arguments are evaluated in a deferred way after loading the table. With
   MLC support improved, they are also parsed right in place during the
   table loading.
   This is also Windows compliant and the only difference is the removal
   of the debugging messages implemented before acpi_ds_execute_arguments(),
   see Link # [1] for the details. A previous commit should have ensured
   that acpi_check_address_range() won't regress.

Note that enabling this feature may cause regressions due to long term
Linux ACPI support on top of the wrong grammar. So this patch also prepares
a global option to be used to roll back to the old grammar during the
period between a regression is reported and the regression is
root-cause-fixed. Lv Zheng.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=112911 # [1]
Link: https://bugzilla.kernel.org/show_bug.cgi?id=117671 # [1]
Link: https://bugzilla.kernel.org/show_bug.cgi?id=153541 # [1]
Link: https://github.com/acpica/acpica/issues/122
Link: https://bugs.acpica.org/show_bug.cgi?id=963
Link: https://github.com/acpica/acpica/commit/0e24fb67Reported-and-tested-by: NChris Bainbridge <chris.bainbridge@gmail.com>
Reported-by: NEhsan <dashesy@gmail.com>
Reported-and-tested-by: NDutch Guy <lucht_piloot@gmx.net>
Tested-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NLv Zheng <lv.zheng@intel.com>
Signed-off-by: NBob Moore <robert.moore@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      de56ba95
    • B
      ACPICA: Update return value for intenal _OSI method · 955f485d
      由 Bob Moore 提交于 
      ACPICA commit 82101009c7c04845edb3495e66a274a613758bca

Instead of 0xFFFFFFFF, _OSI is now defined to return "Ones".
This is for compatibility with Windows. The ACPI spec will
be updated to reflect this.

Link: https://github.com/acpica/acpica/commit/82101009Reported-by: NDaniel Drake <drake@endlessm.com>
Signed-off-by: NBob Moore <robert.moore@intel.com>
Signed-off-by: NLv Zheng <lv.zheng@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      955f485d
    • L
      ACPICA: Tables: Override all 64-bit GAS fields when acpi_gbl_use32_bit_fadt_addresses is TRUE · 4e0b26d3
      由 Lv Zheng 提交于 
      ACPICA commit aaace77db4c3b267a65b75c33f84ace6f65bbcf7

Originally, when acpi_gbl_use32_bit_fadt_addresses is TRUE, GAS override can
only happen when the Address field mismatches.

According to the investigation result, Windows may favor 32-bit FADT
addresses in some cases. So we need this quirk working after enabling full
GAS support. This requires us to override GAS access_size/bit_width/bit_offset
fields as long as acpi_gbl_use32_bit_fadt_addresses is TRUE.
This patch enhances this quirk mechanism to make it working with full GAS
support. Lv Zheng.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=151501
Link: https://github.com/acpica/acpica/commit/aaace77dReported-and-tested-by: NAndrey Skvortsov <andrej.skvortzov@gmail.com>
Signed-off-by: NLv Zheng <lv.zheng@intel.com>
Signed-off-by: NBob Moore <robert.moore@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      4e0b26d3