1. 22 1月, 2011 3 次提交
    • D
      msm: Generalize QGIC registers · 8bb06444
      David Brown 提交于
      The QGIC registers are mapped to the same virtual addresses across
      targets, only the physical address changes.  Move the BASE address out
      of target-specific files, and add a SOC name to the base addresses.
      Signed-off-by: NDavid Brown <davidb@codeaurora.org>
      8bb06444
    • D
      msm: Generalize timer register mappings · 8c27e6f3
      David Brown 提交于
      Allow the timer register to be determined dynamically instead of at
      compile time.  Use common virtual addresses for the registers across
      all MSM chips, and select the register mappings based on the detected
      CPU.
      Signed-off-by: NDavid Brown <davidb@codeaurora.org>
      8c27e6f3
    • D
      msm: Add CPU queries · 87fa28e9
      David Brown 提交于
      Create runtime queries to distinguish the various MSM targets.
      Although these would probably be better named soc_is..., use
      cpu_is... to match convention in the rest of the kernel.
      
      Hard code the tests based on config options for now.  When runtime
      device detection is implemented, these can be made dynamic.
      Signed-off-by: NDavid Brown <davidb@codeaurora.org>
      87fa28e9
  2. 19 1月, 2011 37 次提交
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