- 25 1月, 2019 5 次提交
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由 Taniya Das 提交于
The clocks of the CPUSS such as "gcc_cpuss_ahb_clk_src" is a CRITICAL clock and needs to vote on the active only source of XO, so as to keep the vote as long as CPUSS is active. Similar rbcpr_clk_src is also has the same requirement. Signed-off-by: NTaniya Das <tdas@codeaurora.org> Fixes: 06391edd ("clk: qcom: Add Global Clock controller (GCC) driver for SDM845") Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Dan Carpenter 提交于
The ti_clk_parse_divider_data() function is only called from _get_div_table_from_setup(). That function doesn't look at the return value but instead looks at the "*table" pointer. In this case, if the kcalloc() fails then *table is NULL (which means success). It should instead be an error pointer. The ti_clk_parse_divider_data() function has two callers. One checks for errors and the other doesn't. I have fixed it so now both handle errors. Fixes: 4f6be565 ("clk: ti: divider: add driver internal API for parsing divider data") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Acked-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Abel Vesa 提交于
Before multiplying by PLL_FRAC_DENOM, the temp64 needs to be temp64 = rate * 2 - divfi * parent_rate * 8, instead of: temp64 = (rate * 2 - divfi) * parent_rate Fixes: 6209624b ("clk: imx: Add fractional PLL output clock") Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Derek Basehore 提交于
It's not required to traverse the entire clk tree when the parents array contains a NULL value. We already have the parent clk_core pointer, so we can just compare the parent->name and parent_names[i] pointers. This can be a substantial power improvement in cases where the parent clk isn't known and that clk is never registered, because a mux having an unregistered parent name may traverse the clk tree on every clk_set_rate() call in clk_mux_determine_rate_flags(). This can happen hundreds of times a second for CPU clks. This patch is the combination of reverting commit 470b5e2f ("clk: simplify clk_fetch_parent_index() function") and optimizing the resulting code to never call __clk_lookup() because we already have the clk_core pointer we're looking for. That optimization went unnoticed even after commit da0f0b2c ("clk: Correct lookup logic in clk_fetch_parent_index()") tried to optimize this path. Signed-off-by: NDerek Basehore <dbasehore@chromium.org> [sboyd@kernel.org: More description in commit text] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Lubomir Rintel 提交于
It seems that the kernel has no business managing this clock: once the SP clock is disabled, it's not sufficient to just enable in order to bring the SP core back up. Just let the firmware keep it enabled and don't expose it to drivers. This reverts commit fc27c239. Link: https://lore.kernel.org/lkml/154783267051.169631.3197836544646625747@swboyd.mtv.corp.google.com/Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 16 1月, 2019 1 次提交
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由 Dinh Nguyen 提交于
The fixed clocks in the DTS file have a hyphen, but the clock driver has the fixed clocks using underbar. Thus the clock driver cannot detect the other fixed clocks correctly. Change the fixed clock names to a hyphen. Fixes: 07afb8db ("clk: socfpga: stratix10: add clock driver for Stratix10 platform") Cc: linux-stable@vger.kernel.org Signed-off-by: NDinh Nguyen <dinguyen@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 12 1月, 2019 2 次提交
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由 Dinh Nguyen 提交于
The main PLL calculation has a mistake. We should be using the multiplying the VCO frequency, not the parent clock frequency. Fixes: 07afb8db ("clk: socfpga: stratix10: add clock driver for Stratix10 platform") Cc: linux-stable@vger.kernel.org Signed-off-by: NDinh Nguyen <dinguyen@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Marc Gonzalez 提交于
If QCOM_GDSC is disabled, gdsc_register() returns -ENOSYS, which causes gcc_msm8998_probe() to fail. Select QCOM_GDSC to solve the problem. gcc-msm8998: probe of 100000.clock-controller failed with error -38 Signed-off-by: NMarc Gonzalez <marc.w.gonzalez@free.fr> Fixes: b5f5f525 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver") Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 10 1月, 2019 6 次提交
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由 Marek Vasut 提交于
In case the upstream clock are not set, which can happen in case the VC5 has no valid upstream clock, the $src variable is used uninited by regmap_update_bits(). Check for this condition and return -EINVAL in such case. Note that in case the VC5 has no valid upstream clock, the VC5 can not operate correctly. That is a hardware property of the VC5. The internal oscilator present in some VC5 models is also considered upstream clock. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Firago <alexey_firago@mentor.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-renesas-soc@vger.kernel.org [sboyd@kernel.org: Added comment about probe preventing this from happening in the first place] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Lubomir Rintel 提交于
Add a missing comma so that the output is valid JSON format again. Fixes: 9fba738a ("clk: add duty cycle support") Signed-off-by: NLubomir Rintel <lkundrak@v3.sk> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Abel Vesa 提交于
Commit d360b130 ("clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant") introduced this duplicate and incorrectly ordered kconfig include. Fixes: d360b130 ("clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant") Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Reviewed-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Gustavo A. R. Silva 提交于
Fix memory allocation and use struct_size() in kzalloc(). This also fixes the allocation size to be correct, and smaller, because before we were allocating a bunch of sizeof(struct clk_hw_onecell_data) structures for each struct clk_hw we needed. Fixes: 3fde0e16 ("drivers: clk: Add ZynqMP clock driver") Cc: stable@vger.kernel.org Signed-off-by: NGustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: NMichal Simek <michal.simek@xilinx.com> [sboyd@kernel.org: Expand commit text] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Dan Carpenter 提交于
If tegra_dfll_unregister() fails then "soc" is an error pointer. We should just return instead of dereferencing it. Fixes: 1752c9ee ("clk: tegra: dfll: Fix drvdata overwriting issue") Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Wei Yongjun 提交于
platform_get_resource() may fail and return NULL, so we should better check it's return value to avoid a NULL pointer dereference a bit later in the code. This is detected by Coccinelle semantic patch. @@ expression pdev, res, n, t, e, e1, e2; @@ res = platform_get_resource(pdev, t, n); + if (!res) + return -EINVAL; ... when != res == NULL e = devm_ioremap(e1, res->start, e2); Fixes: 1e3121bf ("clk: imx: add imx8qxp lpcg driver") Signed-off-by: NWei Yongjun <weiyongjun1@huawei.com> Reviewed-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 29 12月, 2018 1 次提交
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由 Aisheng Dong 提交于
SCU clock can be used in a similar way by IMX8QXP and IMX8QM SoCs. Let's make the name of clock ID generic to allow other SoCs to reuse the common part. This patch only changes the clock id name and file name, so no functional change. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: devicetree@vger.kernel.org Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Reviewed-by: NFabio Estevam <festevam@gmail.com> Reviewed-by: NRob Herring <robh@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 15 12月, 2018 13 次提交
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由 Anson Huang 提交于
i.MX7ULP has a Cortex-A7 CPU which can run in RUN mode or HSRUN mode, it is controlled in SMC1 module. The RUN mode and HSRUN mode will use different clock source for ARM, "divcore" for RUN mode and "hsrun_divcore" for HSRUN mode, so the control bits in SMC1 module can be abstracted as a HW clock mux, this patch adds HSRUN mode related clocks in SCG1 module and adds "arm" clock in SMC1 module to support RUN mode and HSRUN mode switch. Latest clock tree in RUN mode as below: firc 0 0 0 48000000 0 0 50000 firc_bus_clk 0 0 0 48000000 0 0 50000 hsrun_scs_sel 0 0 0 48000000 0 0 50000 hsrun_divcore 0 0 0 48000000 0 0 50000 sosc 3 3 3 24000000 0 0 50000 spll_pre_sel 1 1 1 24000000 0 0 50000 spll_pre_div 1 1 2 24000000 0 0 50000 spll 1 1 2 528000000 0 0 50000 spll_pfd0 1 1 1 500210526 0 0 50000 spll_pfd_sel 1 1 0 500210526 0 0 50000 spll_sel 1 1 0 500210526 0 0 50000 scs_sel 1 1 0 500210526 0 0 50000 divcore 1 1 0 500210526 0 0 50000 arm 1 1 0 500210526 0 0 50000 Signed-off-by: NAnson Huang <Anson.Huang@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Rob Herring 提交于
Convert string compares of DT node names to use of_node_name_eq helper instead. This removes direct access to the node name pointer. For instances using of_node_cmp, this has the side effect of now using case sensitive comparisons. This should not matter for any FDT based system which all of these are. Cc: Geert Uytterhoeven <geert+renesas@glider.be> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Tero Kristo <t-kristo@ti.com> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: linux-renesas-soc@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NRob Herring <robh@kernel.org> Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> (clk-mstp) Acked-by: Ulf Hansson <ulf.hansson@linaro.org> (ux500) Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Marek Vasut 提交于
Add simple suspend/resume handlers to the driver to restore the chip configuration after resume. It is possible that the chip was configured with non-default values before suspend-resume cycle and that the chip is powered down during this cycle, so the configuration could get lost. Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Firago <alexey_firago@mentor.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: linux-renesas-soc@vger.kernel.org Reviewed-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Jeffrey Hugo 提交于
gcc_lpass_trig_clk is not used downstream, therefore there is no reason to expect it to be needed for clients. Let's remove it because messing with the clock has been observed to cause Linux hangs when the qdss_clk is initialized by rpmcc. Signed-off-by: NJeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: NMarc Gonzalez <marc.w.gonzalez@free.fr> Fixes: 4807c71c (arm64: dts: Add msm8998 SoC and MTP board support) Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Jeffrey Hugo 提交于
Similar to other qcom targets, gcc_mmss_noc_cfg_ahb_clk should not be disabled. Any mmss access depends on this clock, and its been observed that enabling mmssnoc_axi_rpm_clk with rpmcc results in an implicit access to mmss and will crash the system if gcc_mmss_noc_cfg_ahb_clk is disabled. Signed-off-by: NJeffrey Hugo <jhugo@codeaurora.org> Fixes: 4807c71c (arm64: dts: Add msm8998 SoC and MTP board support) Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Robert Yang 提交于
The current behavior is that clk_round_rate would return the same clock rate passed to it for valid PLL configurations. This change will return the exact rate the PLL will provide in accordance with clk API. Signed-off-by: NRobert Yang <decatf@gmail.com> Reviewed-by: NDmitry Osipenko <digetx@gmail.com> Tested-by: NDmitry Osipenko <digetx@gmail.com> Acked-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Jon Hunter 提交于
Rather than using the tegra_powergate_is_powered() function for determining if a CPU is powered, use the tegra_pmc_cpu_is_powered() instead which was created to get the CPU power status. Internally tegra_pmc_cpu_is_powered() calls tegra_powergate_is_powered() and so is equivalent. The Tegra30 clock driver is the only public user of tegra_powergate_is_powered() and so by updating the Tegra30 clock driver to use tegra_pmc_cpu_is_powered(), we can then make tegra_powergate_is_powered() a non-public function. Signed-off-by: NJon Hunter <jonathanh@nvidia.com> Acked-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Jon Hunter 提交于
The maximum frequency supported for I2S on Tegra124 and Tegra210 is 24.576MHz (as stated in the Tegra TK1 data sheet for Tegra124 and the Jetson TX1 module data sheet for Tegra210). However, the maximum I2S frequency is limited to 24MHz because that is the maximum frequency of the audio sync clock. Increase the maximum audio sync clock frequency to 24.576MHz for Tegra124 and Tegra210 in order to support 24.576MHz for I2S. Update the tegra_clk_register_sync_source() function so that it does not set the initial rate for the sync clocks and use the clock init tables to set the initial rate instead. Signed-off-by: NJon Hunter <jonathanh@nvidia.com> Acked-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Marcel Ziswiler 提交于
Get rid of 3 duplicate defines. Signed-off-by: NMarcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Aisheng Dong 提交于
Add imx8qxp lpcg driver support Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Aisheng Dong 提交于
The Low-Power Clock Gate (LPCG) modules contain a local programming model to control the clock gates for the peripherals. An LPCG module is used to locally gate the clocks for the associated peripheral. And they're bedind the SCU clock. Cc: Stephen Boyd <sboyd@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Aisheng Dong 提交于
Add imx8qxp clk driver which is based on SCU firmware clock service. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Move the makefile rule higher in the file] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Abel Vesa 提交于
Remove the dependency between the i.MX8MQ CCM clock driver and the CONFIG_SOC_IMX8MQ and use CONFIG_CLK_IMX8MQ instead. CONFIG_CLK_IMX8MQ depends on ARCH_MXC && ARM64. Signed-off-by: NAbel Vesa <abel.vesa@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 14 12月, 2018 2 次提交
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由 Aisheng Dong 提交于
Add SCU clock common part which will be used by client clock drivers. SCU clocks are totally different from the legacy clocks (No much legacy things can be reused), it's using a firmware interface now based on SCU protocol. So a new configuration option CONFIG_MXC_CLK_SCU is added. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> [sboyd@kernel.org: Mark ccm_ipc_handle static] Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Aisheng Dong 提交于
The patch introduces CONFIG_MXC_CLK option for legacy MMIO clocks, this is required to compile legacy MMIO clock conditionally when adding SCU based clocks for MX8 platforms later. Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Michael Turquette <mturquette@baylibre.com> Signed-off-by: NDong Aisheng <aisheng.dong@nxp.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 12 12月, 2018 3 次提交
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由 Jeffrey Hugo 提交于
commit c0cb7c7e ("clk: qcom: Enumerate remaining msm8998 resets") missed two USB2 resets. Add them. Fixes: c0cb7c7e ("clk: qcom: Enumerate remaining msm8998 resets") Signed-off-by: NJeffrey Hugo <jhugo@codeaurora.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Stephen Boyd 提交于
These are all GPL-2.0 files per the existing license text. Replace the boiler plate with the tag. Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Stephen Boyd 提交于
These are all GPL-2.0 files per the existing license text. Replace the boiler plate with the tag. Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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- 11 12月, 2018 7 次提交
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由 Jerome Brunet 提交于
Rework the axg audio clock controller to use the new clk-input helper function. Signed-off-by: NJerome Brunet <jbrunet@baylibre.com> Reviewed-by: NNeil Armstrong <narmstrong@baylibre.com> Signed-off-by: NNeil Armstrong <narmstrong@baylibre.com> [narmstrong: fixed pclk input clock name to axg_audio_pclk] Link: http://lkml.kernel.org/r/20181204165819.21541-3-jbrunet@baylibre.com
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由 Stephen Boyd 提交于
This flag doesn't look to be used by any code, just set in the clk init structure and then never tested again. Remove it from this driver as it doesn't provide any benefit. Also remove parenthesis nearby that are not needed and include clk.h to fix a sparse warning about static function definition. Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Stephen Boyd 提交于
This flag doesn't look to be used by any code, just set in the clk init structure and then never tested again. Remove it from this drivers as it doesn't provide any benefit. Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: NKrzysztof Kozlowski <krzk@kernel.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Stephen Boyd 提交于
This flag doesn't look to be used by any code, just set in the clk init structure and then never tested again. Remove it from this driver as it doesn't provide any benefit. Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Stephen Boyd 提交于
This flag doesn't look to be used by any code, just set in various clk init structures and then never tested again. Remove it from these drivers as it doesn't provide any benefit. Cc: Jiancheng Xue <xuejiancheng@hisilicon.com> Cc: Leo Yan <leo.yan@linaro.org> Cc: Jianguo Sun <sunjianguo1@huawei.com> Cc: Wei Yongjun <weiyongjun1@huawei.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Stephen Boyd 提交于
This flag doesn't look to be used by any code, just set in various clk init structures and then never tested again. Remove it from these drivers as it doesn't provide any benefit. Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: <uclinux-h8-devel@lists.sourceforge.jp> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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由 Stephen Boyd 提交于
This flag doesn't look to be used by any code, just set in various clk init structures and then never tested again. Remove it from these drivers as it doesn't provide any benefit. Cc: Anders Berg <anders.berg@lsi.com> Signed-off-by: NStephen Boyd <sboyd@kernel.org>
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