1. 22 9月, 2016 3 次提交
  2. 13 9月, 2016 3 次提交
  3. 01 7月, 2016 1 次提交
  4. 24 6月, 2016 4 次提交
  5. 19 5月, 2016 1 次提交
  6. 03 5月, 2016 1 次提交
  7. 17 8月, 2015 1 次提交
  8. 18 5月, 2015 1 次提交
  9. 15 5月, 2015 1 次提交
  10. 03 4月, 2015 1 次提交
    • V
      crypto: omap-sham - Add the offset of sg page to vaddr · 13cf394c
      Vutla, Lokesh 提交于
      kmap_atomic() gives only the page address of the input page.
      Driver should take care of adding the offset of the scatterlist
      within the page to the returned page address.
      omap-sham driver is not adding the offset to page and directly operates
      on the return vale of kmap_atomic(), because of which the following
      error comes when running crypto tests:
      
      00000000: d9 a1 1b 7c aa 90 3b aa 11 ab cb 25 00 b8 ac bf
      [    2.338169] 00000010: c1 39 cd ff 48 d0 a8 e2 2b fa 33 a1
      [    2.344008] alg: hash: Chunking test 1 failed for omap-sha256
      
      So adding the scatterlist offset to vaddr.
      Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      13cf394c
  11. 01 4月, 2015 1 次提交
  12. 20 10月, 2014 1 次提交
  13. 14 10月, 2014 1 次提交
  14. 10 3月, 2014 2 次提交
  15. 20 12月, 2013 1 次提交
    • L
      crypto: omap-sham - Fix Polling mode for larger blocks · acef7b0f
      Lokesh Vutla 提交于
      Command "tcrypt sec=1 mode=403" give the follwoing error for Polling
      mode:
      root@am335x-evm:/# insmod tcrypt.ko sec=1 mode=403
      [...]
      
      [  346.982754] test 15 ( 4096 byte blocks, 1024 bytes per update,   4 updates):   4352 opers/sec,  17825792 bytes/sec
      [  347.992661] test 16 ( 4096 byte blocks, 4096 bytes per update,   1 updates):   7095 opers/sec,  29061120 bytes/sec
      [  349.002667] test 17 ( 8192 byte blocks,   16 bytes per update, 512 updates):
      [  349.010882] Unable to handle kernel NULL pointer dereference at virtual address 00000000
      [  349.020037] pgd = ddeac000
      [  349.022884] [00000000] *pgd=9dcb4831, *pte=00000000, *ppte=00000000
      [  349.029816] Internal error: Oops: 17 [#1] PREEMPT SMP ARM
      [  349.035482] Modules linked in: tcrypt(+)
      [  349.039617] CPU: 0 PID: 1473 Comm: insmod Not tainted 3.12.4-01566-g6279006-dirty #38
      [  349.047832] task: dda91540 ti: ddcd2000 task.ti: ddcd2000
      [  349.053517] PC is at omap_sham_xmit_dma+0x6c/0x238
      [  349.058544] LR is at omap_sham_xmit_dma+0x38/0x238
      [  349.063570] pc : [<c04eb7cc>]    lr : [<c04eb798>]    psr: 20000013
      [  349.063570] sp : ddcd3c78  ip : 00000000  fp : 9d8980b8
      [  349.075610] r10: 00000000  r9 : 00000000  r8 : 00000000
      [  349.081090] r7 : 00001000  r6 : dd898000  r5 : 00000040  r4 : ddb10550
      [  349.087935] r3 : 00000004  r2 : 00000010  r1 : 53100080  r0 : 00000000
      [  349.094783] Flags: nzCv  IRQs on  FIQs on  Mode SVC_32  ISA ARM  Segment user
      [  349.102268] Control: 10c5387d  Table: 9deac019  DAC: 00000015
      [  349.108294] Process insmod (pid: 1473, stack limit = 0xddcd2248)
      
      [...]
      
      This is because polling_mode is not enabled for ctx without FLAGS_FINUP.
      
      For polling mode the bufcnt is made 0 unconditionally. But it should be made 0
      only if it is a final update or a total is not zero(This condition is similar
      to what is done in DMA case). Because of this wrong hashes are produced.
      
      Fixing the same.
      Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      acef7b0f
  16. 05 12月, 2013 1 次提交
  17. 30 10月, 2013 1 次提交
  18. 24 10月, 2013 1 次提交
  19. 21 8月, 2013 2 次提交
    • L
      crypto: omap-sham - correct dma burst size · f5e46260
      Lokesh Vutla 提交于
      Each cycle of SHA512 operates on 32 data words where as
      SHA256 operates on 16 data words. This needs to be updated
      while configuring DMA channels. Doing the same.
      Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      f5e46260
    • L
      crypto: omap-sham - Enable Polling mode if DMA fails · b8411ccd
      Lokesh Vutla 提交于
      For writing input buffer into DATA_IN register current driver
      has the following state machine:
      -> if input buffer < 9 : use fallback driver
      -> else if input buffer < block size : Copy input buffer into data_in regs
      -> else use dma transfer.
      
      In cases where requesting for DMA channels fails for some reason,
      or channel numbers are not provided in DT or platform data, probe
      also fails. Instead of returning from driver use cpu polling mode.
      In this mode processor polls on INPUT_READY bit and writes data into
      data_in regs when it equals 1. This operation is repeated until the
      length of message.
      
      Now the state machine looks like:
      -> if input buffer < 9 : use fallback driver
      -> else if input buffer < block size : Copy input buffer into data_in regs
      -> else if dma enabled: use dma transfer
      	   else use cpu polling mode.
      Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      b8411ccd
  20. 01 8月, 2013 4 次提交
  21. 24 5月, 2013 1 次提交
  22. 10 3月, 2013 2 次提交
  23. 20 1月, 2013 1 次提交
  24. 12 1月, 2013 1 次提交
    • T
      ARM: OMAP2+: Disable code that currently does not work with multiplaform · a62a6e98
      Tony Lindgren 提交于
      We still need to fix up few places for multiplatform support,
      but that can proceed separately. Fix the issue by making the
      problem drivers depends !ARCH_MULTIPLATFORM for now.
      
      The remaining pieces that are not multiplatform compatible
      for omap2+ SoCs are:
      
      1. Some drivers are using custom omap_dm_timer calls
      
      There are two drivers that are directly usign omap hardware
      timers for PWM and DSP clocking: drivers/media/rc/ir-rx51.c and
      drivers/staging/tidspbridge/core/dsp-clock.c. These can be
      fixed for multiplatform by allowing a minimal set of hardware
      timers to be accessed, and for some functionality by using the
      hrtimer framework.
      
      2. Hardware OMAP4_ERRATA_I688 needs to be fixed up
      
      This can't be enabled for multiplatform configurations in
      it's current form. It may be possible to fix it up to do
      instruction replacement early on during init. Luckily it
      looks like this errata does not seem to get hit with
      mainline kernel code alone at least currently.
      
      3. Legacy header needed for omap-sham.c
      
      Looks like it still needs mach/irqs.h for omap1 that
      does not exist for multiplatform systems. Just ifdef
      it for now.
      
      4. Mailbox is waiting to get moved to drivers
      
      Disable it for now to avoid adding a dependency to the
      mailbox patches.
      
      Cc: Timo Kokkonen <timo.t.kokkonen@iki.fi>
      Cc: Sean Young <sean@mess.org>
      Cc: "Víctor Manuel Jáquez Leal" <vjaquez@igalia.com>
      Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
      Cc: Mauro Carvalho Chehab <mchehab@redhat.com>
      Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
      Cc: Herbert Xu <herbert@gondor.apana.org.au>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Santosh Shilimkar <santosh.shilimkar@ti.com>
      Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
      [tony@atomide.com: updated to disable mailbox]
      Signed-off-by: NTony Lindgren <tony@atomide.com>
      a62a6e98
  25. 05 1月, 2013 3 次提交
    • M
      crypto: omap-sham - Add SHA224 and SHA256 Support · d20fb18b
      Mark A. Greer 提交于
      The OMAP4/AM33xx version of the SHAM crypto module
      supports SHA224 and SHA256 in addition to MD5 and
      SHA1 that the OMAP2 version of the module supports.
      
      To add this support, use the platform_data introduced
      in an ealier commit to hold the list of algorithms
      supported by the current module.  The probe routine
      will use that list to register the correct algorithms.
      
      Note: The code being integrated is from the TI AM33xx SDK
      and was written by Greg Turner <gkmturner@gmail.com> and
      Herman Schuurman (current email unknown) while at TI.
      
      CC: Greg Turner <gkmturner@gmail.com>
      CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com>
      Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      d20fb18b
    • M
      crypto: omap-sham - Add OMAP4/AM33XX SHAM Support · 0d373d60
      Mark A. Greer 提交于
      Add support for the OMAP4 version of the SHAM module
      that is present on OMAP4 and AM33xx SoCs.
      
      The modules have several differences including register
      offsets, hardware XORing, and how DMA is triggered.
      To handle these differences, a platform_data structure
      is defined and contains routine pointers, register offsets,
      bit shifts within registers, and flags to indicate whether
      the hardware supports XORing and provides SHA1 results in
      big or little endian.  OMAP2/OMAP3-specific routines are
      suffixed with '_omap2' and OMAP4/AM33xx routines are suffixed
      with '_omap4'.
      
      Note: The code being integrated is from the TI AM33xx SDK
      and was written by Greg Turner <gkmturner@gmail.com> and
      Herman Schuurman (current email unknown) while at TI.
      
      CC: Greg Turner <gkmturner@gmail.com>
      CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com>
      Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      0d373d60
    • M
      crypto: omap-sham - Convert to dma_request_slave_channel_compat() · 0e87e73f
      Mark A. Greer 提交于
      Use the dma_request_slave_channel_compat() call instead of
      the dma_request_channel() call to request a DMA channel.
      This allows the omap-sham driver use different DMA engines.
      
      CC: Dmitry Kasatkin <dmitry.kasatkin@intel.com>
      Signed-off-by: NMark A. Greer <mgreer@animalcreek.com>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      0e87e73f