- 15 10月, 2012 3 次提交
-
-
由 Shawn Guo 提交于
It's really unnecessary to have plat-mxc, and let's merge it into mach-imx. It's pretty much just a bunch of file renaming and Kconfig/Makefile merge. To make the change less invasive, we keep using Kconfig symbol CONFIG_ARCH_MXC for mach-imx sub-architecture. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
-
由 Shawn Guo 提交于
It moves platform device code from plat-mxc into mach-imx. Along with that, header devices-common.h gets moved from plat-mxc/include/mach/ into mach-imx/devices/. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
-
由 Shawn Guo 提交于
The board files in mach-imx are the only users of iomux drivers and headers. Move them into mach-imx from plat-mxc. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NArnd Bergmann <arnd@arndb.de>
-
- 12 9月, 2012 1 次提交
-
-
由 Sascha Hauer 提交于
This also removes mach/clock.h along the way Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@linaro.org> Reviewed-by: NMike Turquette <mturquette@linaro.org>
-
- 11 9月, 2012 1 次提交
-
-
由 Shawn Guo 提交于
With device tree kernel provides the equal support as those imx53 board files, it's time to remove the board files and get imx53 support device tree only. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 24 8月, 2012 1 次提交
-
-
由 Matt Sealey 提交于
Disable building for Efika MX boards by not having any configuration or object file definitions. Signed-off-by: NMatt Sealey <matt@genesi-usa.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 23 8月, 2012 2 次提交
-
-
由 Arnd Bergmann 提交于
The head-v7.S contains a call to the generic cpu_suspend function, which is only available when selected by the i.MX6 code. As pointed out by Shawn Guo, i.MX5 does not actually use any functions defined in head-v7.S. It is also needed only for the i.MX6 power management code and for the SMP code, so we can restrict building this file to situations in which at least one of those two is present. Finally, other platforms with a similar file call it headsmp.S, so we can rename it to the same for consistency. Without this patch, building imx5 standalone results in: arch/arm/mach-imx/built-in.o: In function `v7_cpu_resume': arch/arm/mach-imx/head-v7.S:104: undefined reference to `cpu_resume' Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NShawn Guo <shawn.guo@linaro.org> Cc: Eric Miao <eric.miao@linaro.org> Cc: stable@vger.kernel.org
-
由 Arnd Bergmann 提交于
This moves the imx5 pm code out of the list of unconditionally compiled files for imx5, mirroring what we already do for imx6 and how it was done before the code was move from mach-mx5 to mach-imx in v3.3. Without this patch, building with CONFIG_PM disabled results in: arch/arm/mach-imx/pm-imx5.c:202:116: error: redefinition of 'imx51_pm_init' arch/arm/mach-imx/include/mach-imx/common.h:154:91: note: previous definition of 'imx51_pm_init' was here arch/arm/mach-imx/pm-imx5.c:209:116: error: redefinition of 'imx53_pm_init' arch/arm/mach-imx/include/mach-imx/common.h:155:91: note: previous definition of 'imx53_pm_init' was here Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NShawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: stable@vger.kernel.org
-
- 11 7月, 2012 1 次提交
-
-
由 Denis 'GNUtoo' Carikli 提交于
This patch adds basic devicetree support for i.MX31 based SoCs. Only the UART and interrupts bindings are added. Signed-off-by: NDenis 'GNUtoo' Carikli <GNUtoo@no-log.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 09 5月, 2012 3 次提交
-
-
由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Sascha Hauer 提交于
This patch also adds the SPDIF baud clock mux and dividers. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
- 08 5月, 2012 2 次提交
-
-
由 Eric Bénard 提交于
this makes the mbimxsd51 board naming consistant with others Signed-off-by: NEric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Eric Bénard 提交于
this board is not publicly available and is replaced by cpuimx51sd Signed-off-by: NEric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 02 5月, 2012 11 次提交
-
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Sascha Hauer 提交于
This also changes the DMA clkdev lookup to use the imx-dma driver name and "ahb" as connection ID to request the hclk dma clock. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Sascha Hauer 提交于
Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
-
由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
This gate consists of two bits: 0b00: clk disabled 0b01: clk enabled in run mode and disabled in sleep mode 0b11: clk enabled Currently only disabled and enabled are supported. As it's unlikely that we find something like this in another SoC create a i.MX specific clk helper for this. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Shawn Guo 提交于
This PLL is found on i.MX6 SoCs Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Sascha Hauer 提交于
This PLL is found on i.MX51 and i.MX53 Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Sascha Hauer 提交于
The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35. Currently only reading the rate is supported. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 26 3月, 2012 1 次提交
-
-
由 Javier Martin 提交于
It is mainly a simple merge changing the prefix of some functions to fit the imx-dma namings. As there are no users of the old dma-v1.c api we can safely remove this file. Signed-off-by: NJavier Martin <javier.martin@vista-silicon.com> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NVinod Koul <vinod.koul@linux.intel.com>
-
- 13 3月, 2012 1 次提交
-
-
由 Marc Zyngier 提交于
Add support for the new smp_twd runtime registration interface to the imx6q platforms, and remove the old compile-time support. The imx6q DTS file is updated to match the TWD DT documentation. Also present in this patch a DTS fix to the timer interrupt routing (the PPI connection uses bits [15:8]) and trigger (rising edge). Acked-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>
-
- 02 3月, 2012 1 次提交
-
-
由 Fabio Estevam 提交于
The LPM field of register CCMR is used to select the mode that the processor will run when it goes to WFI. When mx31 enters in WFI mode the LPM field is at its reset value of 0, which configures the mx31 to enter in "wait mode". On mx35, the LPM field on mx35 is also at 0 after reset, which corresponds to "run mode" instead of "wait mode". Instead of relying on the reset value of LPM to set the low power mode for WFI, configure mx31 and mx35 to run in "wait mode" Reported-by: NBenoit Thebaudeau <benoit.thebaudeau@advansee.com> Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 29 2月, 2012 1 次提交
-
-
由 Sascha Hauer 提交于
This patch adds basic devicetree support for i.MX27 based SoCs. Only the bindings for which drivers exist are added here: - UART - fec - CSPI - I2C - watchdog - gpio Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 26 12月, 2011 1 次提交
-
-
由 Eric Miao 提交于
Signed-off-by: NEric Miao <eric.miao@linaro.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 19 12月, 2011 2 次提交
-
-
由 Eric Bénard 提交于
in 0d6cfa3a I fixed the mach-types records. We also need to make the name consistent in Kconfig else the machine_is_eukrea_cpuimx35sd macro fails, and thus audio codec is not properly initalized. Signed-off-by: NEric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Eric Bénard 提交于
in 0d6cfa3a I fixed the mach-types records. We also need to make the name consistent in Kconfig else the machine_is_eukrea_cpuimx25sd macro fails, and thus audio codec is not properly initalized. Signed-off-by: NEric Bénard <eric@eukrea.com> Cc: Sascha Hauer <kernel@pengutronix.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 16 11月, 2011 1 次提交
-
-
由 Sascha Hauer 提交于
This patch moves the contents of arch/arm/mach-mx5 to arch/arm/mach-imx and adjusts the Makefile/Kconfig entries in a way that it's possible to compile i.MX5 together with i.MX3/6. Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Tested-by: NShawn Guo <shawn.guo@linaro.org> Tested-by: NDirk Behme <dirk.behme@de.bosch.com>
-
- 31 10月, 2011 5 次提交
-
-
由 Shawn Guo 提交于
It adds suspend/resume support for imx6q. Signed-off-by: NAnson Huang <b20788@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
It adds generic device tree based machine support for imx6q. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
It adds smp and cpu hotplug support for imx6q. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
It adds a number of core drivers support for imx6q, including clock, General Power Controller (gpc), Multi Mode DDR Controller(mmdc) and System Reset Controller (src). Signed-off-by: NRanjani Vaidyanathan <ra5478@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
It adds the core definitions and low-level debug uart support for imx6q. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 28 9月, 2011 2 次提交
-
-
由 Shawn Guo 提交于
The mxc_init_l2x0() should really be an imx31/35 specific call. The patch removes early_initcall from mxc_init_l2x0() and get imx31 and imx35 soc specific function calls mxc_init_l2x0(), so that it's not necessarily to be called for all imx socs when we build single image for multiple imx socs. Thus the function can be renamed to imx3_init_l2x0() and put into mm-imx3.c. It also changes the return type from integer to void. From what I see, the integer was picked just to satisfy early_initcall prototype. With the patch 'ARM: l2x0: add empty l2x0_of_init' applied, the code compiles even without CONFIG_CACHE_L2X0 enabled. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-
由 Shawn Guo 提交于
Since mm-imx31.c now is shared between imx31 and imx35, the patch renames mm-imx31.c to mm-imx3.c. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
-