1. 30 9月, 2021 1 次提交
  2. 24 9月, 2021 1 次提交
  3. 16 9月, 2021 1 次提交
  4. 15 9月, 2021 2 次提交
  5. 21 8月, 2021 2 次提交
    • M
      drm/amdgpu: Cancel delayed work when GFXOFF is disabled · 32bc8f83
      Michel Dänzer 提交于
      schedule_delayed_work does not push back the work if it was already
      scheduled before, so amdgpu_device_delay_enable_gfx_off ran ~100 ms
      after the first time GFXOFF was disabled and re-enabled, even if GFXOFF
      was disabled and re-enabled again during those 100 ms.
      
      This resulted in frame drops / stutter with the upcoming mutter 41
      release on Navi 14, due to constantly enabling GFXOFF in the HW and
      disabling it again (for getting the GPU clock counter).
      
      To fix this, call cancel_delayed_work_sync when the disable count
      transitions from 0 to 1, and only schedule the delayed work on the
      reverse transition, not if the disable count was already 0. This makes
      sure the delayed work doesn't run at unexpected times, and allows it to
      be lock-free.
      
      v2:
      * Use cancel_delayed_work_sync & mutex_trylock instead of
        mod_delayed_work.
      v3:
      * Make amdgpu_device_delay_enable_gfx_off lock-free (Christian König)
      v4:
      * Fix race condition between amdgpu_gfx_off_ctrl incrementing
        adev->gfx.gfx_off_req_count and amdgpu_device_delay_enable_gfx_off
        checking for it to be 0 (Evan Quan)
      
      Cc: stable@vger.kernel.org
      Reviewed-by: NEvan Quan <evan.quan@amd.com>
      Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> # v3
      Acked-by: Christian König <christian.koenig@amd.com> # v3
      Signed-off-by: NMichel Dänzer <mdaenzer@redhat.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      32bc8f83
    • M
      drm/amdgpu: Cancel delayed work when GFXOFF is disabled · 90a92662
      Michel Dänzer 提交于
      schedule_delayed_work does not push back the work if it was already
      scheduled before, so amdgpu_device_delay_enable_gfx_off ran ~100 ms
      after the first time GFXOFF was disabled and re-enabled, even if GFXOFF
      was disabled and re-enabled again during those 100 ms.
      
      This resulted in frame drops / stutter with the upcoming mutter 41
      release on Navi 14, due to constantly enabling GFXOFF in the HW and
      disabling it again (for getting the GPU clock counter).
      
      To fix this, call cancel_delayed_work_sync when the disable count
      transitions from 0 to 1, and only schedule the delayed work on the
      reverse transition, not if the disable count was already 0. This makes
      sure the delayed work doesn't run at unexpected times, and allows it to
      be lock-free.
      
      v2:
      * Use cancel_delayed_work_sync & mutex_trylock instead of
        mod_delayed_work.
      v3:
      * Make amdgpu_device_delay_enable_gfx_off lock-free (Christian König)
      v4:
      * Fix race condition between amdgpu_gfx_off_ctrl incrementing
        adev->gfx.gfx_off_req_count and amdgpu_device_delay_enable_gfx_off
        checking for it to be 0 (Evan Quan)
      
      Cc: stable@vger.kernel.org
      Reviewed-by: NEvan Quan <evan.quan@amd.com>
      Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> # v3
      Acked-by: Christian König <christian.koenig@amd.com> # v3
      Signed-off-by: NMichel Dänzer <mdaenzer@redhat.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      90a92662
  6. 19 8月, 2021 1 次提交
  7. 17 8月, 2021 1 次提交
    • J
      drm/amd/amdgpu embed hw_fence into amdgpu_job · c530b02f
      Jack Zhang 提交于
      Why: Previously hw fence is alloced separately with job.
      It caused historical lifetime issues and corner cases.
      The ideal situation is to take fence to manage both job
      and fence's lifetime, and simplify the design of gpu-scheduler.
      
      How:
      We propose to embed hw_fence into amdgpu_job.
      1. We cover the normal job submission by this method.
      2. For ib_test, and submit without a parent job keep the
      legacy way to create a hw fence separately.
      v2:
      use AMDGPU_FENCE_FLAG_EMBED_IN_JOB_BIT to show that the fence is
      embedded in a job.
      v3:
      remove redundant variable ring in amdgpu_job
      v4:
      add tdr sequence support for this feature. Add a job_run_counter to
      indicate whether this job is a resubmit job.
      v5
      add missing handling in amdgpu_fence_enable_signaling
      Signed-off-by: NJingwen Chen <Jingwen.Chen2@amd.com>
      Signed-off-by: NJack Zhang <Jack.Zhang7@hotmail.com>
      Reviewed-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com>
      Reviewed by: Monk Liu <monk.liu@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      c530b02f
  8. 10 8月, 2021 1 次提交
  9. 06 8月, 2021 1 次提交
  10. 29 7月, 2021 1 次提交
  11. 27 7月, 2021 1 次提交
    • J
      drm/amdgpu: Fix resource leak on probe error path · d47255d3
      Jiri Kosina 提交于
      This reverts commit 4192f7b5.
      
      It is not true (as stated in the reverted commit changelog) that we never
      unmap the BAR on failure; it actually does happen properly on
      amdgpu_driver_load_kms() -> amdgpu_driver_unload_kms() ->
      amdgpu_device_fini() error path.
      
      What's worse, this commit actually completely breaks resource freeing on
      probe failure (like e.g. failure to load microcode), as
      amdgpu_driver_unload_kms() notices adev->rmmio being NULL and bails too
      early, leaving all the resources that'd normally be freed in
      amdgpu_acpi_fini() and amdgpu_device_fini() still hanging around, leading
      to all sorts of oopses when someone tries to, for example, access the
      sysfs and procfs resources which are still around while the driver is
      gone.
      
      Fixes: 4192f7b5 ("drm/amdgpu: unmap register bar on device init failure")
      Reported-by: NVojtech Pavlik <vojtech@ucw.cz>
      Signed-off-by: NJiri Kosina <jkosina@suse.cz>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      Cc: stable@vger.kernel.org
      d47255d3
  12. 23 7月, 2021 5 次提交
  13. 21 7月, 2021 3 次提交
  14. 17 7月, 2021 1 次提交
  15. 02 7月, 2021 1 次提交
    • J
      drm/amdgpu: Fix resource leak on probe error path · 4ef87d8f
      Jiri Kosina 提交于
      This reverts commit 4192f7b5.
      
      It is not true (as stated in the reverted commit changelog) that we never
      unmap the BAR on failure; it actually does happen properly on
      amdgpu_driver_load_kms() -> amdgpu_driver_unload_kms() ->
      amdgpu_device_fini() error path.
      
      What's worse, this commit actually completely breaks resource freeing on
      probe failure (like e.g. failure to load microcode), as
      amdgpu_driver_unload_kms() notices adev->rmmio being NULL and bails too
      early, leaving all the resources that'd normally be freed in
      amdgpu_acpi_fini() and amdgpu_device_fini() still hanging around, leading
      to all sorts of oopses when someone tries to, for example, access the
      sysfs and procfs resources which are still around while the driver is
      gone.
      
      Fixes: 4192f7b5 ("drm/amdgpu: unmap register bar on device init failure")
      Reported-by: NVojtech Pavlik <vojtech@ucw.cz>
      Signed-off-by: NJiri Kosina <jkosina@suse.cz>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      4ef87d8f
  16. 01 7月, 2021 1 次提交
  17. 30 6月, 2021 1 次提交
  18. 16 6月, 2021 1 次提交
  19. 05 6月, 2021 4 次提交
  20. 03 6月, 2021 1 次提交
  21. 02 6月, 2021 2 次提交
  22. 28 5月, 2021 1 次提交
    • L
      drm/amd/amdgpu/amdgpu_device: Make local function static · 9d8d96be
      Lee Jones 提交于
      Fixes the following W=1 kernel build warning(s):
      
       drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4624:6: warning: no previous prototype for ‘amdgpu_device_recheck_guilty_jobs’ [-Wmissing-prototypes]
      
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Cc: "Christian König" <christian.koenig@amd.com>
      Cc: David Airlie <airlied@linux.ie>
      Cc: Daniel Vetter <daniel@ffwll.ch>
      Cc: Sumit Semwal <sumit.semwal@linaro.org>
      Cc: amd-gfx@lists.freedesktop.org
      Cc: dri-devel@lists.freedesktop.org
      Cc: linux-media@vger.kernel.org
      Cc: linaro-mm-sig@lists.linaro.org
      Signed-off-by: NLee Jones <lee.jones@linaro.org>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      9d8d96be
  23. 26 5月, 2021 2 次提交
  24. 25 5月, 2021 1 次提交
  25. 21 5月, 2021 1 次提交
    • P
      drm/amdgpu: Indirect register access for Navi12 sriov · a5504e9a
      Peng Ju Zhou 提交于
      This patch series are used for GC/MMHUB(part)/IH_RB_CNTL
      indirect access in the SRIOV environment.
      
      There are 4 bits, controlled by host, to control
      if GC/MMHUB(part)/IH_RB_CNTL indirect access enabled.
      (one bit is master bit controls other 3 bits)
      
      For GC registers, changing all the register access from MMIO to
      RLC and use RLC as the default access method in the full access time.
      
      For partial MMHUB registers, changing their access from MMIO to
      RLC in the full access time, the remaining registers
      keep the original access method.
      
      For IH_RB_CNTL register, changing it's access from MMIO to PSP.
      Signed-off-by: NPeng Ju Zhou <PengJu.Zhou@amd.com>
      Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
      a5504e9a
  26. 20 5月, 2021 2 次提交