Cleanup the coding style and function names to represent the data
they process. Only initialize and cleanup the CS structure in
init/fini.

Check the size of the IB chunk in pass1.

v2: fix job initialisation order and use correct scheduler instance
v3: try to move all functional changes into a separate patch.
v4: move reordering and pass2 out of this patch as well
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Use DMA_RESV_USAGE_BOOKKEEP for VM page table updates and KFD preemption fence.

v2: actually update all usages for KFD
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This reverts commit 94f4c496.

We found that the bo_list is missing a protection for its list entries.
Since that is fixed now this workaround can be removed again.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Move setting the job resources into amdgpu_job.c
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAndrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: NLuben Tuikov <luben.tuikov@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We should not have any different CS constrains based
on the execution environment.
Signed-off-by: NChristian König <christian.koenig@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This function consumes a lot of stack space and it blows up the size of
dml30_ModeSupportAndSystemConfigurationFull() with clang:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn30/display_mode_vba_30.c:3542:6: error: stack frame size (2200) exceeds limit (2048) in 'dml30_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml30_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
       ^
  1 error generated.

Commit a0f7e7f7 ("drm/amd/display: fix i386 frame size warning")
aimed to address this for i386 but it did not help x86_64.

To reduce the amount of stack space that
dml30_ModeSupportAndSystemConfigurationFull() uses, mark
UseMinimumDCFCLK() as noinline, using the _for_stack variant for
documentation. While this will increase the total amount of stack usage
between the two functions (1632 and 1304 bytes respectively), it will
make sure both stay below the limit of 2048 bytes for these files. The
aforementioned change does help reduce UseMinimumDCFCLK()'s stack usage
so it should not be reverted in favor of this change.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681Reported-by: N"Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: NMaíra Canal <mairacanal@riseup.net>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NNathan Chancellor <nathan@kernel.org>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Most of the arguments are identical between the two call sites and they
can be accessed through the 'struct vba_vars_st' pointer. This reduces
the total amount of stack space that
dml31_ModeSupportAndSystemConfigurationFull() uses by 112 bytes with
LLVM 16 (1976 -> 1864), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6: error: stack frame size (2216) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
      ^
  1 error generated.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681Reported-by: N"Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: NMaíra Canal <mairacanal@riseup.net>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NNathan Chancellor <nathan@kernel.org>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drm/amd/display: Reduce number of arguments of dml31's CalculateWatermarksAndDRAMSpeedChangeSupport()

Most of the arguments are identical between the two call sites and they
can be accessed through the 'struct vba_vars_st' pointer. This reduces
the total amount of stack space that
dml31_ModeSupportAndSystemConfigurationFull() uses by 240 bytes with
LLVM 16 (2216 -> 1976), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn31/display_mode_vba_31.c:3908:6: error: stack frame size (2216) exceeds limit (2048) in 'dml31_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml31_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
      ^
  1 error generated.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681Reported-by: N"Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: NMaíra Canal <mairacanal@riseup.net>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NNathan Chancellor <nathan@kernel.org>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Several of the arguments are identical between the two call sites and
they can be accessed through the 'struct vba_vars_st' pointer. This
reduces the total amount of stack space that
dml32_ModeSupportAndSystemConfigurationFull() uses by 208 bytes with
LLVM 16 (1936 -> 1728), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1721:6: error: stack frame size (2152) exceeds limit (2048) in 'dml32_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
       ^
  1 error generated.

Additionally, while modifying the arguments to
dml32_CalculatePrefetchSchedule(), use 'v' consistently, instead of 'v'
mixed with 'mode_lib->vba'.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681Reported-by: N"Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: NMaíra Canal <mairacanal@riseup.net>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NNathan Chancellor <nathan@kernel.org>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

drm/amd/display: Reduce number of arguments of dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport()

Most of the arguments are identical between the two call sites and they
can be accessed through the 'struct vba_vars_st' pointer created at the
top of dml32_ModeSupportAndSystemConfigurationFull(). This reduces the
total amount of stack space that
dml32_ModeSupportAndSystemConfigurationFull() uses by 216 bytes with
LLVM 16 (2152 -> 1936), helping clear up the following clang warning:

  drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba_32.c:1721:6: error: stack frame size (2152) exceeds limit (2048) in 'dml32_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than]
  void dml32_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_lib)
       ^
  1 error generated.

Additionally, while modifying the arguments to
dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport(), use 'v'
consistently, instead of 'v' mixed with 'mode_lib->vba'.

Link: https://github.com/ClangBuiltLinux/linux/issues/1681Reported-by: N"Sudip Mukherjee (Codethink)" <sudipm.mukherjee@gmail.com>
Tested-by: NMaíra Canal <mairacanal@riseup.net>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NNathan Chancellor <nathan@kernel.org>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This version brings along following fixes:

*Fixed register definitions for DCN32/321
*Adding log for spread_spectrum_info
*Reverted DSC programming sequence change
*Correct I2C register offset
*Updated DCN30 header files, viewport position for phantom pipes
*Enable dlg and vba compilation for dcn314
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
Fix the instatiation sequence for MPC registers and add a few other
missing register definitions that were ommited erroneously when copying
them over to enable runtime initialization of reigster offsets for
DCN32/321
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Refactor calculation to remove floating point operations from dmub_srv.
To ensure that 32-bit compilation works well, we use the div64 family of
macros to do integer division for SubVP-related timing parameters.

Cc: Maíra Canal <mairacanal@riseup.net>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Isabella Basso <isabbasso@riseup.net>
Cc: Magali Lemes <magalilemes00@gmail.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NSamson Tam <Samson.Tam@amd.com>
Acked-by: NTom Chung <chiahsuan.chung@amd.com>
Signed-off-by: NAlvin Lee <alvin.lee2@amd.com>
Co-developed-by: NAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com>
Co-developed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
Call commit_minimal_transition_state wrongly in case of surface_count
equal to 0.

[how]
Add a condition to filter case of surface_count equal to 0.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAric Cyr <Aric.Cyr@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NJeromeHong <jerome.hong@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
Do not need to spend time reprogramming DRR if there were no updates to
the parameters.

[how]
Compare the current stream state to the requested one to determine if an
update is required.

In amdgpu_dm the timing_changed flag is set but never used so can remove it.
Similarly, the stream update for VRR is done after dc_commit and should
not update its adjust field until after the update is completed.  The
adjust field is managed by dc_stream_adjust_vmin_vmax and should not be
manually updated in amdgpu_dm.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAnthony Koo <Anthony.Koo@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
Enable logging for spread_spectrum_percentage in spread_spectrum_info
to facilitate debugging for audio compliance issues
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Co-authored-by: NLeo Chen <SanChuan.Chen@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NLeo Chen <SanChuan.Chen@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
For HDR mode, we get total 512 tf_point and after switching to SDR mode
we actually get 400 tf_point and the rest of points(401~512) still use
dirty value from HDR mode. We should limit the rest of the points to max
value.

[How]
Limit the value when coordinates_x.x > 1, just like what we do in
translate_from_linear_space for other re-gamma build paths.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NKrunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: NAric Cyr <Aric.Cyr@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NYao Wang1 <Yao.Wang1@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why&How]
Kernel does not have a means to tell the userspace to use software
cursor. Due to lack of this functionality, reducing the max cursor size
is the only way to ensure that power savings of Subview port feature is
utilized for asics that support it. The workaround could be removed
after cursor caching is fixed while a subviewport config is active.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Description]
Regkey option for forcing num ways for subvp for debug purposes
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Description]
In some cases the viewport position of the main pipes can change without
triggering a full update. In this case the subvp phantom viewports must
be updated accordingly.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
When calculating cursor size for MALL allocation, the cursor width should
be the actual width rounded up to 64 alignment. Additionally, the bit
depth should vary depending on color format.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NTaimur Hassan <Syed.Hassan@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
The interpretation of the number of memory channels
differ by memory type, and this affects channel width
for the DML input.

[How]
Set dram channel width according to memory type for
dcn314.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NDuncan Ma <duncan.ma@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
HW can support the display swizzle modes for video, and those are
preferable over standard or linear for decode use.

[How]
Remove the check for DCN314.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
Add support for the DML314 functions and hook up DCN314 to use them.

This has some necessary additions for calculating Max VSTARTUP for
future features, but there's also some changes that we have to make
for pixel format/swizzle support.

That will come in a following patch to make this transition easier to
bisect.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We were not using the VBA and DLG files for DCN314, but the next
sequence of changes for DCN314 will require those files. This commit
adds the necessary files to the Makefile.

Cc: Roman Li <roman.li@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

We have some compilation errors in some DML files from DCN314 that we
never noticed because we were not compiling some of the DML files. This
commit fixes those syntax errors before we enable the compilation.

Cc: Roman Li <roman.li@amd.com>
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
Incorrectly using MicroTileWidth instead of MacroTileWidth for
calculations.

[how]
Remove all unused references to MicroTile and change them to MacroTile.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why & How]
DIG_FIFO_READ_START_LEVEL should only be set to default value (7) by software.
Removed all instances of resetting the register to 0
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NLeo Chen <sancchen@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Description]
Leverage SW cursor fall back for SubVP when the cursor is too big. We
want to take advantage of being able to fallback to SW cursor when
possible because it's not worth it to disable MCLK switching because the
cursor is slightly too big.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAurabindo Pillai <Aurabindo.Pillai@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
link type is not assigned before check dpia_mst_dsc_always_on conditions.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NJinZe.Xu <JinZe.Xu@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[HOW&WHY]
Revert a previous commit by moving DSC programming back to before link
enablement.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NJayendran Ramani <Jayendran.Ramani@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NNagulendran, Iswara <Iswara.Nagulendran@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Description]
Update MBLK calculation according to hardware doc.  For DCC case we were
not allocation enough MALL due to an inaccurate MBLK calculation.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NJun Lei <Jun.Lei@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAlvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

This reverts commit a4f1b042 since
returning false in case of SubVP results in no cursor being visible on
desktop as there is no sw cursor fallback path on all platforms.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NAlvin Lee <Alvin.Lee2@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[Why]
I2C register name starts with 1, unlike other registers that start with
0. This creates a problem with the new register macro refactoring when
I2C HW objects are created in an array.

[How]
Correct I2C register offset by making a new macro to account for array
offset.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NCharlene Liu <Charlene.Liu@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NChris Park <chris.park@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

[why]
Conditionals in the DML basic math functions significantly impact mode
enumeration.

[how]
Remove conditionals for floor/ceil operations which are used frequently
in DML and add an assertion for invalid callers using zero granuality.
Fix existing callers that rely on 0 granularity.
Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: NNevenko Stupar <Nevenko.Stupar@amd.com>
Acked-by: NPavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: NAric Cyr <aric.cyr@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

No need to reset error status since only umc ras supported on psp v13_0_0.
Signed-off-by: NCandice Li <candice.li@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Set correct EEPROM I2C address for smu v13_0_0.
Signed-off-by: NCandice Li <candice.li@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

copy ras driver to psp if present
Signed-off-by: NJohn Clements <john.clements@amd.com>
Reviewed-by: NHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Was missing before and would have resulted in a write to
a non-existant register. Normally APUs don't use HDP, but
other asics could use this code and APUs do use the HDP
when used in passthrough.
Reviewed-by: NLijo Lazar <lijo.lazar@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>

Remove "default n" options. If the "default" line is removed, it
defaults to 'n'.
Signed-off-by: NJingyu Wang <jingyuwang_vip@163.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>